SuccessChanges

Summary

  1. Apply defaut cmake flags to ABITestsuitBuilder. (details)
Commit 35e1ae011e77fb04540dec7610cb792ced2fa864 by gkistanova
Apply defaut cmake flags to ABITestsuitBuilder.
llvm-svn: 375268
The file was modifiedzorg/buildbot/builders/ABITestsuitBuilder.py (diff)

Summary

  1. AMDGPU: Fix SMEM WAR hazard for gfx10 readlane (details)
  2. [examples] Add an example of how to use JITLink and small-code-model (details)
  3. AMDGPU: Relax 32-bit SGPR register class (details)
  4. [examples] Fix some comments in the LLJITWithJITLink example (details)
  5. [lldb][NFC] Remove wrong tests in TestCallOverriddenMethod (details)
Commit 2f41a023afdb68364ea490135874425e85faa574 by Austin.Kerbow
AMDGPU: Fix SMEM WAR hazard for gfx10 readlane
Summary: Hazard recognizer fails to see hazard with
V_READLANE_B32_gfx10.
Reviewers: rampitec
Reviewed By: rampitec
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69172
llvm-svn: 375265
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
Commit 1ac3f80a6a097afd776e925fee4b1176b4383d7f by Lang Hames
[examples] Add an example of how to use JITLink and small-code-model
with LLJIT.
JITLink is LLVM's newer jit-linker. It is an alternative to (and
hopefully eventually a replacement for) LLVM's older jit-linker,
RuntimeDyld. Unlike RuntimeDyld which requries JIT'd code to be complied
with the large code model, JITlink can link code compiled with the small
code model, which is the native code model for a number of targets
(including all supported MachO targets).
This example shows how to:
-- Create a JITLink InProcessMemoryManager
-- Set the code model to small
-- Use a JITLink backed ObjectLinkingLayer as the linking layer for
LLJIT
  (rather than the default RTDyldObjectLinkingLayer).
Note: This example will only work on platforms supported by JITLink. As
of this commit that's MachO/x86-64 and MachO/arm64.
llvm-svn: 375266
The file was addedllvm/examples/LLJITExamples/LLJITWithJITLink/LLJITWithJITLink.cpp
The file was modifiedllvm/examples/LLJITExamples/CMakeLists.txt
The file was addedllvm/examples/LLJITExamples/LLJITWithJITLink/CMakeLists.txt
Commit f9a42ed0a7f67979cdd20391366e2a059c2e14c8 by Matthew.Arsenault
AMDGPU: Relax 32-bit SGPR register class
Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This
will allow the register coalescer to do a better job eliminating copies
to m0.
For GlobalISel, as a terrible hack, use SGPR_32 for things that should
use SCC until booleans are solved.
llvm-svn: 375267
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-select.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/read_register.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.u16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sffbh.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/inline-constraints.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.i16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.u16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frame-index.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.i16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mbcnt.lo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-gep.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-mask.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitreverse.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
Commit bb7dd55f675f156c26b98bd7e411a46412cb15d2 by Lang Hames
[examples] Fix some comments in the LLJITWithJITLink example
llvm-svn: 375269
The file was modifiedllvm/examples/LLJITExamples/LLJITWithJITLink/LLJITWithJITLink.cpp
Commit 5c28d49314c7bb84f08c9db3acd5ff64e1c4bc2d by Raphael Isemann
[lldb][NFC] Remove wrong tests in TestCallOverriddenMethod
We call these tests in the second test function where they are x-failed
on Windows. I forgot to remove the tests from the first test function
(which is not x-failed on Windows) when extracting these calls into
their own test function, so the test is still failing on Windows.
llvm-svn: 375271
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/call-overridden-method/TestCallOverriddenMethod.py

Summary

  1. Apply defaut cmake flags to ABITestsuitBuilder. (details)
Commit 35e1ae011e77fb04540dec7610cb792ced2fa864 by gkistanova
Apply defaut cmake flags to ABITestsuitBuilder.
llvm-svn: 375268
The file was modifiedzorg/buildbot/builders/ABITestsuitBuilder.py