FailedChanges

Summary

  1. [InstSimplify] simplifyUnsignedRangeCheck(): handle few tautological (details)
  2. [lldb] Code cleanup: FormattersContainer.h: Use range-based for loops. (details)
  3. [TargetLowering] SimplifyDemandedBits - add EXTRACT_SUBVECTOR support. (details)
  4. [Diagnostics] Added silence note for -Wsizeof-array-div; suggest extra (details)
  5. Add debug check for null pointers passed to <string_view> (details)
  6. compiler-rt/builtins: Make check-builtins run tests on macOS. (details)
  7. lld-link: Make Options.td formatting more self-consistent. (details)
  8. [CodeEmitter] Support instruction widths > 64 bits (details)
  9. [CodeEmitter] Improve testing for APInt encoding (details)
  10. [ARM] Simplify and update vmla test. NFC (details)
  11. [SLP] limit vectorization of Constant subclasses (PR33958) (details)
  12. [ARM] Masked loads and stores (details)
  13. [DebugInfo] Don't dereference a dyn_cast<PDBSymbolData> result. NFCI. (details)
  14. [OpenMP] Fix OMPClauseReader::readClause() uninitialized variable (details)
  15. InterleavedLoadCombine - merge isa<> and dyn_cast<> duplicates. NFCI. (details)
  16. [LoadStoreVectorizer] vectorizeLoadChain - ensure we find a valid Type (details)
  17. [GlobalISel] findGISelOptimalMemOpLowering - remove dead initalization. (details)
  18. [PowerPC][NFC] Add a testcase for fdiv expansion. (details)
  19. [InstCombine] add icmp tests with extra uses; NFC (details)
  20. [InstCombine] remove unneeded one-use checks for icmp fold (details)
  21. Commit missing part of "Split many_tls_keys.cpp into two tests" (details)
  22. [Attributor] Heap-To-Stack Conversion (details)
  23. AMDGPU/GlobalISel: Fix VALU s16 fneg (details)
  24. AMDGPU/GlobalISel: Select s32->s16 G_[US]ITOFP (details)
  25. AMDGPU/GlobalISel: Select S16->S32 fptoint (details)
  26. AMDGPU/GlobalISel: Set type on vgpr live in special arguments (details)
  27. AMDGPU/GlobalISel: Legalize s1 source G_[SU]ITOFP (details)
  28. AMDGPU/GlobalISel: RegBankSelect for kill (details)
  29. AMDGPU/GlobalISel: Select SMRD loads for more types (details)
  30. AMDGPU/GlobalISel: Remove illegal select tests (details)
  31. [ELF] Map the ELF header at imageBase (details)
  32. [ELF][X86] Allow PT_LOAD to have overlapping p_offset ranges on (details)
  33. [SystemZ]  Merge the SystemZExpandPseudo pass into SystemZPostRewrite. (details)
  34. [AArch64] Some more FP16 FMA pattern matching (details)
  35. gn build: Merge r371959 (details)
  36. [test] Add -z separate-code to fix tests that ae sensitive to exact (details)
  37. [clang-tidy] performance-inefficient-vector-operation: Support proto (details)
  38. [ELF][ARM] Implement --fix-cortex-a8 to fix erratum 657417 (details)
  39. gn build: Merge r371965 (details)
  40. [SVE][Inline-Asm] Add constraints for SVE predicate registers (details)
  41. Fix the rst doc, unbreak buildbot. (details)
  42. Change signature of __builtin_rotateright64 back to unsigned (details)
  43. [ELF][ARM] Fix -Werror buildbots NFC. (details)
  44. [clangd] Fix a crash when renaming operator. (details)
  45. Added return statement to fix compile and build warning: (details)
  46. [SLPVectorizer] Don't dereference a dyn_cast result. NFCI. (details)
  47. [SLPVectorizer] Assert that we find a LastInst to silence analyzer null (details)
  48. [VPlanSLP] Don't dereference a cast_or_null<VPInstruction> result. NFCI. (details)
  49. Implement semantic selections. (details)
  50. gn build: Merge r371976 (details)
  51. [InstCombine] fix comments to match code; NFC (details)
  52. [InstCombine] add icmp tests with extra uses; NFC (details)
  53. [clangd] Bump vscode-clangd v0.0.17 (details)
Commit 9c5a4a4527bc6c06b0f889501aa48aa23ccb90a5 by lebedev.ri
[InstSimplify] simplifyUnsignedRangeCheck(): handle few tautological
cases (PR43251)
Summary: This is split off from D67356, since these cases produce a
constant, no real need to keep them in instcombine.
Alive proofs: https://rise4fun.com/Alive/u7Fk
https://rise4fun.com/Alive/4lV
https://bugs.llvm.org/show_bug.cgi?id=43251
Reviewers: spatel, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67498
llvm-svn: 371921
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/result-of-usub-is-non-zero-and-no-overflow.ll
Commit 9060643380b3c66233dbce64489fce1916a48d98 by jan.kratochvil
[lldb] Code cleanup: FormattersContainer.h: Use range-based for loops.
Suggested for an other loop by Pavel Labath in:
https://reviews.llvm.org/D66654#inline-605808
llvm-svn: 371922
The file was modifiedlldb/include/lldb/DataFormatters/FormattersContainer.h
Commit b743e94cdca985cb676049290af4f49b6e49572f by llvm-dev
[TargetLowering] SimplifyDemandedBits - add EXTRACT_SUBVECTOR support.
Call SimplifyDemandedBits on the source vector.
llvm-svn: 371923
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-mul.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit b8185153f35446c2a8db48ee711d2fb577674c18 by david.bolvansky
[Diagnostics] Added silence note for -Wsizeof-array-div; suggest extra
parens
llvm-svn: 371924
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/Sema/div-sizeof-array.cpp
Commit 6bc1236d395187334051b99e2fcd715a54753f33 by eric
Add debug check for null pointers passed to <string_view>
llvm-svn: 371925
The file was modifiedlibcxx/include/__string
The file was addedlibcxx/test/libcxx/debug/db_string_view.pass.cpp
The file was modifiedlibcxx/include/string_view
Commit 34b6f49c2ca4491a3a3ee520ea5919b8e7aeb459 by nicolasweber
compiler-rt/builtins: Make check-builtins run tests on macOS.
Differential Revision: https://reviews.llvm.org/D66984
llvm-svn: 371926
The file was modifiedcompiler-rt/test/builtins/Unit/lit.cfg.py
The file was modifiedcompiler-rt/test/builtins/CMakeLists.txt
Commit c7d8cc48c139232ddaae67cb6a09061bcd79b7ab by nicolasweber
lld-link: Make Options.td formatting more self-consistent.
Also tighten up help strings for /force, --start-lib, and --end-lib.
Differential Revision: https://reviews.llvm.org/D67457
llvm-svn: 371927
The file was modifiedlld/COFF/Options.td
Commit 60aadd19cbffc3793476a14d2e3529214119e2f5 by jmolloy
[CodeEmitter] Support instruction widths > 64 bits
Some VLIW instruction sets are Very Long Indeed. Using uint64_t
constricts the Inst encoding to 64 bits (naturally).
This change switches CodeEmitter to a mode that uses APInts when Inst's
bitwidth is > 64 bits (NFC for existing targets).
When Inst.BitWidth > 64 the prototype changes to:
  void TargetMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
                                               
SmallVectorImpl<MCFixup> &Fixups,
                                                 APInt &Inst,
                                                 APInt &Scratch,
                                                 const MCSubtargetInfo
&STI);
The Inst parameter returns the encoded instruction, the Scratch
parameter is used internally for manipulating operands and is exposed so
that the underlying storage can be reused between calls to
getBinaryCodeForInstr. The goal is to elide any APInt constructions that
we can.
Similarly the operand encoding prototype changes to:
  getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &op,
SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI);
That is, the operand is passed by reference as APInt rather than
returned as uint64_t.
To reiterate, this APInt mode is enabled only when Inst.BitWidth > 64,
so this change is NFC for existing targets.
llvm-svn: 371928
The file was addedllvm/test/TableGen/BigEncoder.td
The file was modifiedllvm/utils/TableGen/CodeEmitterGen.cpp
The file was modifiedllvm/test/TableGen/RegisterEncoder.td
Commit a088b95f89176b87553d68f3ffbe1f7cba4cefb5 by jmolloy
[CodeEmitter] Improve testing for APInt encoding
I missed Artem's comment in D67487 before committing.
Differential Revision: https://reviews.llvm.org/D67487
llvm-svn: 371929
The file was modifiedllvm/test/TableGen/BigEncoder.td
Commit 06b309d5274951a9c3c37598afece51b3948e2a4 by david.green
[ARM] Simplify and update vmla test. NFC
llvm-svn: 371930
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmaxv.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmla.ll
Commit b6a0faaa0c793aede7911be241b1895a9ebea41c by spatel
[SLP] limit vectorization of Constant subclasses (PR33958)
This is a fix for: https://bugs.llvm.org/show_bug.cgi?id=33958
It seems universally true that we would not want to transform this kind
of sequence on any target, but if that's not correct, then we could view
this as a target-specific cost model problem. We could also white-list
ConstantInt, ConstantFP, etc. rather than blacklist Global and
ConstantExpr.
Differential Revision: https://reviews.llvm.org/D67362
llvm-svn: 371931
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/consecutive-access.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit b325c057322ce14b5c561d8ac49508adab7649e5 by david.green
[ARM] Masked loads and stores
Masked loads and store fit naturally with MVE, the instructions being
easily predicated. This adds lowering for the simple cases of masked
loads and stores. It does not yet deal with widening/narrowing or
pre/post inc, and so is currently behind an option.
The llvm masked load intrinsic will accept a "passthru" value, dictating
the values used for the zero masked lanes. In MVE the instructions write
0 to the zero predicated lanes, so we need to match a passthru that
isn't 0 (or undef) with a select instruction to pull in the correct data
after the load.
Differential Revision: https://reviews.llvm.org/D67186
llvm-svn: 371932
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was addedllvm/test/Transforms/LoopVectorize/ARM/mve-maskedldst.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-load.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-store.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
Commit 4f234aaf2c9801364d1855dc82466c4a307360cb by llvm-dev
[DebugInfo] Don't dereference a dyn_cast<PDBSymbolData> result. NFCI.
The static analyzer is warning about a potential null dereference - but
as we're in DataMemberLayoutItem we should be able to guarantee that the
Symbol is a PDBSymbolData type, allowing us to use cast<PDBSymbolData> -
and if not assert will fire for us.
llvm-svn: 371933
The file was modifiedllvm/lib/DebugInfo/PDB/UDTLayout.cpp
Commit 556fbfec1359694290fe9798fa84a50033370b21 by llvm-dev
[OpenMP] Fix OMPClauseReader::readClause() uninitialized variable
warning. NFCI.
Fixes static analyzer uninitialized variable warning for the OMPClause -
the function appears to cover all cases, but I've added an assertion to
make sure.
llvm-svn: 371934
The file was modifiedclang/lib/Serialization/ASTReader.cpp
Commit 2b4ace3f2990a8e035c1bfd3f6b0dabc143db0c6 by llvm-dev
InterleavedLoadCombine - merge isa<> and dyn_cast<> duplicates. NFCI.
Silence static analyzer null dereference warning of
*dyn_cast<BinaryOperator> by merging with the isa<BinaryOperator> above.
llvm-svn: 371935
The file was modifiedllvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
Commit 4e46ea3946cb12a165574a973f5b928fc692c850 by llvm-dev
[LoadStoreVectorizer] vectorizeLoadChain - ensure we find a valid Type
down the load chain. NFCI.
Silence static analyzer uninitialized variable warning by setting the
LoadTy to null and then asserting we find a real value.
llvm-svn: 371936
The file was modifiedllvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
Commit a8a4953fdf3c3b1edfcf25f14ac1e6e49ab32cb7 by llvm-dev
[GlobalISel] findGISelOptimalMemOpLowering - remove dead initalization.
NFCI.
Fixes static analyzer warning that "Value stored to 'NewTySize' during
its initialization is never read".
llvm-svn: 371937
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Commit 07d824a7c39ee91c0971d46ae5ca6e125fe4daf0 by Jinsong Ji
[PowerPC][NFC] Add a testcase for fdiv expansion.
Pre-commit for following patch.
llvm-svn: 371938
The file was addedllvm/test/CodeGen/PowerPC/fdiv.ll
Commit c77ad16f8e5fd0ff0791e86fbbff14c376a1081d by spatel
[InstCombine] add icmp tests with extra uses; NFC
llvm-svn: 371939
The file was modifiedllvm/test/Transforms/InstCombine/icmp.ll
Commit 3daf168fa986d00504483a0277988124d55a0b78 by spatel
[InstCombine] remove unneeded one-use checks for icmp fold
This fold and several others were added in: rL125734
...with no explanation for the one-use checks other than the code
comments about register pressure.
Given that this is IR canonicalization, we shouldn't be worried about
register pressure though; the backend should be able to adjust for that
as needed.
There are similar checks as noted with the TODO comments. I'm hoping to
remove those restrictions too, but if any of these does cause a
regression, it should be easier to correct by making small, individual
commits.
This is part of solving PR43310 the theoretically right way:
https://bugs.llvm.org/show_bug.cgi?id=43310
...ie, if we don't cripple basic transforms, then we won't need to add
special-case code to detect larger patterns.
llvm-svn: 371940
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/test/Transforms/InstCombine/icmp.ll
Commit f7877dd4b6371036e2255b08fb96555827976368 by n54
Commit missing part of "Split many_tls_keys.cpp into two tests"
https://reviews.llvm.org/D67428
This change was lost due to a file rename and modification.
llvm-svn: 371941
The file was modifiedcompiler-rt/test/lsan/TestCases/many_tls_keys_pthread.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/many_tls_keys_thread.cpp
Commit 431141c5cc343c7601cbd5f30c5b34810b123e5c by sstipanovic
[Attributor] Heap-To-Stack Conversion
D53362 gives a prototype heap-to-stack conversion pass. With addition of
new attributes in the attributor, this can now be revisted and improved.
This will place it in the Attributor to make it easier to use new
attributes (eg. nofree, nosync, willreturn, etc.) and other attributor
features.
Reviewers: jdoerfert, uenoku, hfinkel, efriedma
Subscribers: lebedev.ri, xbolva00, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D65408
llvm-svn: 371942
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was addedllvm/test/Transforms/FunctionAttrs/heap_to_stack.ll
Commit f5d5cd205e7bc5177c80d39c03eac26eff916d20 by Matthew.Arsenault
AMDGPU/GlobalISel: Fix VALU s16 fneg
llvm-svn: 371948
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
Commit 0a6123595f97709af912690403dea841eced0f0a by Matthew.Arsenault
AMDGPU/GlobalISel: Select s32->s16 G_[US]ITOFP
llvm-svn: 371949
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
Commit 9f52c1ea583f3480ea10eef39dc112ee691ae54d by Matthew.Arsenault
AMDGPU/GlobalISel: Select S16->S32 fptoint
llvm-svn: 371950
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
Commit 60169ed613050252d074ca2fb9294a96aa7c4367 by Matthew.Arsenault
AMDGPU/GlobalISel: Set type on vgpr live in special arguments
Fixes assertion with workitem ID intrinsics used in non-kernel
functions.
llvm-svn: 371951
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 01c7f40de3e422cef10bccb3b6c525b4b10ed23f by Matthew.Arsenault
AMDGPU/GlobalISel: Legalize s1 source G_[SU]ITOFP
llvm-svn: 371952
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
Commit 48b158acae65cc715f78d46b23e5f8de69a5d6a5 by Matthew.Arsenault
AMDGPU/GlobalISel: RegBankSelect for kill
llvm-svn: 371953
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
Commit bc8de8a8da704c748cfcb1ad5a348cb234a4fcb8 by Matthew.Arsenault
AMDGPU/GlobalISel: Select SMRD loads for more types
llvm-svn: 371954
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
The file was modifiedllvm/lib/Target/AMDGPU/SMInstructions.td
Commit 255d157672262c5a4d5a4241d99610b02edaa459 by Matthew.Arsenault
AMDGPU/GlobalISel: Remove illegal select tests
These fail in a release build.
llvm-svn: 371955
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
Commit 06bb7dfbd445fe928b0ae0263ba9df1acd861c41 by maskray
[ELF] Map the ELF header at imageBase
If there is no readonly section, we map:
* The ELF header at imageBase+maxPageSize
* Program headers at imageBase+maxPageSize+sizeof(Ehdr)
* The first section .text at
imageBase+maxPageSize+sizeof(Ehdr)+sizeof(program headers)
Due to the interaction between Writer<ELFT>::fixSectionAlignments and
LinkerScript::allocateHeaders,
`alignDown(p_vaddr(R PT_LOAD)) = alignDown(p_vaddr(RX PT_LOAD))`. The RX
PT_LOAD will override the R PT_LOAD at runtime, which is not ideal:
```
// PHDR at 0x401034, should be 0x400034
PHDR           0x000034 0x00401034 0x00401034 0x000a0 0x000a0 R   0x4
// R PT_LOAD contains just Ehdr and program headers.
// At 0x401000, should be 0x400000
LOAD           0x000000 0x00401000 0x00401000 0x000d4 0x000d4 R 
0x1000
LOAD           0x0000d4 0x004010d4 0x004010d4 0x00001 0x00001 R E
0x1000
```
* createPhdrs allocates the headers to the R PT_LOAD.
* fixSectionAlignments assigns
`imageBase+maxPageSize+sizeof(Ehdr)+sizeof(program headers)` (formula:
`alignTo(dot, maxPageSize) + dot % config->maxPageSize`) to addrExpr of
.text
* allocateHeaders computes the minimum address among SHF_ALLOC sections,
i.e. addr(.text)
* allocateHeaders sets address of ELF header to
`addr(.text)-sizeof(Ehdr)-sizeof(program headers) =
imageBase+maxPageSize`
The main observation is that when the SECTIONS command is not used, we
don't have to call allocateHeaders. This requires an assumption that the
presence of PT_PHDR and addresses of headers can be decided regardless
of address information.
This may seem natural because dot is not manipulated by a linker script.
The other thing is that we have to drop the special rule for -T<section>
in `getInitialDot`. If -Ttext is smaller than the image base, the
headers will not be allocated with the old behavior (allocateHeaders is
called) but always allocated with the new behavior.
The behavior change is not a problem. Whether and where headers are
allocated can vary among linkers, or ld.bfd across different versions
(--enable-separate-code or not). It is thus advised to use a linker
script with the PHDRS command to have a consistent behavior across
linkers. If PT_PHDR is needed, an explicit --image-base can be a simpler
alternative.
Differential Revision: https://reviews.llvm.org/D67325
llvm-svn: 371957
The file was modifiedlld/test/ELF/basic-sparcv9.s
The file was modifiedlld/test/ELF/basic-i386.s
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/test/ELF/basic-aarch64.s
The file was modifiedlld/ELF/LinkerScript.cpp
The file was modifiedlld/test/ELF/ttext-tdata-tbss.s
The file was modifiedlld/test/ELF/basic-ppc.s
Commit d4306e90cb18f663342068a4ad83ba42545dbf01 by maskray
[ELF][X86] Allow PT_LOAD to have overlapping p_offset ranges on
EM_X86_64
Port the D64906 technique to EM_X86_64.
Differential Revision: https://reviews.llvm.org/D67482
llvm-svn: 371958
The file was modifiedlld/test/ELF/undef-with-plt-addr.s
The file was modifiedlld/test/ELF/eh-frame-hdr-augmentation.s
The file was modifiedlld/test/ELF/x86-64-reloc-range.s
The file was modifiedlld/test/ELF/x86-64-gotpc-relax-nopic.s
The file was modifiedlld/test/ELF/gdb-index-dwarf5-low-high.s
The file was modifiedlld/test/ELF/local-got-shared.s
The file was modifiedlld/test/ELF/common-page.s
The file was modifiedlld/test/ELF/relro-bss.s
The file was modifiedlld/test/ELF/tls-offset.s
The file was modifiedlld/test/ELF/Inputs/copy-rel-abs.s
The file was modifiedlld/test/ELF/partition-pack-dyn-relocs.s
The file was modifiedlld/test/ELF/defsym-reserved-syms.s
The file was modifiedlld/test/ELF/end.s
The file was modifiedlld/test/ELF/gdb-index-base-addr.s
The file was modifiedlld/test/ELF/Inputs/copy-rel-tls.s
The file was modifiedlld/test/ELF/local-got-pie.s
The file was modifiedlld/test/ELF/linkerscript/absolute.s
The file was modifiedlld/test/ELF/relocation-common.s
The file was modifiedlld/test/ELF/verdef-defaultver.s
The file was modifiedlld/test/ELF/gdb-index.s
The file was modifiedlld/test/ELF/relocation-undefined-weak.s
The file was modifiedlld/test/ELF/x86-64-reloc-gotoff64.s
The file was modifiedlld/test/ELF/eh-frame-pcrel-overflow.s
The file was modifiedlld/test/ELF/map-file.s
The file was modifiedlld/test/ELF/relocation-copy-flags.s
The file was modifiedlld/test/ELF/gnu-ifunc-noplt.s
The file was modifiedlld/test/ELF/cgprofile-txt2.s
The file was modifiedlld/test/ELF/relro-tls.s
The file was modifiedlld/test/ELF/x86-64-tls-opt-noplt.s
The file was modifiedlld/test/ELF/x86-64-tls-ie-local.s
The file was modifiedlld/test/ELF/relocation-copy.s
The file was modifiedlld/test/ELF/basic.s
The file was modifiedlld/test/ELF/no-inhibit-exec.s
The file was modifiedlld/test/ELF/x86-64-tls-ie.s
The file was modifiedlld/test/ELF/apply-dynamic-relocs.s
The file was modifiedlld/test/ELF/x86-64-gotpc-relax-und-dso.s
The file was modifiedlld/test/ELF/x86-64-tlsdesc-ld.s
The file was modifiedlld/test/ELF/emit-relocs.s
The file was modifiedlld/test/ELF/abs-hidden.s
The file was modifiedlld/test/ELF/gnu-ifunc-canon.s
The file was modifiedlld/test/ELF/x86-64-plt-high-addr.s
The file was modifiedlld/test/ELF/x86-64-retpoline.s
The file was modifiedlld/test/ELF/ttext-tdata-tbss.s
The file was modifiedlld/test/ELF/eh-frame-merge.s
The file was modifiedlld/test/ELF/symbols.s
The file was modifiedlld/test/ELF/x86-64-gotpc-relax.s
The file was modifiedlld/test/ELF/image-base.s
The file was modifiedlld/test/ELF/emit-relocs-icf1.s
The file was modifiedlld/test/ELF/partition-notes.s
The file was modifiedlld/test/ELF/partition-synthetic-sections.s
The file was modifiedlld/test/ELF/relocation-non-alloc.s
The file was modifiedlld/test/ELF/got.s
The file was modifiedlld/test/ELF/edata-etext.s
The file was modifiedlld/test/ELF/gnu-ifunc.s
The file was modifiedlld/test/ELF/segments.s
The file was modifiedlld/test/ELF/gdb-index-ranges-discarded.s
The file was modifiedlld/test/ELF/ztext.s
The file was modifiedlld/test/ELF/linkerscript/synthetic-symbols3.test
The file was modifiedlld/test/ELF/eh-align-cie.s
The file was modifiedlld/test/ELF/build-id.s
The file was modifiedlld/test/ELF/gdb-index-gc-sections.s
The file was modifiedlld/test/ELF/relocatable.s
The file was modifiedlld/test/ELF/common.s
The file was modifiedlld/test/ELF/relative-dynamic-reloc-pie.s
The file was modifiedlld/test/ELF/startstop.s
The file was modifiedlld/test/ELF/eh-frame-value-format8.s
The file was modifiedlld/test/ELF/relocation-copy-relro.s
The file was modifiedlld/test/ELF/cgprofile-bad-clusters.s
The file was modifiedlld/test/ELF/fill-trap.s
The file was modifiedlld/test/ELF/symbol-ordering-file-cgprofile-conflicts.s
The file was modifiedlld/test/ELF/gdb-index-rng-lists.s
The file was modifiedlld/test/ELF/end-update.s
The file was modifiedlld/test/ELF/x86-64-reloc-gotpc64.s
The file was modifiedlld/test/ELF/x86-64-tls-dynamic.s
The file was modifiedlld/test/ELF/symbol-ordering-file-icf.s
The file was modifiedlld/test/ELF/cgprofile-txt.s
The file was modifiedlld/test/ELF/copy-rel-tls.s
The file was modifiedlld/test/ELF/rel-offset.s
The file was modifiedlld/test/ELF/local-got.s
The file was modifiedlld/test/ELF/x86-64-retpoline-znow-static-iplt.s
The file was modifiedlld/test/ELF/x86-64-plt.s
The file was modifiedlld/test/ELF/gdb-index-ranges.s
The file was modifiedlld/test/ELF/just-symbols.s
The file was modifiedlld/test/ELF/eh-frame-hdr-abs-fde.s
The file was modifiedlld/test/ELF/eh-frame-hdr-icf-fde.s
The file was modifiedlld/test/ELF/entry.s
The file was modifiedlld/test/ELF/avoid-empty-program-headers.s
The file was modifiedlld/test/ELF/relocation.s
The file was modifiedlld/test/ELF/x86-64-reloc-error2.s
The file was modifiedlld/test/ELF/x86-64-reloc-size.s
The file was modifiedlld/test/ELF/cgprofile-obj.s
The file was modifiedlld/test/ELF/comdat.s
The file was modifiedlld/test/ELF/x86-64-tlsdesc-gd.s
The file was modifiedlld/test/ELF/eh-frame-value-format7.s
The file was modifiedlld/test/ELF/x86-64-got-plt-header.s
The file was modifiedlld/test/ELF/relocation-copy-align-common.s
The file was modifiedlld/test/ELF/emit-relocs-mergeable.s
The file was modifiedlld/test/ELF/ehframe-relocation.s
The file was modifiedlld/test/ELF/global_offset_table_shared.s
The file was modifiedlld/test/ELF/gnu-ifunc-shared.s
The file was modifiedlld/test/ELF/tls.s
The file was modifiedlld/test/ELF/startstop-shared2.s
The file was modifiedlld/test/ELF/linkerscript/symbol-reserved.s
The file was modifiedlld/test/ELF/x86-64-tls-gdie.s
The file was modifiedlld/test/ELF/copy-rel-large.s
The file was modifiedlld/test/ELF/x86-64-relax-got-abs.s
The file was modifiedlld/test/ELF/cgprofile-icf.s
The file was modifiedlld/test/ELF/cgprofile-reproduce.s
The file was modifiedlld/test/ELF/linkerscript/page-size.s
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/test/ELF/x86-64-retpoline-znow.s
The file was modifiedlld/test/ELF/end-dso-defined.s
The file was modifiedlld/test/ELF/eh-frame-hdr.s
The file was modifiedlld/test/ELF/pre_init_fini_array_missing.s
The file was modifiedlld/test/ELF/x86-64-tls-gd-local.s
The file was modifiedlld/test/ELF/combreloc.s
The file was modifiedlld/test/ELF/edata-no-bss.s
The file was modifiedlld/test/ELF/gnu-ifunc-dyntags.s
The file was modifiedlld/test/ELF/gnu-ifunc-plt.s
Commit ca5acf5b5e7d658c14169d3061c6495b05e9bea0 by paulsson
[SystemZ]  Merge the SystemZExpandPseudo pass into SystemZPostRewrite.
SystemZExpandPseudo:s only job was to expand LOCRMux instructions into
jump sequences. This needs to be done if expandLOCRPseudo() or
expandSELRPseudo() fails to find a legal opcode (all registers "high" or
"low"). This task has now been moved to SystemZPostRewrite while
removing the SystemZExpandPseudo pass.
It is in fact preferred to expand these pseudos directly after register
allocation in SystemZPostRewrite since the hinted register combinations
are then not subject to later optimizations.
Review: Ulrich Weigand https://reviews.llvm.org/D67432
llvm-svn: 371959
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZ.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
The file was removedllvm/lib/Target/SystemZ/SystemZExpandPseudo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrInfo.h
The file was modifiedllvm/lib/Target/SystemZ/CMakeLists.txt
The file was modifiedllvm/lib/Target/SystemZ/SystemZRegisterInfo.h
Commit b1e1a26e8e7e61c924d39ae53e2922dc4364e6bb by sjoerd.meijer
[AArch64] Some more FP16 FMA pattern matching
After our previous machinecombiner exercises (rL371321, rL371818,
rL371833), we were still missing a few FP16 FMA patterns.
Differential Revision: https://reviews.llvm.org/D67576
llvm-svn: 371960
The file was modifiedllvm/test/CodeGen/AArch64/fp16_intrinsic_lane.ll
The file was modifiedllvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_3op.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
Commit ac32934f2848fab6fa47013271ab16f411d180b9 by nicolasweber
gn build: Merge r371959
llvm-svn: 371961
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/SystemZ/BUILD.gn
Commit b026b3e53d67c258f8b750e3fc44fa1609185dee by maskray
[test] Add -z separate-code to fix tests that ae sensitive to exact
addresses after r371958
llvm-svn: 371962
The file was modifiedlldb/lit/SymbolFile/DWARF/dir-separator-posix.s
The file was modifiedlldb/lit/SymbolFile/DWARF/debug-types-address-ranges.s
The file was modifiedlldb/lit/SymbolFile/DWARF/dir-separator-no-comp-dir.s
The file was modifiedlldb/lit/SymbolFile/DWARF/dir-separator-windows.s
The file was modifiedlldb/lit/SymbolFile/DWARF/dir-separator-no-comp-dir-relative-name.s
The file was modifiedlldb/lit/SymbolFile/DWARF/find-inline-method.s
Commit ad7a7cea89717daf6b56f35e4bc0b95afe0498a2 by hokein
[clang-tidy] performance-inefficient-vector-operation: Support proto
repeated field
Summary: Finds calls that add element to protobuf repeated field in a
loop without calling Reserve() before the loop. Calling Reserve() first
can avoid unnecessary memory reallocations.
A new option EnableProto is added to guard this feature.
Patch by Cong Liu!
Reviewers: gribozavr, alexfh, hokein, aaron.ballman
Reviewed By: hokein
Subscribers: lebedev.ri, xazax.hun, Eugene.Zelenko, cfe-commits
Tags: #clang, #clang-tools-extra
Differential Revision: https://reviews.llvm.org/D67135
llvm-svn: 371963
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/performance-inefficient-vector-operation.rst
The file was modifiedclang-tools-extra/test/clang-tidy/performance-inefficient-vector-operation.cpp
The file was modifiedclang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.h
Commit ea99ce5e9b49cf7164355009435a29897934182b by peter.smith
[ELF][ARM] Implement --fix-cortex-a8 to fix erratum 657417
The --fix-cortex-a8 option implements a linker workaround for the
coretex-a8 erratum 657417. A summary of the erratum conditions is:
- A 32-bit Thumb-2 branch instruction B.w, Bcc.w, BL, BLX spans two 4KiB
regions.
- The destination of the branch is to the first 4KiB region.
- The instruction before the branch is a 32-bit Thumb-2 non-branch
instruction.
The linker fix is to redirect the branch to a patch not in the first
4KiB region. The patch forwards the branch on to its target.
The cortex-a8, is an old CPU, with the first implementation of this
workaround in ld.bfd appearing in 2009. The cortex-a8 has been used in
early Android Phones and there are some critical applications that still
need to run on a cortex-a8 that have the erratum. The patch is applied
roughly 10 times on LLD and 20 on Clang when they are built with
--fix-cortex-a8 on an Arm system.
The formal erratum description is avaliable in the ARM Core Cortex-A8
(AT400/AT401) Errata Notice document. This is available from Arm on
request but it seems to be findable via a web search.
Differential Revision: https://reviews.llvm.org/D67284
llvm-svn: 371965
The file was modifiedlld/ELF/AArch64ErrataFix.cpp
The file was addedlld/test/ELF/arm-fix-cortex-a8-nopatch.s
The file was addedlld/test/ELF/arm-fix-cortex-a8-recognize.s
The file was addedlld/test/ELF/arm-fix-cortex-a8-toolarge.s
The file was modifiedlld/ELF/Config.h
The file was addedlld/ELF/ARMErrataFix.h
The file was modifiedlld/ELF/CMakeLists.txt
The file was addedlld/test/ELF/arm-fix-cortex-a8-plt.s
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/ELF/Writer.cpp
The file was addedlld/ELF/ARMErrataFix.cpp
The file was modifiedlld/ELF/Options.td
The file was addedlld/test/ELF/arm-fix-cortex-a8-blx.s
The file was addedlld/test/ELF/arm-fix-cortex-a8-thunk.s
Commit b49bcea42048e145805f181620ddf0ed0af23610 by nicolasweber
gn build: Merge r371965
llvm-svn: 371966
The file was modifiedllvm/utils/gn/secondary/lld/ELF/BUILD.gn
Commit e55b3bf40ef3e89fc31912102d975863b6501cf1 by kerry.mclaughlin
[SVE][Inline-Asm] Add constraints for SVE predicate registers
Summary: Adds the following inline asm constraints for SVE:
- Upl: One of the low eight SVE predicate registers, P0 to P7 inclusive
- Upa: SVE predicate register with full range, P0 to P15
Reviewers: t.p.northover, sdesmalen, rovka, momchil.velikov,
cameron.mcinally, greened, rengolin
Reviewed By: rovka
Subscribers: javed.absar, tschuett, rkruppe, psnobl, cfe-commits,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66524
llvm-svn: 371967
The file was modifiedllvm/lib/IR/InlineAsm.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Commit 3716547c5fe31115cf648950df201491c1858035 by hokein
Fix the rst doc, unbreak buildbot.
llvm-svn: 371968
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/performance-inefficient-vector-operation.rst
Commit a1bc428b897900eb562df45622f01e6f94329dda by karl-johan.karlsson
Change signature of __builtin_rotateright64 back to unsigned
The signature of __builtin_rotateright64 was by misstake changed from
unsigned to signed in r360863, this patch will change it back to
unsigned as intended.
This fixes pr43309
Reviewers: efriedma, hans
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D67606
llvm-svn: 371969
The file was modifiedclang/include/clang/Basic/Builtins.def
The file was modifiedclang/test/CodeGen/avr-builtins.c
Commit 1d74940b319c7b6aea49f94730e408586fd76a82 by peter.smith
[ELF][ARM] Fix -Werror buildbots NFC.
Provide a missing initializer to get rid of warning provoking buildbot
failures.
error: missing field 'rel' initializer
[-Werror,-Wmissing-field-initializers]
llvm-svn: 371970
The file was modifiedlld/ELF/ARMErrataFix.cpp
Commit af28bb65023ef989e9079717626a9e3080bb50d3 by hokein
[clangd] Fix a crash when renaming operator.
Summary: The renamelib uses a tricky way to calculate the end location
by relying on decl name, this is incorrect for the overloaded operator
(the name is
"operator++" instead of "++"), which will cause out-of-file offset.
We also disable renaming operator symbol, this case is tricky, and
renamelib doesnt handle it properly.
Reviewers: ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67607
llvm-svn: 371971
The file was modifiedclang/include/clang/Tooling/Refactoring/RecursiveSymbolVisitor.h
The file was modifiedclang-tools-extra/clangd/unittests/RenameTests.cpp
The file was modifiedclang-tools-extra/clangd/refactor/Rename.cpp
Commit 5f349d56a84336e0c5f7b864129c27a6107a0e87 by sjoerd.meijer
Added return statement to fix compile and build warning:
llvm-rtdyld.cpp:966:7: warning: variable ‘Result’ set but not used
llvm-svn: 371972
The file was modifiedllvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
Commit ae625d70cdb36485de9429b1ea26ae74e535a053 by llvm-dev
[SLPVectorizer] Don't dereference a dyn_cast result. NFCI.
The static analyzer is warning about potential null dereferences of
dyn_cast<> results - in these cases we can safely use cast<> directly as
we know that these cases should all be the correct type, which is why
its working atm and anyway cast<> will assert if they aren't.
llvm-svn: 371973
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit bfe6b35c7079495a418cf247ef3bec828b8abce9 by llvm-dev
[SLPVectorizer] Assert that we find a LastInst to silence analyzer null
dereference warning. NFCI.
llvm-svn: 371974
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 1aaefbca24aba4fd9fa382b85606ef292c740529 by llvm-dev
[VPlanSLP] Don't dereference a cast_or_null<VPInstruction> result. NFCI.
The static analyzer is warning about a potential null dereference of the
cast_or_null result, I've split the cast_or_null check from the
->getUnderlyingInstr() call to avoid this, but it appears that we
weren't seeing any null pointers in the dumped bundles in the first
place.
llvm-svn: 371975
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanSLP.cpp
Commit 73c09eb7344e103f126811a7e6c670ddfa5fb771 by usx
Implement semantic selections.
Summary: For a given cursor position, it returns ranges that are
interesting to the user. Currently the semantic ranges correspond to the
nodes of the syntax trees.
Subscribers: mgorny, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67358
llvm-svn: 371976
The file was addedclang-tools-extra/clangd/SemanticSelection.cpp
The file was addedclang-tools-extra/clangd/SemanticSelection.h
The file was modifiedclang-tools-extra/clangd/CMakeLists.txt
The file was addedclang-tools-extra/clangd/unittests/SemanticSelectionTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/CMakeLists.txt
Commit eded79b0d4bdec1bd5d356ec597e66dadd08fda1 by nicolasweber
gn build: Merge r371976
llvm-svn: 371977
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
Commit 91c2cd0691d1c84202e08e3d240a0fead0dfd8d5 by spatel
[InstCombine] fix comments to match code; NFC
This blob was written before match() existed, so it could probably be
reduced significantly.
But I suspect it isn't well tested, so tests would have to be added to
reduce risk from logic changes.
llvm-svn: 371978
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 14ce3fde046ad0e9f4266a611a2f3a040b976749 by spatel
[InstCombine] add icmp tests with extra uses; NFC
llvm-svn: 371979
The file was modifiedllvm/test/Transforms/InstCombine/icmp.ll
Commit 72b9c4f3bcea2a87580551afa96ad9f68c7cae38 by hokein
[clangd] Bump vscode-clangd v0.0.17
CHANGELOG:
- added semantic highlighting support (under the
clangd.semanticHighlighting
flag);
- better error message when clangd fails to execute refactoring-like
actions;
- improved the readme doc;
llvm-svn: 371980
The file was modifiedclang-tools-extra/clangd/clients/clangd-vscode/package.json