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Started 4 mo 18 days ago
Took 1 hr 24 min on green-dragon-20

Success Build rL:366842 - C:366831 - #58190 (Jul 23, 2019 1:05:56 PM)

  • : 366842
  • : 366831
  • : 366834
  • : 364589
  • : 366740
  • : 366776
  • : 366811
  1. [Remarks][NFC] Move the YAML serializer to its own header (detail/ViewSVN)
    by thegameg
  2. [PowerPC] Remove redundant load immediate instructions

    Currently PowerPC backend emits code like this:

      r3 = li 0
      std r3, 264(r1)
      r3 = li 0
      std r3, 272(r1)

    This patch fixes that and other cases where a register already contains a value that is loaded so we will get:

      r3 = li 0
      std r3, 264(r1)
      std r3, 272(r1)

    Differential Revision: (detail/ViewSVN)
    by yi-hong.lyu
  3. gn build: Merge r366832 (detail/ViewSVN)
    by nico
  4. [X86] In lowerVectorShuffle, instead of creating a new node to canonicalize the shuffle mask by commuting, just commute the mask and swap V1/V2.

    LegalizeDAG tries to legal the DAG by legalizing nodes before
    their operands.

    If we create a new node, we end up legalizing it after its operands.
    This prevents some of the optimizations that can be done when the
    operand is a build_vector since the build_vector will have been
    legalized to something else.

    Differential Revision: (detail/ViewSVN)
    by ctopper

Started by an SCM change (5 times)

This run spent:

  • 1 hr 33 min waiting;
  • 1 hr 24 min build duration;
  • 2 hr 57 min total from scheduled to completion.
LLVM/Clang Warnings: 1 warning.
    Test Result (no failures)