SuccessChanges

Summary

  1. [InstCombine] matchRotate - allow undef in uniform constant rotation amounts (PR46895) (details)
  2. [ARM][MVE] Enable tail-predication by default (details)
  3. [clang] Don't emit "no member" diagnostic if the lookup fails on an invalid record decl. (details)
  4. [clang-tidy] IncludeInserter: allow <> in header name (details)
  5. [llvm-readobj/elf] - Fix the PREL31 relocation computation used for dumping arm32 unwind info (-u). (details)
  6. [AMDGPU] Reformat SITargetLowering::isSDNodeSourceOfDivergence. NFC. (details)
  7. [NFC][ARM] Factor out some logic for LoLoops. (details)
  8. [InstCombine] matchRotate - force splat of uniform constant rotation amounts (PR46895) (details)
  9. [TableGen] Improved messages in PseudoLoweringEmitter. (details)
  10. [ValueTracking] Fix analyses to update CxtI to be phi's incoming edges' terminators (details)
  11. [SVE] Lower fixed length VECREDUCE_[UMAX|UMIN] to Scalable (details)
  12. [ARM] Added more patterns to generate SSAT/USAT with shift (details)
  13. [llvm] Fix unused variable in non-debug configurations (details)
  14. [ARM][LowOverheadLoops] Cleanup and re-arrange (details)
Commit dabb14cadd356d3628b4f935c735b163a0f68f38 by llvm-dev
[InstCombine] matchRotate - allow undef in uniform constant rotation amounts (PR46895)

An extension to D87452, we can safely permit undefs in the uniform/splat detection

https://alive2.llvm.org/ce/z/nT-ptN

Differential Revision: https://reviews.llvm.org/D88402
The file was modifiedllvm/test/Transforms/InstCombine/rotate.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit 1696dd27fb619fbf6d28cf6aa0d74cf8ef883723 by sjoerd.meijer
[ARM][MVE] Enable tail-predication by default

We have been running tests/benchmarks downstream with tail-predication enabled
for some time now and this behaves as expected: we are not aware of any
correctness issues, and this performs better across the board than with
tail-predication disabled. Time to flip the switch!

Differential Revision: https://reviews.llvm.org/D88093
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/tail-folding-reduces-vf.ll
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
Commit bf890dcb0f5eb05b1a98cbd1cdd24c0c4ece8f8d by hokein.wu
[clang] Don't emit "no member" diagnostic if the lookup fails on an invalid record decl.

The "no member" diagnostic is likely bogus.

Reviewed By: sammccall, #libc

Differential Revision: https://reviews.llvm.org/D86765
The file was modifiedlibcxx/test/libcxx/utilities/memory/util.smartptr/util.smartptr.shared/function_type_default_deleter.fail.cpp
The file was modifiedclang/test/SemaCXX/access-base-class.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
Commit fdfe324da195ebd9b9c691f006b0d6ccc64365e1 by alexfh
[clang-tidy] IncludeInserter: allow <> in header name

This adds a pair of overloads for create(MainFile)?IncludeInsertion methods that
use the presence of the <> in the file name to control whether the #include
directive will use angle brackets or quotes. Motivating examples:
https://reviews.llvm.org/D82089#inline-789412 and
https://github.com/llvm/llvm-project/blob/master/clang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.cpp#L433

The overloads with the IsAngled parameter can be removed after the users are
updated.

Update usages of createIncludeInsertion.

Update (almost all) usages of createMainFileIncludeInsertion.

Reviewed By: hokein

Differential Revision: https://reviews.llvm.org/D85666
The file was modifiedclang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/InitVariablesCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/PassByValueCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/ReplaceAutoPtrCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/utils/IncludeInserter.cpp
The file was modifiedclang-tools-extra/clang-tidy/utils/IncludeInserter.h
The file was modifiedclang-tools-extra/unittests/clang-tidy/IncludeInserterTest.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/modernize-make-unique.rst
The file was modifiedclang-tools-extra/clang-tidy/abseil/StringFindStartswithCheck.cpp
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines-init-variables.cpp
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/ProBoundsConstantArrayIndexCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/ReplaceRandomShuffleCheck.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-init-variables.rst
The file was modifiedclang-tools-extra/clang-tidy/performance/TypePromotionInMathFnCheck.cpp
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
Commit 4ba00619ee70be6eda1d6fbd37471636145d1140 by grimar
[llvm-readobj/elf] - Fix the PREL31 relocation computation used for dumping arm32 unwind info (-u).

This is a part of https://bugs.llvm.org/show_bug.cgi?id=47581.

We have the following computation:
```
(1) uint64_t Location = Address & 0x7fffffff;
(2) if (Location & 0x04000000)
(3)   Location |= (uint64_t) ~0x7fffffff;
(4) return Location + Place;
```

At line 2 there is a mistype. The constant should be `0x40000000`,
not `0x04000000`, because the intention here is to sign extend the `Location`,
which is the 31 bit signed value.

Differential revision: https://reviews.llvm.org/D88407
The file was modifiedllvm/tools/llvm-readobj/ARMEHABIPrinter.h
The file was modifiedllvm/test/tools/llvm-readobj/ELF/ARM/unwind-non-relocatable.test
Commit d3a8e333ec9db769b0335cd72ed6acf0d3d0b2ba by jay.foad
[AMDGPU] Reformat SITargetLowering::isSDNodeSourceOfDivergence. NFC.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 3d1d089155303feed51c2380827325250dd08dd7 by sam.parker
[NFC][ARM] Factor out some logic for LoLoops.

Create a DCE function that accepts an instruction.
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Commit 63ee42a06bdb716f80ffc96ff8aa4162ed982e33 by llvm-dev
[InstCombine] matchRotate - force splat of uniform constant rotation amounts (PR46895)

Fixes minor bug in D88402 where we were using the original shift constant (with undefs) instead of one with the splat values (re)splatted to all elements.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
The file was modifiedllvm/test/Transforms/InstCombine/rotate.ll
Commit c372809f5a9f32c90b468094c19ae8e3b39566ed by paul
[TableGen] Improved messages in PseudoLoweringEmitter.
The file was modifiedllvm/include/llvm/TableGen/Error.h
The file was modifiedllvm/lib/TableGen/Error.cpp
The file was modifiedllvm/utils/TableGen/PseudoLoweringEmitter.cpp
Commit ba8911d560ef85cae55fc45440afa3bef374f1e0 by aqjune
[ValueTracking] Fix analyses to update CxtI to be phi's incoming edges' terminators

It was mentioned that D88276 that when a phi node is visited, terminators at their incoming edges should be used for CtxI.
This is a patch that makes two functions (ComputeNumSignBitsImpl, isGuaranteedNotToBeUndefOrPoison) to do so.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D88360
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
Commit 9b0b09671cddf0283f1a8b351dfec10aff6c3dc2 by mcinally
[SVE] Lower fixed length VECREDUCE_[UMAX|UMIN] to Scalable

Essentially the same as the signed variants from D88259. Also includes a clean up of the lowering function.

Differential Revision: https://reviews.llvm.org/D88317
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-reduce.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 675431b9878776e3c919b79162774a9cdabdaa4c by meera.nakrani
[ARM] Added more patterns to generate SSAT/USAT with shift

Added patterns to generate an SSAT or USAT with shift for
SSAT/USAT instructions that are matched from IR patterns.

Differential Revision: https://reviews.llvm.org/D88145
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/test/CodeGen/ARM/ssat-with-shift.ll
The file was modifiedllvm/test/CodeGen/ARM/usat-with-shift.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrInfo.td
Commit 509fba75dff2382b867f5962e02fb0a899a5fa18 by tpopp
[llvm] Fix unused variable in non-debug configurations
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp
Commit e82a0084d322948b94a5ca3213237d5eeab4920f by sam.parker
[ARM][LowOverheadLoops] Cleanup and re-arrange

Rename and reorganise how we decide where to put the LoopStart
instruction.
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp