SuccessChanges

Summary

  1. [AArch64] Omit SEH directives for the epilogue if none are needed (details)
  2. [SVE][CodeGen] Add new EVT/MVT getFixedSizeInBits() functions (details)
  3. [SVE][CodeGen] Fix implicit TypeSize->uint64_t casts in TypePromotion (details)
  4. [WebAssembly] Emulate v128.const efficiently (details)
  5. [clangd] Drop dependence on standard library in check.test (details)
  6. Handle unused variable without asserts (details)
Commit afb4e0f289ac6d020faafda078642a3716629abd by martin
[AArch64] Omit SEH directives for the epilogue if none are needed

For these cases, we already omit the prologue directives, if
(!AFI->hasStackFrame() && !windowsRequiresStackProbe && !NumBytes).

When writing the epilogue (after the prolog has been written), if
the function doesn't have the WinCFI flag set (i.e. if no prologue
was generated), assume that no epilogue will be needed either,
and don't emit any epilog start pseudo instruction. After completing
the epilogue, make sure that it actually matched the prologue.

Previously, when epilogue start/end was generated, but no prologue,
the unwind info for such functions actually was huge; 12 bytes xdata
(4 bytes header, 4 bytes for one non-folded epilogue header, 4 bytes
for padded opcodes) and 8 bytes pdata. Because the epilog consisted of
one opcode (end) but the prolog was empty (no .seh_endprologue), the
epilogue couldn't be folded into the prologue, and thus couldn't be
considered for packed form either.

On a 6.5 MB DLL with 110 KB pdata and 166 KB xdata, this gets rid of
38 KB pdata and 62 KB xdata.

Differential Revision: https://reviews.llvm.org/D88641
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/powi-windows.ll
The file was modifiedllvm/test/CodeGen/AArch64/win64-nocfi.ll
The file was modifiedllvm/test/CodeGen/AArch64/lrint-conv-win.ll
The file was modifiedllvm/test/CodeGen/AArch64/lrint-conv-fp16-win.ll
The file was modifiedllvm/test/CodeGen/AArch64/win_cst_pool.ll
The file was modifiedllvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll
The file was modifiedllvm/test/CodeGen/AArch64/lround-conv-win.ll
Commit b8ce6a67568ba16683a2b1a5e8ebd28d5d537874 by david.sherwood
[SVE][CodeGen] Add new EVT/MVT getFixedSizeInBits() functions

When we know that a particular type is always going to be fixed
width we have so far been writing code like this:

  getSizeInBits().getFixedSize()

Since we are doing this in quite a few places now it seems to make
sense to add a new helper function that allows us to replace
these calls with a single getFixedSizeInBits() call.

Differential Revision: https://reviews.llvm.org/D88649
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
The file was modifiedllvm/unittests/CodeGen/ScalableVectorMVTsTest.cpp
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAGNodes.h
Commit b0ce9f0f4cff7df243b72e308ec863f012724475 by david.sherwood
[SVE][CodeGen] Fix implicit TypeSize->uint64_t casts in TypePromotion

The TypePromotion pass only operates on scalar types so I've fixed up
all places where we were relying upon the implicit cast from
TypeSize->uint64_t.

Differential Revision: https://reviews.llvm.org/D88575
The file was modifiedllvm/lib/CodeGen/TypePromotion.cpp
Commit 542523a61a21c13e7f244bcf821b0fdeb8c6bb24 by tlively
[WebAssembly] Emulate v128.const efficiently

v128.const was recently implemented in V8, but until it rolls into Chrome
stable, we can't enable it in the WebAssembly backend without breaking origin
trial users. So far we have been lowering build_vectors that would otherwise
have been lowered to v128.const to splats followed by sequences of replace_lane
instructions to initialize each lane individually. That produces large and
inefficient code, so this patch introduces new logic to lower integer vector
constants to a single i64x2.splat where possible, with at most a single
i64x2.replace_lane following it if necessary.

Adapted from a patch authored by @omnisip.

Differential Revision: https://reviews.llvm.org/D88591
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-build-vector.ll
Commit bc18d8d9b705d31a94c51900c8b18e4feaf9c7fb by sam.mccall
[clangd] Drop dependence on standard library in check.test
The file was modifiedclang-tools-extra/clangd/test/check.test
Commit bfd7ee92ccec2904d98b20b475f48addadc4ec5f by tpopp
Handle unused variable without asserts
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertSkips.cpp