SuccessChanges

Summary

  1. [llvm-install-name-tool] Add -delete_all_rpaths option (details)
  2. [AMDGPU] Use lowercase for subtarget feature names in RUN lines (details)
  3. [Test] Use generated auto-checks to make further changes more visible (details)
  4. [InstCombine] Support uniform vector splats in ((((X >> C) & CC) + Y) << C) folds. (details)
  5. [X86] Convert integer _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506) (details)
  6. [SCEV] BuildConstantFromSCEV(): properly handle SCEVZeroExtend from ptr (details)
  7. Add expected response time and escalation path to the security docs (details)
  8. [AMDGPU] v_mac_legacy_f32 does not support DPP (details)
  9. [SCEV] BuildConstantFromSCEV(): properly handle SCEVSignExtend from ptr (details)
Commit 61133e0b1110d03e35d0acc9ccfda2b6d9fb03cd by alexshap
[llvm-install-name-tool] Add -delete_all_rpaths option

This diff adds an option to remove all rpaths from a Mach-O binary.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D88674
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/install-name-tool-delete-rpath.test
The file was modifiedllvm/tools/llvm-objcopy/CopyConfig.h
The file was modifiedllvm/docs/CommandGuide/llvm-install-name-tool.rst
The file was modifiedllvm/tools/llvm-objcopy/InstallNameToolOpts.td
The file was modifiedllvm/tools/llvm-objcopy/CopyConfig.cpp
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp
Commit acd0dd3a62d1a05bdc97d03a8a73326f7acb7c91 by jay.foad
[AMDGPU] Use lowercase for subtarget feature names in RUN lines
The file was modifiedllvm/test/CodeGen/AMDGPU/amdpal-elf.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/basic-branch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/regbank-reassign-wave64.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/v_cndmask.ll
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_err.s
The file was modifiedllvm/test/CodeGen/AMDGPU/hsa.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vcmpx-exec-war-hazard.mir
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_dpp16.s
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_dpp8.s
The file was modifiedllvm/test/MC/AMDGPU/wave_any.s
The file was modifiedllvm/test/MC/AMDGPU/vop3-literal.s
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_all.s
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp16.txt
The file was modifiedllvm/test/MC/AMDGPU/expressions-gfx10.s
The file was modifiedllvm/test/MC/AMDGPU/hsa-gfx10.s
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp8.txt
The file was modifiedllvm/test/MC/AMDGPU/gfx10_unsupported.s
The file was modifiedllvm/test/MC/AMDGPU/hsa-wave-size.s
The file was modifiedllvm/test/MC/AMDGPU/hsa_isa_version_attrs.s
Commit 06a5e2f307891de2073f03fe3a1113384d1cccea by mkazantsev
[Test] Use generated auto-checks to make further changes more visible
The file was modifiedllvm/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll
Commit 5df61724a171710570f37938eb229401fa0176c7 by llvm-dev
[InstCombine] Support uniform vector splats in ((((X >> C) & CC) + Y) << C) folds.

Add support for uniform vector splats (no undefs).
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/pr19420.ll
Commit 6c23cbc5603cf0011f8d57b0354954aeca695daf by llvm-dev
[X86] Convert integer _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

Emit the equivalent integer reduction intrinsics in IR instead of expanding to shuffle+arithmetic sequences.

The fadd/fmul reductions might be trickier as they assume a similar bisection reduction while the generic intrinsics assume a sequential reduction (intel docs are ambiguous on the correct approach) - I'm not sure if we want to always tag them with reassoc? Anyway, that issue can wait until a separate fp patch along with the fmin/fmax reductions.

Differential Revision: https://reviews.llvm.org/D87604
The file was modifiedclang/test/CodeGen/X86/avx512-reduceIntrin.c
The file was modifiedclang/include/clang/Basic/BuiltinsX86.def
The file was modifiedclang/lib/Headers/avx512fintrin.h
The file was modifiedclang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit 7324616660fc0995fa8c166e3c392361222d5dbc by lebedev.ri
[SCEV] BuildConstantFromSCEV(): properly handle SCEVZeroExtend from ptr

As being reported in https://reviews.llvm.org/D88806#2326944,
this is pretty much the sibling problem of https://reviews.llvm.org/D88806#2325340,
with root cause being that SCEV now models `ptrtoint` as trunc/zext/self of unknown.

The appropriate (currently crashing) test coverage added.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/ScalarEvolution/ptrtoint-constantexpr-loop.ll
Commit 05ef552e5660d05cb6cd730c734e709d8323fd6f by kristof.beyls
Add expected response time and escalation path to the security docs

Following up on the discussion within the group during the roundtable at
the 2020 LLVM Developers Meeting, this commit adds to the security docs:

* How long we expect acknowledging security reports will take
* The escalation path the reporter can follow if they get no response

A temporary line inviting reporters to directly follow the escalation
path while the mailing list is being setup is also added.

Differential Revision: https://reviews.llvm.org/D89068
The file was modifiedllvm/docs/Security.rst
Commit cdf0214845a1230d424bfdab0bafa9c484aa34e0 by jay.foad
[AMDGPU] v_mac_legacy_f32 does not support DPP

Differential Revision: https://reviews.llvm.org/D89245
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/test/MC/AMDGPU/gfx10_unsupported.s
Commit aaafe350bb65dfc24c2cdad4839059ac81899fbe by lebedev.ri
[SCEV] BuildConstantFromSCEV(): properly handle SCEVSignExtend from ptr

Much similar to the ZExt/Trunc handling.
Thanks goes to Alexander Richardson for nudging towards noticing this one proactively.

The appropriate (currently crashing) test coverage added.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/ScalarEvolution/ptrtoint-constantexpr-loop.ll