SuccessChanges

Summary

  1. [NFC] Correct name of profile function to Profile in APValue (details)
  2. [Statepoints] Unlimited tied operands. (details)
  3. [AMDGPU] Add objdump invalid metadata testcase (details)
  4. [lldb] Explicitly test the template argument SB API (details)
  5. [CodeGen][X86] Emit fshl/fshr ir intrinsics for shiftleft128/shiftright128 ms intrinsics (details)
  6. [AggressiveInstCombine] foldAnyOrAllBitsSet - add uniform vector tests (details)
  7. [AggressiveInstCombine] foldAnyOrAllBitsSet - add uniform vector support (details)
  8. [DebugInstrRef] Support recording of instruction reference substitutions (details)
  9. Fix unused variable warning when compiling with asserts disabled. (details)
  10. [flang] Fix build with BUILD_SHARED_LIBS=ON and FLANG_BUILD_NEW_DRIVER=ON (details)
Commit 53122ce2b39f5fb52c7a5933cc4cf32aad43568f by tyker
[NFC] Correct name of profile function to Profile in APValue

Capitalize the profile function of APValue such that it can be used by FoldingSetNodeID

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D88643
The file was modifiedclang/include/clang/AST/APValue.h
The file was modifiedclang/lib/AST/APValue.cpp
Commit 8c2b69d53a3234b24003929235cd2b4de62240dd by dantrushin
[Statepoints] Unlimited tied operands.

Current limit on amount of tied operands (15) sometimes is too low
for statepoint. We may get couple dozens of gc pointer operands on
statepoint.
Review D87154 changed format of statepoint to list every gc pointer
only once, which makes it trivial to find tiedness relation between
statepoint operands: defs are mapped 1-1 to gc pointer operands passed
on registers.

Reviewed By: skatkov

Differential Revision: https://reviews.llvm.org/D87915
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
Commit 0ff4bc38ab088e75d15c4f1b76be67a9a64e8bae by sebastian.neubauer
[AMDGPU] Add objdump invalid metadata testcase

Checks that metadata and invalid message are printed.

Differential Revision: https://reviews.llvm.org/D89375
The file was addedllvm/test/tools/llvm-readobj/ELF/note-amdgpu-invalid.s
Commit 82ed18601dbc816e1f64407a926602f95bbeda32 by Raphael Isemann
[lldb] Explicitly test the template argument SB API
The file was addedlldb/test/API/lang/cpp/template-arguments/main.cpp
The file was addedlldb/test/API/lang/cpp/template-arguments/Makefile
The file was addedlldb/test/API/lang/cpp/template-arguments/TestCppTemplateArguments.py
Commit d7fa9030d47fa62ad443717f4d1c8da4096a1d6c by llvm-dev
[CodeGen][X86] Emit fshl/fshr ir intrinsics for shiftleft128/shiftright128 ms intrinsics

Now that funnel shift handling is pretty good, we can use the intrinsics directly and avoid a lot of zext/trunc issues.

https://godbolt.org/z/YqhnnM

Differential Revision: https://reviews.llvm.org/D89405
The file was modifiedclang/test/CodeGen/X86/ms-x86-intrinsics.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit 196bee9648a9b6f395c524b01be22898e7c3df33 by llvm-dev
[AggressiveInstCombine] foldAnyOrAllBitsSet - add uniform vector tests
The file was modifiedllvm/test/Transforms/AggressiveInstCombine/masked-cmp.ll
Commit fadd152317598aa71538948613ce24b094c5c7c2 by llvm-dev
[AggressiveInstCombine] foldAnyOrAllBitsSet - add uniform vector support

Replace m_ConstantInt with m_APInt to support uniform vectors (with no undef elements)

Adding non-undef support would involve some refactoring of the MaskOps struct but this might still be worth it.
The file was modifiedllvm/test/Transforms/AggressiveInstCombine/masked-cmp.ll
The file was modifiedllvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
Commit c521e44defb53d38a46f39e29870c628f25d124a by jeremy.morse
[DebugInstrRef] Support recording of instruction reference substitutions

Add a table recording "substitutions" between pairs of <instruction,
operand> numbers, from old pairs to new pairs. Post-isel optimizations are
able to record the outcome of an optimization in this way. For example, if
there were a divide instruction that generated the quotient and remainder,
and it were replaced by one that only generated the quotient:

  $rax, $rcx = DIV-AND-REMAINDER $rdx, $rsi, debug-instr-num 1
  DBG_INSTR_REF 1, 0
  DBG_INSTR_REF 1, 1

Became:

  $rax = DIV $rdx, $rsi, debug-instr-num 2
  DBG_INSTR_REF 1, 0
  DBG_INSTR_REF 1, 1

We could enter a substitution from <1, 0> to <2, 0>, and no substitution
for <1, 1> as it's no longer generated.

This approach means that if an instruction or value is deleted once we've
left SSA form, all variables that used the value implicitly become
"optimized out", something that isn't true of the current DBG_VALUE
approach.

Differential Revision: https://reviews.llvm.org/D85749
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was addedllvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
The file was modifiedllvm/include/llvm/CodeGen/MachineFunction.h
The file was modifiedllvm/include/llvm/CodeGen/MIRYamlMapping.h
The file was modifiedllvm/lib/CodeGen/MIRParser/MIRParser.cpp
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp
Commit ead2aa7098cfd693ed1842a88346ba67cfccd7df by akuegel
Fix unused variable warning when compiling with asserts disabled.

Differential Revision: https://reviews.llvm.org/D89454
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp
Commit 50df5f24dc333e912f6eb8500ef84e648d43af93 by sguelton
[flang] Fix build with BUILD_SHARED_LIBS=ON and FLANG_BUILD_NEW_DRIVER=ON

As usual, it's difficult to handle all different configuration in the first row,
but this one has been extensively tested

Differential Revision: https://reviews.llvm.org/D89452
The file was modifiedflang/unittests/Runtime/CMakeLists.txt
The file was modifiedflang/lib/Evaluate/CMakeLists.txt
The file was modifiedflang/unittests/Evaluate/CMakeLists.txt
The file was modifiedflang/unittests/Frontend/CMakeLists.txt