FailedChanges

Summary

  1. [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks (details)
  2. [ARM] FP16 bitcast test. NFC (details)
  3. [ARM,MVE] Remove 64-bit variants of vbrsrq* intrinsics (details)
  4. Fix TryParsePtrOperatorSeq. (details)
  5. [RDA][ARM][LowOverheadLoops] Iteration count IT blocks (details)
  6. [AArch64][SVE] Add the SVE dupq_lane intrinsic (details)
  7. [MIR][ARM] MachineOperand comments (details)
  8. [CostModel][X86] We don't need a scale factor for SLM extract costs (details)
  9. add release notes for ffp-model and ffp-exception-behavior (details)
  10. [AIX][Frontend] C++ ABI customizations for AIX boilerplate (details)
  11. [OpenMP] Refactor the analysis in checkMapClauseBaseExpression using StmtVisitor class. (details)
  12. [libc++] Implementation of C++20's P1135R6 for libcxx (details)
  13. [libc++] Adapt a few things around the implementation of P1135R6 (details)
  14. [libc++] Mark the C++03 version of std::function as deprecated (details)
  15. [lldb/DWARF] Fix dwp search path in the separate-debug-file case (details)
  16. [PowerPC][AIX] Spill/restore the callee-saved condition register bits. (details)
  17. [X86] getTargetShuffleInputs - check that the source inputs are all the right size. (details)
  18. [gn build] (manually) merge 54fa9ecd308 (details)
  19. [libc++] Fix CI and Linux failures after landing D68480 (details)
  20. [gn build] remove -std=c++11 in libcxx build pending discussion in 80e73f2 review thread (details)
  21. Revert "Rework go bindings so that validation works fine" (details)
  22. [NFC] Fix typo in error message (details)
  23. [libc++] Drop redundant check for -std=c++14 (details)
  24. [ReleaseNotes] Mention the `vector-function-abi-variant` attribute. (details)
  25. [CMake] Default to static linking for subprojects. (details)
  26. [XCOFF][AIX] Fix incorrect alignment for function descriptor csect (details)
  27. [AVR] Use correct register class for mul instructions (details)
  28. [AVR] Don't assert on an undefined operand (details)
  29. [X86] combineX86ShuffleChain - select X86ISD::FAND/ISD::AND based on MaskVT (details)
  30. [AVR] Disassemble register operands (details)
  31. [bindings/go] Add RemoveFromParentAsInstruction (details)
  32. [MachO] Add cpu(sub)type tests and improve error handling (details)
  33. [SelectionDAG] Merge constant SDNode arithmetic into foldConstantArithmetic (details)
  34. [LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints (details)
  35. [mlir][spirv] NFC: Move test passes to test/lib (details)
  36. [libc++] Give headers that require C++14 a cplusplus14 requires in the modulemap (details)
  37. [AMDGPU] use llvm_unreachable instead of default for rp set (details)
  38. [X86] Add back fmaddsub intrinsics to work towards fixing the strict fp implementation (details)
  39. [MLIR] NFC - Fix indentation in examples in LoopOps.td (details)
  40. [ms] [llvm-ml] Improve data support, adding names and complex initializers. (details)
  41. [lldb/Debugger] Remove macros formerly used by property definitions (details)
  42. [lldb] Color the current PC marker (details)
  43. Revert "[ms] [llvm-ml] Improve data support, adding names and complex initializers." (details)
  44. [Hexagon] Lower bitcast of a vector predicate (details)
  45. [MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faster MV, NFC (details)
  46. Reland "[ms] [llvm-ml] Improve data support, adding names and complex initializers." (details)
  47. [Hexagon] Lower vector predicate store (details)
  48. [lldb/Test] Update TestDisassemblyFormat for new format (details)
  49. Add methods to data extractor for extracting bytes and fixed length C strings. (details)
  50. Validate argument passed to __builtin_frame_address and __builtin_return_address (details)
  51. [NFC] [DA] Refactoring getIndexExpressionsFromGEP (details)
  52. Revert "Validate argument passed to __builtin_frame_address and __builtin_return_address" (details)
  53. [lldb/Plugins] Move SBTarget::GetExtendedCrashInformation to SBProcess (details)
  54. [libc] [UnitTest] Create death tests (details)
  55. AMDGPU/GlobalISel: Lower 64-bit uaddo/usubo (details)
  56. [LegalizeTypes] Scalarize non-byte sized loads in WidenRecRes_Load and SplitVecResLoad (details)
  57. [lldb] Color the line marker (details)
  58. [docs] dump_ast_matchers strips internal::(Bindable)?Matcher from Result_type (details)
  59. Unwind past an interrupt handler correctly on arm or at pc==0 (details)
  60. [arcconfig] Default base to previous revision (details)
  61. [arcconfig] Delete subproject arcconfigs (details)
  62. Adjust max_align_t handling (details)
  63. Prefer PATH_MAX to MAXPATHLEN (details)
  64. [MLIR] Add std.atomic_rmw op (details)
  65. [polly] Don't count scops in a global variable. (details)
  66. My prevous commit to RegisterContextLLDB is causing a test fail (details)
  67. [AArch64] SVE implies fullfp16 (details)
  68. [NFC] Cleaned up ASTMatchersInternal Code (details)
  69. GlobalISel: Reimplement fewerElementsVectorBasic (details)
  70. AMDGPU/GlobalISel: Fix incorrect VOP3P fneg folding (details)
  71. [DebugInfo]: Refactored Macinfo section consumption part to allow future (details)
  72. Allow "callbr" to return non-void values (details)
  73. Support output constraints on "asm goto" (details)
  74. [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV, NFC (details)
  75. Revert "My prevous commit to RegisterContextLLDB is causing a test fail" (details)
  76. Revert "Unwind past an interrupt handler correctly on arm or at pc==0" (details)
  77. AMDGPU/GlobalISel: Introduce post-legalize combiner (details)
  78. GlobalISel: Remove unneeded initialiation (details)
  79. [Attributor] Use AssumptionCache in AANonNullFloating::initialize (details)
  80. [lldb/Utility] Fix unspecified behavior. (details)
  81. [Sparc][NFC] Remove trailing space (details)
  82. [lldb] Mark ObjectFileBreakpad test inputs as non-text (details)
  83. [lldb] Fix that a crashing test is marked as unsupported when it prints UNSUPPORTED before crashing (details)
  84. [ASTMatchers] Matcher macros with params move params instead of copying (details)
  85. [ASTMatchers] Adds a matcher called `hasAnyOperatorName` (details)
  86. [X86] Remove mask output from X86 gather/scatter ISD opcodes. (details)
  87. [X86] Pass parameters into selectVectorAddr to remove dependency on X86MaskedGatherScatterSDNode. (details)
  88. [libc] [UnitTest] Give UnitTest gtest like colors (details)
  89. [lldb][NFC] Make ArrayRef initialization more obvious in lldb-test.cpp (details)
  90. [lldb] s/CHECK-NEXT/CHECK-DAG in dwp-debug-types.s (details)
  91. [NFC][PowerPC] Add a new test case scalar_cmp.ll (details)
  92. [lldb][NFC] Move namespace lookup in ClangASTSource to own function. (details)
  93. libclc: cmake configure should depend on file list (details)
  94. AMDGPU/GlobalISel: add legalize tests for s64 max/min (details)
  95. GlobalISel: NFC minor cleanup to avoid a couple of fixed size local arrays (details)
  96. [profile] gcov_mutex must be static (details)
  97. Add llvm-cov to LLVM_TOOLCHAIN_TOOLS (details)
  98. [DebugInfo] Fix printing CIE offsets in EH FDEs. (details)
  99. [analyzer][MallocChecker][NFC] Communicate the allocation family to auxiliary functions with parameters (details)
  100. [AArch64][SVE] Add predicate reinterpret intrinsics (details)
  101. [yaml2obj] - Address post commit comments for D74764 (details)
  102. [MLIR][GPU] Implement a simple greedy loop mapper. (details)
  103. Don't generate libcalls for wide shift on Windows ARM (PR42711) (details)
  104. [mlir] Generalize intrinsic builders in the LLVM dialect definition (details)
  105. [mlir] Intrinsics generator: use TableGen-defined builder function (details)
  106. [mlir] simplify affine maps and operands in affine.min/max (details)
  107. [lldb][NFC] Modernize logging in ClangASTSource/ExpressionDeclMap (details)
  108. [AArch64][SVE] Update names and comments for gathers/scatters (NFC) (details)
  109. [MLIR][GPU] Fix forward declaration of Region class. (details)
  110. build_llvm_package.bat: Produce zip files in addition to the installers (details)
  111. [clangd] Disable ExtractVariable for C (details)
  112. [lldb][NFC] Move NameSearchContext to own header/source files (details)
  113. [lldb][NFC] Make NameSearchContext::m_found members bools instead of bitfields (details)
  114. Remove myself from CODE_OWNERS. (details)
  115. [gn build] (manually) merge fee41517fe0f (details)
  116. [lldb] Initialize NameSearchContext::m_namespace_map in constructor (details)
  117. [lldb][NFC] Move filling namespace map in ClangASTSource to own function (details)
  118. [debuginfo-tests] Warn, not error, if we can't delete working directory (details)
  119. [mlir] NFC: move AffineOps tests from test/ to test/Dialect (details)
  120. [MLIR][GPU] Properly model step in parallel loop to gpu conversion. (details)
  121. [DSE,MSSA] Do not attempt to remove un-removable memdefs. (details)
  122. [VectorCombine] make cost calc consistent for binops and cmps (details)
  123. [VectorCombine] add tests for possible extract->shuffle; NFC (details)
  124. [ASTImporter] Improved variable template redecl chain handling. (details)
  125. [Analyzer] Fix for iterator modeling and checkers: handle negative numbers correctly (details)
  126. [PhaseOrdering] add test for missing vector/CSE transforms (PR45015); NFC (details)
  127. [CodeGen] fix clang test that runs the optimizer pipeline; NFC (details)
  128. [mlir] NFC: update documentation in ConvertLinalgToLLVM (details)
  129. [RISCV] Fix sysroot tests without GCC on RISC-V hosts with GCC (details)
  130. Fix DfaEmitter::visitDfaState() crash in MSVC x86 debug builds (PR44945) (details)
  131. [clang-format]  Wrap lines for C# property accessors (details)
  132. [OpenMP][cmake] ignore warning on unknown CUDA version (details)
  133. Stop including sys/param.h from Unix.h (details)
  134. [clangd] Migrate Lexer usages in TypeHierarchy to TokenBuffers (details)
  135. [analyzer][MallocChecker][NFC] Change the use of IdentifierInfo* to CallDescription (details)
  136. clang-cl: Add a `/showIncludes:user` flag. (details)
  137. [AMDGPU] Precommit some test updates for D68338 "Remove dubious logic in bidirectional list scheduler" (details)
  138. Make test not write to the source directory (details)
  139. [NFC][InstCombine] Add shift amount reassociation miscompile example from PR44802 (details)
  140. [InstCombine] reassociateShiftAmtsOfTwoSameDirectionShifts(): fix miscompile (PR44802) (details)
  141. [NFC][InstCombine] Add shift amount reassociation in bittest miscompile example from PR44802 (details)
  142. [InstCombine] foldShiftIntoShiftInAnotherHandOfAndInICmp(): fix miscompile (PR44802) (details)
  143. [LLDB] Let DataExtractor deal with two-byte addresses (details)
  144. [DWARFDebugLine] Avoid dumping prologue members we did not parse (details)
  145. [analyzer] Add support for CXXInheritedCtorInitExpr. (details)
  146. [clang-rename] Add the USR of incomplete decl to the USRSet. (details)
  147. [ELF] Support archive:file syntax in input section descriptions (details)
  148. AMDGPU/GlobalISel: Legalize s64 min/max by lowering (details)
  149. Make builtbot happy. (details)
  150. [Sema][C++] Propagate conversion kind to specialize the diagnostics (details)
  151. [remark][diagnostics] [codegen] Fix PR44896 (details)
  152. AMDGPU/GlobalISel: Use packed for G_ADD/G_SUB/G_MUL v2s16 (details)
  153. [libc++] Proper fix for libc++'s modulemap after D68480 (details)
  154. [libc++] Revert 03dd205c151 "Adjust max_align_t handling" (details)
  155. AMDGPU/GlobalISel: Un-XFAIL a test (details)
  156. Revert "[DWARFDebugLine] Avoid dumping prologue members we did not parse" (details)
  157. Revert "[LICM] Support hosting of dynamic allocas out of loops" (details)
  158. [libc++] Remove incorrect XFAIL in modules test (details)
  159. [NFC][Codegen] Add miscompile test for constant store merging from PR43446 (details)
  160. [Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile (details)
  161. [PowerPC][NFC] Remove comments mentioning Darwin and VRSAVE from lit test. (details)
  162. [MachineInstr] Add a dumpr method (details)
  163. [X86MCTargetDesc.h] Speculative fix for macro collision with sys/param.h (details)
  164. Make __builtin_amdgcn_dispatch_ptr dereferenceable and align at 4 (details)
  165. Emit register names in cfi assembly directives (details)
  166. Support emitting .cfi_undefined in CodeGen (details)
  167. [AMDGPU] Implement wave64 DWARF register mapping (details)
Commit eaa41e103c568a3f97039fe64c89baa7e9b085ca by llvm-dev
[CostModel][X86] Try to check against common prefixes before using target-specific cpu checks

SLM/GLM is still a mess so not all of them have been updated yet.
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-overflow.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/extend.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-transpose.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/uitofp.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-fix.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fshl.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-two-src.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/vector-insert.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/div.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-single-src.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fshr.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/arith.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-fp.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/sitofp.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fptosi.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-usat.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fround.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fptoui.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/trunc.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/alternate-shuffle-cost.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/vector-extract.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-reverse.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/icmp.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-ssat.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fcmp.ll (diff)
Commit f287bb8cf5e48a22b5d1be47da803f73c5aa8186 by david.green
[ARM] FP16 bitcast test. NFC
The file was addedllvm/test/CodeGen/ARM/fp16-bitcast.ll
Commit 12fed51c0807b0727f9eecdd3dcf774a82fa7ecd by mikhail.maltsev
[ARM,MVE] Remove 64-bit variants of vbrsrq* intrinsics

Summary:
According to the ACLE the vbrsrq* intrinsics don't accept vectors
with 64-bit elements (and neither does the corresponding VBRSR
instruction).

Reviewers: simon_tatham, dmgreen, MarkMurrayARM, ostannard

Reviewed By: simon_tatham

Subscribers: kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75038
The file was modifiedclang/include/clang/Basic/arm_mve.td (diff)
Commit bd5b22070b6984d89c13b6cf38c3e54fc98ce291 by aaron
Fix TryParsePtrOperatorSeq.

The syntax rules for ptr-operator allow attributes after *, &,
&&, therefore we should be able to parse the following:

void fn() {
    void (*[[attr]] x)() = &fn;
    void (&[[attr]] y)() = fn;
    void (&&[[attr]] z)() = fn;
}
However the current logic in TryParsePtrOperatorSeq does not consider
the presence of attributes leading to unexpected parsing errors.

Moreover we should also consider _Atomic a possible qualifier that can
appear after the sequence of attribute specifiers.
The file was modifiedclang/lib/Parse/ParseTentative.cpp (diff)
The file was modifiedclang/test/CXX/dcl.decl/p4-0x.cpp (diff)
The file was modifiedclang/include/clang/Parse/Parser.h (diff)
The file was modifiedclang/test/Parser/cxx-attributes.cpp (diff)
The file was modifiedclang/test/Parser/cxx-ambig-decl-expr.cpp (diff)
Commit a67eb221e2281350eeab5dd4b9119895c500674c by sam.parker
[RDA][ARM][LowOverheadLoops] Iteration count IT blocks

Change the way that we remove the redundant iteration count code in
the presence of IT blocks. collectLocalKilledOperands has been
introduced to scan an instructions operands, collecting the killed
instructions and then visiting them too. This is used to delete the
code in the preheader which calculates the iteration count. We also
track any IT blocks within the preheader and, if we remove all the
instructions from the IT block, we also remove the IT instruction.
isSafeToRemove is used to remove any redundant uses of the iteration
count within the loop body.

Differential Revision: https://reviews.llvm.org/D74975
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-mov.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-chain.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-itercount.mir (diff)
The file was modifiedllvm/include/llvm/CodeGen/ReachingDefAnalysis.h (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-random.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-ignore-vctp.mir (diff)
The file was modifiedllvm/lib/CodeGen/ReachingDefAnalysis.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp (diff)
Commit f87f23c81caeb0b0b7b8e795023b7273a13115d2 by kerry.mclaughlin
[AArch64][SVE] Add the SVE dupq_lane intrinsic

Summary:
Implements the @llvm.aarch64.sve.dupq.lane intrinsic.

As specified in the ACLE, the behaviour of:
  svdupq_lane_u64(data, index)

...is identical to:
  svtbl(data, svadd_x(svptrue_b64(),
                      svand_x(svptrue_b64(), svindex_u64(0, 1), 1),
                      index * 2))

If the index is in the range [0,3], the operation is equivalent
to a single DUP (.q) instruction.

Reviewers: sdesmalen, c-rhodes, cameron.mcinally, efriedma, dancgr, rengolin

Reviewed By: sdesmalen

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74734
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll (diff)
Commit 7efabe5c7de46fe190638741c6ee81ae13255e38 by sjoerd.meijer
[MIR][ARM] MachineOperand comments

This adds infrastructure to print and parse MIR MachineOperand comments.
The motivation for the ARM backend is to print condition code names instead of
magic constants that are difficult to read (for human beings). For example,
instead of this:

  dead renamable $r2, $cpsr = tEOR killed renamable $r2, renamable $r1, 14, $noreg
  t2Bcc %bb.4, 0, killed $cpsr

we now print this:

  dead renamable $r2, $cpsr = tEOR killed renamable $r2, renamable $r1, 14 /* CC::always */, $noreg
  t2Bcc %bb.4, 0 /* CC:eq */, killed $cpsr

This shows that MachineOperand comments are enclosed between /* and */. In this
example, the EOR instruction is not conditionally executed (i.e. it is "always
executed"), which is encoded by the 14 immediate machine operand. Thus, now
this machine operand has /* CC::always */ as a comment. The 0 on the next
conditional branch instruction represents the equal condition code, thus now
this operand has /* CC:eq */ as a comment.

As it is a comment, the MI lexer/parser completely ignores it. The benefit is
that this keeps the change in the lexer extremely minimal and no target
specific parsing needs to be done. The changes on the MIPrinter side are also
minimal, as there is only one target hooks that is used to create the machine
operand comments.

Differential Revision: https://reviews.llvm.org/D74306
The file was modifiedllvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-chain.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri12.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-stacksplot.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/constant-islands-cfg.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/ifcvt_triangleSameCvtNext.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-preuse.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-arithmetic-ops.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/skip-debug.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir (diff)
The file was modifiedllvm/test/CodeGen/MIR/ARM/bundled-instructions.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-after-dls.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/regcoal-invalid-subrange-update.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block-2-ins.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/vldm-liveness.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/livereg-no-loop-def.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/size-limit.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-chain.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/while.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/tst-peephole.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp16-reduce.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-globals-ropi-rwpi.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix-debug.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-addsub.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/select-revsh.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/codesize-ifcvt.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/fp16-stacksplot.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpsel-2.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-shifts.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-random.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block-1-ins.mir (diff)
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The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-ctrl-flow.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-operand-liveout.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-3-blocks-kill-vpr.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-select-globals-static.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir (diff)
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.cpp (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpsel-1.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/t2-teq-reduce.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-1.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-br.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/constant-island-movwt.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/load_store_opt_clobber_cpsr.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/t2sizereduction.mir (diff)
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The file was modifiedllvm/test/CodeGen/ARM/peephole-phi.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb/peephole-mi.mir (diff)
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The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-16.mir (diff)
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The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/no-vpsel-liveout.mir (diff)
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The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-select-copy_to_regclass-of-fptosi.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select-cmp.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/non-masked-store.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-non-consecutive-ins.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/tail-dup-bundle.mir (diff)
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The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-ignore-vctp.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-liveout.mir (diff)
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The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-globals-pic.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/multiple-do-loops.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-opcode-liveout.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-add-operand-liveout.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block-fold-vcmp.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-select.mir (diff)
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/out-of-range-cbz.mir (diff)
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The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-2-blocks.mir (diff)
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The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/irtranslator-varargs-lowering.ll (diff)
Commit b82438872b1f88feb393d5651bdfacb89bd2f8fa by llvm-dev
[CostModel][X86] We don't need a scale factor for SLM extract costs

D74976 will handle larger vector types, but since SLM doesn't support AVX+ then we will always be extracting from 128-bit vectors so don't need to scale the cost.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/vector-extract.ll (diff)
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll (diff)
Commit c8dadac228b7dd3a71d5fc25489d1b884a2b0f5e by melanie.blower
add release notes for ffp-model and ffp-exception-behavior
The file was modifiedclang/docs/ReleaseNotes.rst (diff)
Commit 8bee52bdb54a51ccfe1eb6c6ed5077132c2950a1 by Xiangling.Liao
[AIX][Frontend] C++ ABI customizations for AIX boilerplate

This PR enables "XL" C++ ABI in frontend AST to IR codegen. And it is driven by
static init work. The current kind in Clang by default is Generic Itanium, which
has different behavior on static init with IBM xlclang compiler on AIX.

Differential Revision: https://reviews.llvm.org/D74015
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp (diff)
The file was modifiedclang/lib/Basic/Targets/OSTargets.h (diff)
The file was addedclang/test/CodeGen/static-init.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp (diff)
The file was modifiedclang/lib/CodeGen/ItaniumCXXABI.cpp (diff)
The file was modifiedclang/include/clang/Basic/TargetCXXABI.h (diff)
Commit d66d25f83824e2d72e06bf0813cc9e9e564dd74c by a.bataev
[OpenMP] Refactor the analysis in checkMapClauseBaseExpression using StmtVisitor class.

Summary: This step is the preparation of allowing lvalue in map/motion clause.

Reviewers: ABataev, jdoerfert

Reviewed By: ABataev

Subscribers: guansong, cfe-commits

Tags: #clang, #openmp

Differential Revision: https://reviews.llvm.org/D74970
The file was modifiedclang/test/OpenMP/target_messages.cpp (diff)
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp (diff)
Commit 54fa9ecd3088508b05b0c5b5cb52da8a3c188655 by Louis Dionne
[libc++] Implementation of C++20's P1135R6 for libcxx

Differential Revision: https://reviews.llvm.org/D68480
The file was addedlibcxx/test/std/atomics/types.pass.cpp
The file was addedlibcxx/test/std/thread/thread.barrier/arrive_and_wait.pass.cpp
The file was addedlibcxx/test/std/thread/thread.latch/count_down.pass.cpp
The file was addedlibcxx/test/std/thread/thread.latch/max.pass.cpp
The file was addedlibcxx/src/barrier.cpp
The file was addedlibcxx/test/std/thread/thread.barrier/max.pass.cpp
The file was addedlibcxx/test/std/thread/thread.semaphore/timed.pass.cpp
The file was addedlibcxx/include/barrier
The file was addedlibcxx/test/std/thread/thread.barrier/arrive_and_drop.pass.cpp
The file was addedlibcxx/test/std/thread/thread.latch/arrive_and_wait.pass.cpp
The file was addedlibcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait.pass.cpp
The file was addedlibcxx/src/atomic.cpp
The file was modifiedlibcxx/include/__threading_support (diff)
The file was addedlibcxx/include/latch
The file was addedlibcxx/test/std/thread/thread.semaphore/release.pass.cpp
The file was modifiedlibcxx/include/atomic (diff)
The file was addedlibcxx/test/std/thread/thread.semaphore/try_acquire.pass.cpp
The file was addedlibcxx/include/semaphore
The file was addedlibcxx/test/std/thread/thread.semaphore/binary.pass.cpp
The file was addedlibcxx/test/std/thread/thread.semaphore/max.pass.cpp
The file was addedlibcxx/test/std/thread/thread.barrier/arrive.pass.cpp
The file was modifiedlibcxx/test/libcxx/double_include.sh.cpp (diff)
The file was modifiedlibcxx/include/module.modulemap (diff)
The file was addedlibcxx/test/std/thread/thread.barrier/completion.pass.cpp
The file was addedlibcxx/test/std/thread/thread.latch/try_wait.pass.cpp
The file was modifiedlibcxx/www/cxx2a_status.html (diff)
The file was modifiedlibcxx/src/include/apple_availability.h (diff)
The file was modifiedlibcxx/include/CMakeLists.txt (diff)
The file was modifiedlibcxx/src/CMakeLists.txt (diff)
The file was addedlibcxx/test/std/thread/thread.semaphore/version.pass.cpp
The file was addedlibcxx/test/std/thread/thread.semaphore/acquire.pass.cpp
The file was addedlibcxx/test/std/thread/thread.barrier/version.pass.cpp
The file was addedlibcxx/test/std/thread/thread.latch/version.pass.cpp
Commit 80e73f22956c532e581c280a7388cfa87cec98e8 by Louis Dionne
[libc++] Adapt a few things around the implementation of P1135R6

- Add the new symbols to the ABI list on Darwin
- Add XFAIL markup to the tests that require dylib support on older platforms
- Add availability markup for back-deployment
The file was modifiedlibcxx/test/std/thread/thread.barrier/completion.pass.cpp (diff)
The file was modifiedlibcxx/test/std/thread/thread.latch/try_wait.pass.cpp (diff)
The file was modifiedlibcxx/include/atomic (diff)
The file was modifiedlibcxx/test/std/thread/thread.semaphore/timed.pass.cpp (diff)
The file was modifiedlibcxx/test/std/thread/thread.latch/count_down.pass.cpp (diff)
The file was modifiedlibcxx/test/std/thread/thread.semaphore/acquire.pass.cpp (diff)
The file was modifiedlibcxx/include/__config (diff)
The file was modifiedlibcxx/test/std/thread/thread.semaphore/binary.pass.cpp (diff)
The file was modifiedlibcxx/test/std/thread/thread.barrier/arrive_and_drop.pass.cpp (diff)
The file was modifiedlibcxx/lib/abi/x86_64-apple-darwin.v1.abilist (diff)
The file was modifiedlibcxx/test/std/thread/thread.semaphore/try_acquire.pass.cpp (diff)
The file was modifiedlibcxx/include/barrier (diff)
The file was modifiedlibcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait.pass.cpp (diff)
The file was modifiedlibcxx/lib/abi/x86_64-apple-darwin.v2.abilist (diff)
The file was modifiedlibcxx/lib/abi/CHANGELOG.TXT (diff)
The file was modifiedlibcxx/test/std/thread/thread.barrier/arrive.pass.cpp (diff)
The file was modifiedlibcxx/test/std/thread/thread.barrier/arrive_and_wait.pass.cpp (diff)
The file was modifiedlibcxx/test/std/thread/thread.latch/arrive_and_wait.pass.cpp (diff)
The file was modifiedlibcxx/test/std/thread/thread.semaphore/release.pass.cpp (diff)
Commit c0087164175767bd22dc4336f48098c338aa8e7a by Louis Dionne
[libc++] Mark the C++03 version of std::function as deprecated

Summary: We want to eventually remove it.

Reviewers: EricWF

Subscribers: christof, jkorous, dexonsmith, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D74719
The file was modifiedlibcxx/include/__functional_03 (diff)
Commit c9c09ef836b49dba0a6fc784f322a96a86a9b985 by pavel
[lldb/DWARF] Fix dwp search path in the separate-debug-file case

The convention is that the dwp file name is derived from the name of the
file holding the executable code, even if the linked portion of the
debug info is elsewhere (objcopy --only-keep-debug).
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp (diff)
The file was modifiedlldb/test/CMakeLists.txt (diff)
The file was addedlldb/test/Shell/SymbolFile/DWARF/dwp-separate-debug-file.cpp
The file was modifiedlldb/test/Shell/helper/toolchain.py (diff)
Commit 8efc2f5723b0892d0518bdac441c674b7d850ac6 by sd.fertile
[PowerPC][AIX] Spill/restore the callee-saved condition register bits.

Extends the existing support for spilling and restoring the condition
register to the linkage area for 32-bit targets, and enables for AIX.

Differential Revision: https://reviews.llvm.org/D74349
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-crsave.mir (diff)
The file was addedllvm/test/CodeGen/PowerPC/alloca-crspill.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.cpp (diff)
The file was addedllvm/test/CodeGen/PowerPC/aix32-crsave.mir
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.h (diff)
The file was addedllvm/test/CodeGen/PowerPC/aix-crspill.ll
The file was removedllvm/test/CodeGen/PowerPC/ppc64-alloca-crspill.ll
Commit 59d8d13c7ba3e7bc06afcb20ed535523c1ed47ce by llvm-dev
[X86] getTargetShuffleInputs - check that the source inputs are all the right size.

I'm hoping to begin improving shuffle combining across different vector sizes, but before that we must ensure that all existing getTargetShuffleInputs calls must bail if the inputs aren't the same size.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit 406a54b65fff66719778d122294edc50efdddb43 by thakis
[gn build] (manually) merge 54fa9ecd308
The file was modifiedllvm/utils/gn/secondary/libcxx/src/BUILD.gn (diff)
Commit b21405d1cd088d7d7088479861fabd55f998bf6b by Louis Dionne
[libc++] Fix CI and Linux failures after landing D68480

- Avoid using C++11-and-later features in <atomic>:
  Historically, we've supported <atomic> in C++03, so we can't use C++11
  features in that header. This is something we really need to change,
  since our implementation of <atomic> is starting to accumulate technical
  debt because of that.
- Mark a test as unsupported on single threaded systems
- Add missing symbols to the Linux ABI list
The file was modifiedlibcxx/include/__threading_support (diff)
The file was modifiedlibcxx/include/atomic (diff)
The file was modifiedlibcxx/test/std/atomics/types.pass.cpp (diff)
The file was modifiedlibcxx/lib/abi/x86_64-unknown-linux-gnu.v1.abilist (diff)
Commit 453d54865aaeb029599aae59eb89cd6049c25ea3 by thakis
[gn build] remove -std=c++11 in libcxx build pending discussion in 80e73f2 review thread
The file was modifiedllvm/utils/gn/secondary/libcxx/src/BUILD.gn (diff)
Commit 0414c5694073de26fd33a0276c47c6adea5284cf by peter
Revert "Rework go bindings so that validation works fine"

And add llvm-go back to the test dependencies.

No longer necessary now that llvm-go has been brought back.

This reverts commit e8f8873da5eaad187f82dad78ebdb3ab3df22b36.
The file was removedllvm/bindings/go/src/llvm/InstrumentationBindings.cpp
The file was removedllvm/bindings/go/src/llvm/llvm_dep.go
The file was addedllvm/bindings/go/llvm/InstrumentationBindings.cpp
The file was removedllvm/bindings/go/src/llvm/transforms_ipo.go
The file was modifiedllvm/test/lit.cfg.py (diff)
The file was addedllvm/bindings/go/llvm/support.go
The file was removedllvm/bindings/go/src/llvm/ir.go
The file was removedllvm/bindings/go/src/llvm/transforms_instrumentation.go
The file was addedllvm/bindings/go/llvm/IRBindings.cpp
The file was addedllvm/bindings/go/llvm/transforms_pmbuilder.go
The file was removedllvm/bindings/go/src/llvm/InstrumentationBindings.h
The file was removedllvm/bindings/go/src/llvm/IRBindings.cpp
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The file was addedllvm/bindings/go/llvm/analysis.go
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The file was addedllvm/bindings/go/llvm/executionengine.go
The file was removedllvm/bindings/go/src/llvm/executionengine_test.go
The file was addedllvm/bindings/go/llvm/dibuilder.go
The file was removedllvm/bindings/go/src/llvm/executionengine.go
The file was addedllvm/bindings/go/llvm/transforms_scalar.go
The file was addedllvm/bindings/go/build.sh
The file was removedllvm/bindings/go/src/llvm/ir_test.go
The file was addedllvm/bindings/go/llvm/transforms_ipo.go
The file was removedllvm/bindings/go/src/llvm/SupportBindings.cpp
The file was removedllvm/bindings/go/src/llvm/dibuilder.go
The file was modifiedllvm/utils/lit/lit/llvm/subst.py (diff)
The file was addedllvm/bindings/go/llvm/ir_test.go
The file was removedllvm/bindings/go/src/llvm/linker.go
The file was addedllvm/bindings/go/llvm/llvm_config.go.in
The file was removedllvm/bindings/go/src/llvm/transforms_scalar.go
The file was addedllvm/bindings/go/llvm/InstrumentationBindings.h
The file was addedllvm/bindings/go/llvm/executionengine_test.go
The file was removedllvm/bindings/go/src/llvm/support.go
The file was removedllvm/bindings/go/src/llvm/target.go
The file was removedllvm/bindings/go/src/llvm/bitwriter.go
The file was addedllvm/bindings/go/llvm/target.go
The file was addedllvm/bindings/go/llvm/version.go
The file was removedllvm/bindings/go/src/llvm/string_test.go
The file was addedllvm/bindings/go/llvm/linker.go
The file was removedllvm/bindings/go/src/llvm/transforms_pmbuilder.go
The file was removedllvm/bindings/go/src/llvm/string.go
The file was addedllvm/bindings/go/llvm/llvm_dep.go
The file was modifiedllvm/test/CMakeLists.txt (diff)
The file was removedllvm/bindings/go/src/llvm/transforms_coroutines.go
The file was addedllvm/bindings/go/llvm/bitwriter.go
The file was addedllvm/bindings/go/llvm/ir.go
The file was addedllvm/bindings/go/llvm/IRBindings.h
The file was addedllvm/bindings/go/llvm/SupportBindings.h
The file was addedllvm/bindings/go/llvm/string.go
The file was removedllvm/bindings/go/src/llvm/IRBindings.h
The file was addedllvm/bindings/go/llvm/SupportBindings.cpp
The file was removedllvm/bindings/go/src/llvm/version.go
The file was modifiedllvm/test/Bindings/Go/lit.local.cfg (diff)
The file was removedllvm/bindings/go/src/llvm/analysis.go
The file was removedllvm/bindings/go/src/llvm/llvm_config.go.in
The file was addedllvm/bindings/go/llvm/bitreader.go
The file was removedllvm/bindings/go/src/llvm/SupportBindings.h
The file was removedllvm/bindings/go/src/llvm/bitreader.go
The file was addedllvm/bindings/go/llvm/transforms_coroutines.go
The file was modifiedllvm/test/Bindings/Go/go.test (diff)
Commit 400b6c083f846d51067fd72ed388485e1817c238 by sguelton
[NFC] Fix typo in error message
The file was modifiedllvm/lib/Object/COFFObjectFile.cpp (diff)
Commit a3d58fcc034848d751f031e7d3ddfe8cf9b8e06e by Louis Dionne
[libc++] Drop redundant check for -std=c++14

We always build all components of libc++ with -std=c++14 anyway
The file was modifiedlibcxx/src/CMakeLists.txt (diff)
Commit 3d65dd1e668ee681814f83e1423e4bee5d17ffb5 by francesco.petrogalli
[ReleaseNotes] Mention the `vector-function-abi-variant` attribute.

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74969
The file was modifiedllvm/docs/ReleaseNotes.rst (diff)
Commit 6369b9bf31188bdd472299252deb6db3f650864b by llvm-project
[CMake] Default to static linking for subprojects.

Pass plugins introduced in D61446 do not support dynamic linking on
Windows, hence the option LLVM_${name_upper}_LINK_INTO_TOOLS can only
work being set to "ON". Currently, it defaults to "OFF" such that such
plugins are inoperable by default on Windows. Change the default for
subprojects to follow LLVM_ENABLE_PROJECTS.

Reviewed By: serge-sans-paille, MaskRay

Differential Revision: https://reviews.llvm.org/D72372
The file was modifiedllvm/cmake/modules/AddLLVM.cmake (diff)
The file was modifiedpolly/lib/CMakeLists.txt (diff)
Commit bee70bfff0f41a1cea5010276cf4a6229c2c3b93 by jasonliu
[XCOFF][AIX] Fix incorrect alignment for function descriptor csect

Summary:
Function descriptor csect on AIX should be 4 byte align instead of 1 byte align.

Reviewer: daltenty

Differential Revision: https://reviews.llvm.org/D74974
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll (diff)
Commit a5424ded377ea5aeedf6de2a9293e4d1b3da02be by aykevanlaethem
[AVR] Use correct register class for mul instructions

A number of multiplication instructions (muls, mulsu, fmul, fmuls,
fmulsu) had the wrong register class for an operand. This resulted in
the wrong register being used for the instruction.

Example:

    target datalayout = "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8"
    target triple = "avr-atmel-none"

    define i16 @sliceAppend(i16, i16, i16, i16, i16, i16) addrspace(1) {
      %d = mul i16 %0, %5
      ret i16 %d
    }

The first instruction would be muls r24, r31 before this patch. The r31
should have been r15 if you look at the intermediate forms during
instruction selection / register allocation, but the generated
instruction uses r31. After this patch, an extra movw is inserted to get
%5 in range for muls.

To make sure this bug is fixed everywhere, I checked all instructions
and found that most multiplication instructions suffered from this bug,
which I have fixed with this patch. No other instructions appear to be
affected.

Differential Revision: https://reviews.llvm.org/D74281
The file was modifiedllvm/lib/Target/AVR/AVRInstrInfo.td (diff)
Commit d1af6011e56b3d9fb94596d801f46b4c0a371c7a by aykevanlaethem
[AVR] Don't assert on an undefined operand

Not all operands are correctly disassembled at the moment. This means
that some machine instructions won't have all the necessary operands
set.
To avoid asserting, print an error instead until the necessary support
has been implemented.

Differential Revision: https://reviews.llvm.org/D73958
The file was modifiedllvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp (diff)
Commit daac8dba77057950190f6c393b6c0aa902a5ab3b by llvm-dev
[X86] combineX86ShuffleChain - select X86ISD::FAND/ISD::AND based on MaskVT

Noticed by inspection, we shouldn't use FloatDomain directly, we've already bitcast both inputs to MaskVT so select the opcode using that.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit 5b2046c95c6701f8c8509b78a12a700c012789eb by aykevanlaethem
[AVR] Disassemble register operands

Simply by implementing a few functions I was able to correctly
disassemble a much larger amount of instructions.

Differential Revision: https://reviews.llvm.org/D74045
The file was modifiedllvm/test/MC/AVR/inst-eor.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-and.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-ori.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-bst.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-sbci.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-add.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-cpse.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-cpc.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-mov.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-lsl.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-sub.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-andi.s (diff)
The file was modifiedllvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp (diff)
The file was modifiedllvm/test/MC/AVR/inst-adiw.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-sbr.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-adc.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-cbr.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-sbiw.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-ser.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-or.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-cp.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-subi.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-cpi.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-bld.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-tst.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-sbc.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-rol.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-clr.s (diff)
The file was modifiedllvm/test/MC/AVR/inst-ldi.s (diff)
Commit 00570c2f18872ce0a1f68cc73e7e259ad67aa60d by aykevanlaethem
[bindings/go] Add RemoveFromParentAsInstruction

This allows removing instructions without erasing them. They can then be
added somewhere else in the IR using Builder.Insert().
The file was modifiedllvm/bindings/go/llvm/ir.go (diff)
Commit 7b0a5683fa09be4e60bc93526aad7b63bbca687c by francisvm
[MachO] Add cpu(sub)type tests and improve error handling

Add checks for triples that don't use mach-o, and unit tests for
everything.
The file was modifiedllvm/unittests/BinaryFormat/MachOTest.cpp (diff)
The file was modifiedllvm/lib/BinaryFormat/MachO.cpp (diff)
Commit 53b597cfa2cd350704ac1708b1debd97ef027386 by llvm-dev
[SelectionDAG] Merge constant SDNode arithmetic into foldConstantArithmetic

This is the second patch as part of https://bugs.llvm.org/show_bug.cgi?id=36544

Merging in the ConstantSDNode variant of FoldConstantArithmetic. After this, I will begin merging in FoldConstantVectorArithmetic

I've ensured this patch can build & pass all lit tests in Windows and Linux environments.

Patch by @justice_adams (Justice Adams)

Differential Revision: https://reviews.llvm.org/D74881
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h (diff)
Commit 2a7a989c3edc33ad3042052ed50fee37ab254c7d by aykevanlaethem
[LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints

This patch adds bindings to C and Go for
addCoroutinePassesToExtensionPoints, which is used to add coroutine
passes to the correct locations in PassManagerBuilder.

Differential Revision: https://reviews.llvm.org/D51642
The file was modifiedllvm/include/llvm/Transforms/IPO/PassManagerBuilder.h (diff)
The file was modifiedllvm/include/llvm-c/Transforms/Coroutines.h (diff)
The file was modifiedllvm/lib/Transforms/Coroutines/Coroutines.cpp (diff)
The file was modifiedllvm/bindings/go/llvm/transforms_pmbuilder.go (diff)
The file was modifiedllvm/lib/Transforms/IPO/PassManagerBuilder.cpp (diff)
Commit 8358ddbe5d32d9aaa371b3de69f4efabf309b450 by antiagainst
[mlir][spirv] NFC: Move test passes to test/lib

Previously C++ test passes for SPIR-V were put under
test/Dialect/SPIRV. Move them to test/lib/Dialect/SPIRV
to create a better structure.

Also fixed one of the test pass to use new
PassRegistration mechanism.

Differential Revision: https://reviews.llvm.org/D75066
The file was removedmlir/test/Dialect/SPIRV/TestAvailability.cpp
The file was removedmlir/test/Dialect/CMakeLists.txt
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp (diff)
The file was addedmlir/test/lib/Dialect/SPIRV/CMakeLists.txt
The file was modifiedmlir/test/CMakeLists.txt (diff)
The file was addedmlir/test/lib/Dialect/CMakeLists.txt
The file was modifiedmlir/test/lib/CMakeLists.txt (diff)
The file was removedmlir/test/Dialect/SPIRV/CMakeLists.txt
The file was addedmlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
Commit b61e83eb0e31c1e6006569b43bb98a61ff44ca4c by Raphael Isemann
[libc++] Give headers that require C++14 a cplusplus14 requires in the modulemap

https://reviews.llvm.org/D68480 added those headers and made the std module
only usable with C++14 or later as the submodules were not marked as requiring
C++14 or later. This just adds the missing requires directives.
The file was modifiedlibcxx/include/module.modulemap (diff)
Commit 4135077e2694435d675e64ff95f167b4e27ba5c7 by Stanislav.Mekhanoshin
[AMDGPU] use llvm_unreachable instead of default for rp set

GCC 9.2 seems to incorrectly issue warning about out of bounds
access. This situation should not happen in any way.

Differential Revision: https://reviews.llvm.org/D75071
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp (diff)
Commit 727328433ad61b8c7acdd4d63e73241303a6beb7 by craig.topper
[X86] Add back fmaddsub intrinsics to work towards fixing the strict fp implementation

Previously we emitted an fmadd and a fmadd+fneg and combined them with a shufflevector. But this doesn't follow the correct exception behavior for unselected elements so the backend can't merge them into the fmaddsub/fmsubadd instructions.

This patch restores the the fmaddsub intrinsics so we don't have two arithmetic operations. We lose out on optimization opportunity in the non-strict FP case, but I don't think this is a big loss. If someone gives us a test case we can look into adding instcombine/dagcombine improvements. I'd rather not have the frontend do completely different things for strict and non-strict.

This still has problems because target specific intrinsics don't support strict semantics yet. We also still have all of the problems with masking. But we at least generate the right instruction in constrained mode now.

Differential Revision: https://reviews.llvm.org/D74268
The file was modifiedllvm/include/llvm/IR/IntrinsicsX86.td (diff)
The file was modifiedllvm/lib/Target/X86/X86IntrinsicsInfo.h (diff)
The file was modifiedclang/test/CodeGen/fma-builtins.c (diff)
The file was modifiedclang/test/CodeGen/fma4-builtins.c (diff)
The file was modifiedclang/test/CodeGen/avx512f-builtins.c (diff)
The file was modifiedclang/test/CodeGen/fma-builtins-constrained.c (diff)
The file was modifiedclang/test/CodeGen/avx512vl-builtins.c (diff)
The file was modifiedllvm/lib/IR/AutoUpgrade.cpp (diff)
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
Commit 28e8695785083926b97e2f99aa12241954b46f06 by nagy.h.mostafa
[MLIR] NFC - Fix indentation in examples in LoopOps.td
The file was modifiedmlir/include/mlir/Dialect/LoopOps/LoopOps.td (diff)
Commit c2e272f8cf76ec97f675e0dfdada75445bbee5c5 by epastor
[ms] [llvm-ml] Improve data support, adding names and complex initializers.

Summary: Add support for ?, DUP, and string initializers, as well as MASM syntax for named data locations.

Reviewers: rnk, thakis

Reviewed By: thakis

Subscribers: merge_guards_bot, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73226
The file was addedllvm/test/tools/llvm-ml/basic_data.test
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp (diff)
Commit 77a2744fa50b80c73d68356af010a002cc2a3d7f by Jonas Devlieghere
[lldb/Debugger] Remove macros formerly used by property definitions

The DEFAULT_ were used in property definitions which have since been
moved to CoreProperties.td.
The file was modifiedlldb/source/Core/Debugger.cpp (diff)
Commit c4093db3dac4ef09fb175f4aa79c8a422da70771 by Jonas Devlieghere
[lldb] Color the current PC marker

Differential revision: https://reviews.llvm.org/D75073
The file was modifiedlldb/source/Core/CoreProperties.td (diff)
Commit 9fe769a961dc8e3ce7d967ea0e07a4f0e5fac6e9 by epastor
Revert "[ms] [llvm-ml] Improve data support, adding names and complex initializers."

This reverts commit c2e272f8cf76ec97f675e0dfdada75445bbee5c5, which broke builds.
The file was removedllvm/test/tools/llvm-ml/basic_data.test
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp (diff)
Commit a8a4f99afb7c1f527ae9d1b274a67d0d3f2c3c4c by kparzysz
[Hexagon] Lower bitcast of a vector predicate

This patch lowers bitcast of vector predicate of type v32i1/v64i1
to i32/i64 type.
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (diff)
The file was addedllvm/test/CodeGen/Hexagon/autohvx/isel-hvx-pred-bitcast.ll
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.h (diff)
The file was addedllvm/test/CodeGen/Hexagon/hvx-bitcast-v64i1.ll
Commit 6f87b162e636b0cfe590758621a606d2bc68424f by rtereshin
[MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faster MV, NFC

Depending on the target, test suite, pipeline config and perhaps other
factors machine verifier when forced on with -verify-machineinstrs can
increase compile time 2-2.5 times over (Release, Asserts On), taking up
~60% of the time. An invaluable tool, it significantly slows down
machine verifier-enabled testing.

Nearly 75% of its time MachineVerifier spends in the calcRegsPassed
method. It's a classic forward dataflow analysis executed over sets, but
visiting MBBs in arbitrary order. We switch that to RPO here.

This speeds up MachineVerifier by about 35%, decreasing the overall
compile time with -verify-machineinstrs by 20-25% or so.

calcRegsPassed itself gets 2x faster here.

All measured on a large suite of shaders targeting a number of GPUs.

Reviewers: bogner, stoklund, rudkx, qcolombet

Reviewed By: bogner

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75032
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp (diff)
Commit 95291a0e34c74d9be0ad216465a2a2e9db9610d4 by epastor
Reland "[ms] [llvm-ml] Improve data support, adding names and complex initializers."

This reverts commit 9fe769a961dc8e3ce7d967ea0e07a4f0e5fac6e9, and re-lands commit c2e272f8cf76ec97f675e0dfdada75445bbee5c5.

Summary: Add support for ?, DUP, and string initializers, as well as MASM syntax for named data locations.

This version avoids the use of a C++17-only feature, if-statements with initializer.

Reviewers: rnk, thakis

Reviewed By: thakis

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73226
The file was addedllvm/test/tools/llvm-ml/basic_data.test
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp (diff)
Commit 820df6e679143786d41808b7bfc9ad023ed217d2 by kparzysz
[Hexagon] Lower vector predicate store

This patch lowers store of vector predicate of type v128i1.
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.h (diff)
The file was addedllvm/test/CodeGen/Hexagon/store-vector-pred.ll
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp (diff)
Commit 7f9f027c62623bff79730cd30d1a8a534e2ddb06 by Jonas Devlieghere
[lldb/Test] Update TestDisassemblyFormat for new format
The file was modifiedlldb/test/Shell/Settings/TestDisassemblyFormat.test (diff)
Commit df8dda67ed03f7d7ba3d9475556ab01946386852 by gclayton
Add methods to data extractor for extracting bytes and fixed length C strings.

Summary:
These modificaitons will be used in D74883.

Fixed length C strings can have trailing NULLs or sometimes spaces (BSD archive files), so the fixed length C string defaults to stripping trailing NULLs, but can have the arguments specify to remove one or more kinds of spaces if needed. This is used to extract fixed length C strings from ELF NOTEs in D74883.

Reviewers: labath, dblaikie, aprantl

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74991
The file was modifiedllvm/include/llvm/Support/DataExtractor.h (diff)
The file was modifiedllvm/lib/Support/DataExtractor.cpp (diff)
The file was modifiedllvm/unittests/Support/DataExtractorTest.cpp (diff)
Commit c93112dc4f745b0455addb54bfe1c2f79b827c6d by zoecarver
Validate argument passed to __builtin_frame_address and __builtin_return_address

Verifies that the argument passed to __builtin_frame_address and __builtin_return_address is within the range [0, 0xFFFF].
The file was modifiedclang/test/Sema/builtin-stackaddress.c (diff)
The file was modifiedclang/lib/Sema/SemaChecking.cpp (diff)
Commit cf9dae122e04f015424aff6e7706430161b5e396 by bmahjour
[NFC] [DA] Refactoring getIndexExpressionsFromGEP

Summary:
This patch moves the getIndexExpressionsFromGEP function from polly
into ScalarEvolution so that both polly and DependenceAnalysis can
use it for the purpose of subscript delinearization when the array
sizes are not parametric.

Authored By: bmahjour

Reviewer: Meinersbur, sebpop, fhahn, dmgreen, grosser, etiotto, bollu

Reviewed By: Meinersbur

Subscribers: hiraditya, arphaman, Whitney, ppc-slack, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73995
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h (diff)
The file was modifiedpolly/include/polly/Support/ScopHelper.h (diff)
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp (diff)
The file was modifiedpolly/lib/Support/ScopHelper.cpp (diff)
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp (diff)
Commit 698078257285a044110620d7dab2fb4451a3fa29 by zoecarver
Revert "Validate argument passed to __builtin_frame_address and __builtin_return_address"

This reverts commit c93112dc4f745b0455addb54bfe1c2f79b827c6d.
The file was modifiedclang/lib/Sema/SemaChecking.cpp (diff)
The file was modifiedclang/test/Sema/builtin-stackaddress.c (diff)
Commit eefda18227a2faeacbd5420cb482fa8b5836283b by medismail.bennani
[lldb/Plugins] Move SBTarget::GetExtendedCrashInformation to SBProcess

This patch moves the SB API method GetExtendedCrashInformation from
SBTarget to SBProcess since it only makes sense to call this method on a
sane process which might not be the case on a SBTarget object.

It also addresses some feedbacks received after landing the first patch
for the 'crash-info' feature.

Differential Revision: https://reviews.llvm.org/D75049

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
The file was modifiedlldb/include/lldb/Target/Platform.h (diff)
The file was modifiedlldb/bindings/interface/SBTarget.i (diff)
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h (diff)
The file was modifiedlldb/include/lldb/API/SBProcess.h (diff)
The file was modifiedlldb/source/Commands/CommandObjectProcess.cpp (diff)
The file was modifiedlldb/source/API/SBTarget.cpp (diff)
The file was modifiedlldb/bindings/interface/SBProcess.i (diff)
The file was modifiedlldb/test/API/functionalities/process_crash_info/TestProcessCrashInfo.py (diff)
The file was modifiedlldb/test/API/functionalities/process_crash_info/main.c (diff)
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp (diff)
The file was modifiedlldb/include/lldb/API/SBTarget.h (diff)
The file was modifiedlldb/include/lldb/API/SBStructuredData.h (diff)
The file was modifiedlldb/source/API/SBProcess.cpp (diff)
Commit 0368997402ae5f62efc83ec7b6f9052e01916943 by alexbrachetmialot
[libc] [UnitTest] Create death tests

Summary: This patch adds `EXPECT_EXITS` and `EXPECT_DEATH` macros for testing exit codes and deadly signals. They are less convoluted than their analogs in GTEST and don't have matchers but just take an int for either the exit code or the signal respectively. Nor do they have any regex match against the stdout/stderr of the child process.

Reviewers: sivachandra, gchatelet

Reviewed By: sivachandra

Subscribers: mgorny, MaskRay, tschuett, libc-commits

Differential Revision: https://reviews.llvm.org/D74665
The file was modifiedlibc/test/src/signal/raise_test.cpp (diff)
The file was addedlibc/utils/testutils/CMakeLists.txt
The file was addedlibc/utils/testutils/ExecuteFunctionUnix.cpp
The file was modifiedlibc/cmake/modules/LLVMLibCRules.cmake (diff)
The file was modifiedlibc/utils/CMakeLists.txt (diff)
The file was addedlibc/utils/testutils/ExecuteFunction.h
The file was modifiedlibc/utils/UnitTest/Test.cpp (diff)
The file was modifiedlibc/utils/UnitTest/Test.h (diff)
Commit 0ed4744bb511baea08652491aaba4131bc3d676f by jay.foad
AMDGPU/GlobalISel: Lower 64-bit uaddo/usubo

Summary: Add more test cases for signed and unsigned add/sub with overflow.

Reviewers: arsenm, rampitec, kerbowa

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75051
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir (diff)
Commit a5fa77888243beede98959ced17596b380e8de59 by craig.topper
[LegalizeTypes] Scalarize non-byte sized loads in WidenRecRes_Load and SplitVecResLoad

Should fix PR42803 and PR44902

Differential Revision: https://reviews.llvm.org/D74590
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/load-local-v3i1.ll (diff)
The file was modifiedllvm/test/CodeGen/SystemZ/store_nonbytesized_vecs.ll (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (diff)
Commit 841be9854c496adb1944fbf33af055814366ec86 by Jonas Devlieghere
[lldb] Color the line marker

Highlight the color marker similar to what we do for the column marker.
The default color matches the color of the current PC marker (->) in the
default disassembly format.

Differential revision: https://reviews.llvm.org/D75070
The file was modifiedlldb/source/Core/CoreProperties.td (diff)
The file was modifiedlldb/source/Core/SourceManager.cpp (diff)
The file was modifiedlldb/include/lldb/Core/Debugger.h (diff)
The file was addedlldb/test/Shell/Settings/TestLineMarkerColor.test
The file was modifiedlldb/test/API/source-manager/TestSourceManager.py (diff)
The file was modifiedlldb/source/Core/Debugger.cpp (diff)
Commit e6f9cb025cd765f422b51d01f4a5714db788b3a7 by n.james93
[docs] dump_ast_matchers strips internal::(Bindable)?Matcher from Result_type

Summary: Remove `internal::Matcher` and `internal::BindableMatcher` from Result Type when dumping AST Matchers

Reviewers: joerg, gribozavr2, aaron.ballman

Reviewed By: aaron.ballman

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75046
The file was modifiedclang/docs/LibASTMatchersReference.html (diff)
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h (diff)
The file was modifiedclang/docs/tools/dump_ast_matchers.py (diff)
Commit edc4f4c9c9d90b2a4f8831ba4c873f08eaa5395a by Jason Molenda
Unwind past an interrupt handler correctly on arm or at pc==0

Fix RegisterContextLLDB::InitializeNonZerothFrame so that it
will fetch a FullUnwindPlan instead of falling back to the
architectural default unwind plan -- GetFullUnwindPlan knows
how to spot a jmp 0x0 that results in a fault, which may be
the case when we see a trap handler on the stack.

Fix RegisterContextLLDB::SavedLocationForRegister so that when
the pc value is requested from a trap handler frame, where we
have a complete register context available to us, don't provide
the Return Address register (lr) instead of the pc.  We have
an actual pc value here, and it's pointing to the instruction
that faulted.

Differential revision: https://reviews.llvm.org/D75007
<rdar://problem/59416588>
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextLLDB.cpp (diff)
Commit 915e7699243726d001f9ab4e8fa2380a5e57de56 by smeenai
[arcconfig] Default base to previous revision

When you run `arc diff`, arc defaults to uploading all the changes you
have against the upstream branch into a single patch. This is almost
never what you want for stacked commits (patch series); you only want to
submit the changes done by the current patch. It's also come up as a
point of confusion in the Phabricator vs. GitHub PRs discussion, for
example. Configure arc to only upload your current patch by default,
which I think is a much more suitable default for LLVM developers.

Differential Revision: https://reviews.llvm.org/D74990
The file was modified.arcconfig (diff)
Commit e34ddc09f464667b5f3a49bf60255e89041ddf44 by smeenai
[arcconfig] Delete subproject arcconfigs

From https://secure.phabricator.com/book/phabricator/article/arcanist_new_project/:

> An .arcconfig file is a JSON file which you check into your project's root.

I've done some experimentation, and it looks like the subproject
.arcconfigs just get ignored, as the documentation says. Given that
we're fully on the monorepo now, it's safe to remove them.

Differential Revision: https://reviews.llvm.org/D74996
The file was removedpolly/.arcconfig
The file was removeddebuginfo-tests/.arcconfig
The file was removedparallel-libs/.arcconfig
The file was removedllvm/.arcconfig
The file was removedpstl/.arcconfig
The file was removedlldb/.arcconfig
The file was removedclang/.arcconfig
The file was removedlibcxx/.arcconfig
The file was removedlld/.arcconfig
The file was removedclang-tools-extra/.arcconfig
The file was removedlibcxxabi/.arcconfig
The file was removedcompiler-rt/.arcconfig
The file was removedlibunwind/.arcconfig
The file was removedopenmp/.arcconfig
Commit 03dd205c1516d9930a80101a7e0a6793af47ec9e by joerg
Adjust max_align_t handling

Depend on the compiler to provide a correct implementation of
max_align_t. If __STDCPP_NEW_ALIGNMENT__ is missing and C++03 mode has
been explicitly enabled, provide a minimal fallback in <new> as
alignment of the largest primitive types.
The file was modifiedlibcxx/include/new (diff)
The file was modifiedlibcxx/include/cstddef (diff)
The file was modifiedlibcxx/include/stddef.h (diff)
Commit 4e45ef4d77b74350ea5a64a216b046ea6be1b96f by joerg
Prefer PATH_MAX to MAXPATHLEN

The former is part of POSIX and requires less heavy headers. They are
practically functionally equivalent.
The file was modifiedllvm/lib/Support/Unix/Path.inc (diff)
Commit fe210a1ff2e90093e210bcbcc1184308903c7bdb by frank.laub
[MLIR] Add std.atomic_rmw op

Summary:
The RFC for this op is here: https://llvm.discourse.group/t/rfc-add-std-atomic-rmw-op/489

The std.atmomic_rmw op provides a way to support read-modify-write
sequences with data race freedom. It is intended to be used in the lowering
of an upcoming affine.atomic_rmw op which can be used for reductions.

A lowering to LLVM is provided with 2 paths:
- Simple patterns: llvm.atomicrmw
- Everything else: llvm.cmpxchg

Differential Revision: https://reviews.llvm.org/D74401
The file was modifiedmlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp (diff)
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir (diff)
The file was modifiedmlir/test/IR/core-ops.mlir (diff)
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td (diff)
The file was modifiedmlir/test/IR/invalid-ops.mlir (diff)
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp (diff)
Commit 888b12b270f3fb7b2e4030fec792e24321998c5b by efriedma
[polly] Don't count scops in a global variable.

This can cause issues with thread safety.

Differential Revision: https://reviews.llvm.org/D75089
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp (diff)
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp (diff)
The file was modifiedpolly/include/polly/ScopDetection.h (diff)
The file was modifiedpolly/include/polly/ScopInfo.h (diff)
Commit 082f1a3b15999c803265fabcb555ad253a00d477 by Jason Molenda
My prevous commit to RegisterContextLLDB is causing a test fail
on aarch64-ubuntu - collect a little information about what
is happening on this target before I revert my change; I don't
have access to this target.
The file was modifiedlldb/test/API/functionalities/signal/handle-abrt/TestHandleAbort.py (diff)
Commit 248eaff823725fd35816b3486526a4515fb7c885 by efriedma
[AArch64] SVE implies fullfp16

This is explicitly guaranteed in ARMARM. And it makes reasoning about
vectors easier: we can assume that if a vector operation is legal, the
corresponding scalar operation is also legal.

Differential Revision: https://reviews.llvm.org/D74993
The file was modifiedllvm/test/CodeGen/AArch64/sve-vector-splat.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64.td (diff)
Commit 5522e8296fc5a082ebfc2cd1904099b1ba0570d9 by n.james93
[NFC] Cleaned up ASTMatchersInternal Code
The file was modifiedclang/lib/ASTMatchers/ASTMatchersInternal.cpp (diff)
Commit 11e3dde6252f481238dccd14956350ff328c4087 by arsenm2
GlobalISel: Reimplement fewerElementsVectorBasic

Changes the handling of odd breakdowns, and avoids using
G_EXTRACT/G_INSERT. Pad with undef to a wider size, and unmerge. Also
avoid introducing instructions for the fully undef components.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir (diff)
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir (diff)
Commit 0b46b078b656eacaf8fb0b550825189a051f0744 by arsenm2
AMDGPU/GlobalISel: Fix incorrect VOP3P fneg folding

We use some s32 values in VOP3P operands, and won't see any
intervening casts from a 32-bit fneg. Make sure it's really a packed
fneg before folding.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll (diff)
Commit 226bddce458b8648a16d49e6415be2ccf9592c0e by SourabhSingh.Tomar
[DebugInfo]: Refactored Macinfo section consumption part to allow future
macro section dumping.

Summary: Previously macinfo infrastructure was using functions
names that were ambiguous i.e `getMacro/getMacroDWO` in a sense
of conveying stated intentions. This patch refactored them into more
reasonable `getDebugMacinfo/getDebugMacinfoDWO` names thus making
room for macro implementation.

Reviewers: aprantl, probinson, jini.susan.george, dblaikie

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D75037
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFContext.cpp (diff)
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFContext.h (diff)
Commit 23c2a5ce33f0f05e4cc43c2cbb9009e9b549839c by isanbard
Allow "callbr" to return non-void values

Summary:
Terminators in LLVM aren't prohibited from returning values. This means that
the "callbr" instruction, which is used for "asm goto", can support "asm goto
with outputs."

This patch removes all restrictions against "callbr" returning values. The
heavy lifting is done by the code generator. The "INLINEASM_BR" instruction's
a terminator, and the code generator doesn't allow non-terminator instructions
after a terminator. In order to correctly model the feature, we need to copy
outputs from "INLINEASM_BR" into virtual registers. Of course, those copies
aren't terminators.

To get around this issue, we split the block containing the "INLINEASM_BR"
right before the "COPY" instructions. This results in two cheats:

  - Any physical registers defined by "INLINEASM_BR" need to be marked as
    live-in into the block with the "COPY" instructions. This violates an
    assumption that physical registers aren't marked as "live-in" until after
    register allocation. But it seems as if the live-in information only
    needs to be correct after register allocation. So we're able to get away
    with this.

  - The indirect branches from the "INLINEASM_BR" are moved to the "COPY"
    block. This is to satisfy PHI nodes.

I've been told that MLIR can support this handily, but until we're able to
use it, we'll have to stick with the above.

Reviewers: jyknight, nickdesaulniers, hfinkel, MaskRay, lattner

Reviewed By: nickdesaulniers, MaskRay, lattner

Subscribers: rriddle, qcolombet, jdoerfert, MatzeB, echristo, MaskRay, xbolva00, aaron.ballman, cfe-commits, JonChesterfield, hiraditya, llvm-commits, rnk, craig.topper

Tags: #llvm, #clang

Differential Revision: https://reviews.llvm.org/D69868
The file was modifiedllvm/lib/IR/Verifier.cpp (diff)
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp (diff)
The file was modifiedllvm/docs/LangRef.rst (diff)
The file was modifiedllvm/test/CodeGen/X86/callbr-asm-outputs.ll (diff)
The file was modifiedllvm/lib/AsmParser/LLParser.cpp (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/callbr-asm.ll (diff)
The file was modifiedllvm/lib/CodeGen/MachineBasicBlock.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/MachineBasicBlock.h (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (diff)
Commit 50cac248773c3a023e8f6ceb9938bdd5e9f15da2 by isanbard
Support output constraints on "asm goto"

Summary:
Clang's "asm goto" feature didn't initially support outputs constraints. That
was the same behavior as gcc's implementation. The decision by gcc not to
support outputs was based on a restriction in their IR regarding terminators.
LLVM doesn't restrict terminators from returning values (e.g. 'invoke'), so
it made sense to support this feature.

Output values are valid only on the 'fallthrough' path. If an output value's used
on an indirect branch, then it's 'poisoned'.

In theory, outputs *could* be valid on the 'indirect' paths, but it's very
difficult to guarantee that the original semantics would be retained. E.g.
because indirect labels could be used as data, we wouldn't be able to split
critical edges in situations where two 'callbr' instructions have the same
indirect label, because the indirect branch's destination would no longer be
the same.

Reviewers: jyknight, nickdesaulniers, hfinkel

Reviewed By: jyknight, nickdesaulniers

Subscribers: MaskRay, rsmith, hiraditya, llvm-commits, cfe-commits, craig.topper, rnk

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D69876
The file was modifiedclang/lib/CodeGen/CGStmt.cpp (diff)
The file was modifiedclang/lib/Sema/SemaStmtAsm.cpp (diff)
The file was modifiedclang/test/Sema/asm-goto.cpp (diff)
The file was modifiedclang/lib/Analysis/UninitializedValues.cpp (diff)
The file was modifiedclang/test/Parser/asm-goto.cpp (diff)
The file was modifiedclang/test/Parser/asm-goto.c (diff)
The file was modifiedclang/docs/LanguageExtensions.rst (diff)
The file was modifiedclang/lib/Parse/ParseStmtAsm.cpp (diff)
The file was modifiedclang/include/clang/AST/Stmt.h (diff)
The file was modifiedclang/lib/AST/Stmt.cpp (diff)
The file was modifiedclang/include/clang/Basic/Features.def (diff)
The file was addedclang/test/Analysis/uninit-asm-goto.cpp
The file was modifiedclang/test/CodeGen/asm-goto.c (diff)
Commit b3bce6a3ddb77a6c6b55ec9de3e36c8de608384c by rtereshin
[MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV, NFC

MachineVerifier still takes 45-50% of total compile time with
-verify-machineinstrs, with calcRegsPassed dataflow taking ~50-60% of
MachineVerifier.

The majority of that time is spent in BBInfo::addPassed, mostly within
DenseSet implementing the sets the dataflow is operating over.

In particular, 1/4 of that DenseSet time is spent just iterating over it
(operator++), 40-50% on insertions, and most of the rest in ::count.

Given that, we're implementing custom sets just for this analysis here,
focusing on cheap insertions and O(n) iteration time (as opposed to
O(U), where U is the universe).

As it's based _mostly_ on BitVector for sparse and SmallVector for
dense, it may remotely resemble SparseSet. The difference is, our
solution is a lot less clever, doesn't have constant time `clear` that
we won't use anyway as reusing these sets across analyses is cumbersome,
and thus more space efficient and safer (got a resizable Universe and a
fallback to DenseSet for sparse if it gets too big).

With this patch MachineVerifier gets ~15-20% faster, its contribution to
total compile time drops from 45-50% to ~35%, while contribution of
calcRegsPassed to MachineVerifier drops from 50-60% to ~35% as well.

calcRegsPassed itself gets another 2x faster here.

All measured on a large suite of shaders targeting a number of GPUs.

Reviewers: bogner, stoklund, rudkx, qcolombet

Reviewed By: rudkx

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75033
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp (diff)
Commit d5a4fa05146fe290735e2a38adb50d76052c4313 by Jason Molenda
Revert "My prevous commit to RegisterContextLLDB is causing a test fail"

This reverts commit 082f1a3b15999c803265fabcb555ad253a00d477.
The file was modifiedlldb/test/API/functionalities/signal/handle-abrt/TestHandleAbort.py (diff)
Commit 4fdd2edbdb4bfe6a95df0fac12e8beffcbe33b86 by Jason Molenda
Revert "Unwind past an interrupt handler correctly on arm or at pc==0"

The aarcht64-ubuntu bot is showing a test failure in TestHandleAbort.py
with this patch.  Adding some logging to that file, it looks like
the saved register context above the trap handler does not have
save state for $pc, but it does have it for $lr on that platform.
I need to fall back to looking for $lr if the $pc cannot be retrieved.
I'll update the patch and re-commit once that's fixed.

This reverts commit edc4f4c9c9d90b2a4f8831ba4c873f08eaa5395a.
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextLLDB.cpp (diff)
Commit fee41517fe0f7ff9f0e204dd9200ebf32ca03cb8 by arsenm2
AMDGPU/GlobalISel: Introduce post-legalize combiner

The current set of custom combines are only really useful after
legalization, so move them there. There is a lot of overlap in the
boilerplate here, but I think we do want a pretty different set of
combines before and after legalize. I think we will want a lot of
overlap between the post-legalize and a post-regbankselect combiner.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir (diff)
The file was addedllvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-narrow.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-ashr-narrow.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCombine.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h (diff)
Commit 1612d382418c767729b582c7b3daf52f18348461 by arsenm2
GlobalISel: Remove unneeded initialiation

Removes implicit unsigned->Register conversion.
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CallLowering.h (diff)
Commit 2c0edbf19c1b0115b944cd017201eaf1f6a832ee by uenoku.tokotoko
[Attributor] Use AssumptionCache in AANonNullFloating::initialize
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp (diff)
The file was modifiedllvm/test/Transforms/Attributor/nonnull.ll (diff)
Commit 35a061453579f623aca1edc7f6f23dd969c21395 by Jonas Devlieghere
[lldb/Utility] Fix unspecified behavior.

Order of evaluation of the operands of any C++ operator [...] is
unspecified. This patch fixes the issue in Stream::Indent by calling the
function consecutively.

On my Windows setup, TestSettings.py fails because the function prints
the value first, followed by the indentation.

Expected result:
  MY_FILE=this is a file name with spaces.txt

Actual result:
MY_FILE  =this is a file name with spaces.txt
The file was modifiedlldb/source/Utility/Stream.cpp (diff)
Commit 84c3d3f37a24d9c4835d5c9cd449083845ba8bcd by tclin914
[Sparc][NFC] Remove trailing space
The file was modifiedllvm/lib/Target/Sparc/SparcInstrInfo.td (diff)
The file was modifiedllvm/lib/Target/Sparc/SparcInstrAliases.td (diff)
The file was modifiedllvm/lib/Target/Sparc/Sparc.td (diff)
The file was modifiedllvm/lib/Target/Sparc/SparcInstrFormats.td (diff)
The file was modifiedllvm/lib/Target/Sparc/SparcRegisterInfo.td (diff)
The file was modifiedllvm/lib/Target/Sparc/LeonFeatures.td (diff)
Commit c08a1c7071c43b7bd0384e71c486ad5e5546b08f by pavel
[lldb] Mark ObjectFileBreakpad test inputs as non-text

These are technically text files, but the object file layer treats them
as binary, and the relevant tests verify the parsed contents byte for
byte. Git's crlf conversion can make those tests fail. Marking the files
as non-text disables that.
The file was addedlldb/test/Shell/ObjectFile/Breakpad/Inputs/.gitattributes
Commit 55d4b0d7dd70d5ecc9e641d93fbf234bb7104d1a by Raphael Isemann
[lldb] Fix that a crashing test is marked as unsupported when it prints UNSUPPORTED before crashing

Summary:
I added an `abort()` call to some code and noticed that the test suite was still passing and it just marked my test as "UNSUPPORTED".

It seems the reason for that is that we expect failing tests to print "FAIL:" which doesn't happen when we crash. If we then also
have an unsupported because we skipped some debug information in the output, we just mark the test passing because it is unsupported
on the current platform.

This patch marks any test that has a non-zero exit code as failing even if it doesn't print "FAIL:" (e.g., because it crashed).

Reviewers: labath, JDevlieghere

Reviewed By: labath, JDevlieghere

Subscribers: aprantl, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D75031
The file was modifiedlldb/test/API/lldbtest.py (diff)
Commit 3e9a7b2ba470bbe9cf3de3e4b15ba09dcfd206aa by n.james93
[ASTMatchers] Matcher macros with params move params instead of copying

Summary: Use move semantics instead of copying for AST Matchers with parameters

Reviewers: aaron.ballman, gribozavr2

Reviewed By: gribozavr2

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75096
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchersMacros.h (diff)
Commit 6a0c066c6102cd463e8ad48881e91e596547507a by n.james93
[ASTMatchers] Adds a matcher called `hasAnyOperatorName`

Summary:
Acts on `BinaryOperator` and `UnaryOperator` and functions the same as `anyOf(hasOperatorName(...), hasOperatorName(...), ...)`

Documentation generation isn't perfect but I feel that the python doc script needs updating for that

Reviewers: aaron.ballman, gribozavr2

Reviewed By: aaron.ballman, gribozavr2

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75040
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp (diff)
The file was modifiedclang/lib/ASTMatchers/ASTMatchersInternal.cpp (diff)
The file was modifiedclang/docs/LibASTMatchersReference.html (diff)
The file was modifiedclang/docs/tools/dump_ast_matchers.py (diff)
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h (diff)
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp (diff)
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchersInternal.h (diff)
Commit 9238dfb4d80dc93a3187a2d3b030c6f7867afd50 by craig.topper
[X86] Remove mask output from X86 gather/scatter ISD opcodes.

Instead add it when we make the machine nodes during instruction
selections.

This makes this ISD node closer to ISD::MGATHER. Trying to see
if we remove the X86 specific ones.
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit 89ba4acad6ccc1ba6e1044ea929c4dcc1e92f6a3 by craig.topper
[X86] Pass parameters into selectVectorAddr to remove dependency on X86MaskedGatherScatterSDNode.

Might be able to get rid of X86ISD::SCATTER and some uses of
X86ISD::GATHER. Which require isel to use ISD::SCATTER and
ISD::GATHER as well.
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp (diff)
Commit 29e2cb87491cfc3690f7467acfef8a0323eba8b4 by alexbrachetmialot
[libc] [UnitTest] Give UnitTest gtest like colors

Summary:
This is a quality of life change to make it a little nicer to look at, NFC.
This patch makes the RUN and OK lines green and FAILED lines red to match gtest's output.

Reviewers: sivachandra, gchatelet, PaulkaToast

Reviewed By: gchatelet

Subscribers: MaskRay, tschuett, libc-commits

Differential Revision: https://reviews.llvm.org/D75103
The file was modifiedlibc/utils/UnitTest/Test.cpp (diff)
Commit ea6b95dc2f68e7f3f06abc47fae44c91ceebef93 by Raphael Isemann
[lldb][NFC] Make ArrayRef initialization more obvious in lldb-test.cpp

Seems like this code raised some alarm bells as it looks like an ArrayRef
to a temporary initializer list, but it's actually just calling the ArrayRef(T*, T*)
constructor. Let's clarify this and directly call the right ArrayRef constructor here.

Fixes rdar://problem/59176052
The file was modifiedlldb/tools/lldb-test/lldb-test.cpp (diff)
Commit eefbff0082c5228e01611f7e6987695d0b1c6d32 by pavel
[lldb] s/CHECK-NEXT/CHECK-DAG in dwp-debug-types.s

These can come out nondeterministically for two reasons:
- sorting based on ConstStringified pointer values
- different relative speeds of the indexing threads

Making these nondeterministic without incurring performance penalties is
hard, so I just make the test expect them in any order (the order is not
important in this test anyway.
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/dwp-debug-types.s (diff)
Commit 27c89ced811986d473b0562f313f2bc5e0cbbe4b by shkzhang
[NFC][PowerPC] Add a new test case scalar_cmp.ll
The file was addedllvm/test/CodeGen/PowerPC/scalar_cmp.ll
Commit 05d174d30159579ae19e90899736d98e2544c0e3 by Raphael Isemann
[lldb][NFC] Move namespace lookup in ClangASTSource to own function.

Beside being cleaner we can probably reuse that logic elsewhere.
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp (diff)
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.h (diff)
Commit 814fb658ca262f5c2df47f11d47f91fac188e0d6 by jano.vesely
libclc: cmake configure should depend on file list

This makes sure targets are rebuilt if a file is added or removed.
Reviewer: tstellar
Differential Revision: https://reviews.llvm.org/D74662
The file was modifiedlibclc/CMakeLists.txt (diff)
Commit dc78190811b5f678c8a1ac07a6d46f68b8f2e865 by jay.foad
AMDGPU/GlobalISel: add legalize tests for s64 max/min
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir (diff)
Commit ccee390767ca963d541e0b1c7c8587d1fbde505f by jay.foad
GlobalISel: NFC minor cleanup to avoid a couple of fixed size local arrays
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
Commit 62c7d8402651a0704602e73c90da92248bbad6d5 by calixte.denizet
[profile] gcov_mutex must be static

Summary: Forget static keyword for gcov_mutex in https://reviews.llvm.org/D74953 and that causes test failure on mac.

Reviewers: erik.pilkington, vsk

Reviewed By: vsk

Subscribers: vsk, dexonsmith, #sanitizers, llvm-commits

Tags: #sanitizers, #llvm

Differential Revision: https://reviews.llvm.org/D75080
The file was modifiedcompiler-rt/lib/profile/GCDAProfiling.c (diff)
Commit dcd89b3de6de891bfcc59189cda1ea059fbdcdb5 by hans
Add llvm-cov to LLVM_TOOLCHAIN_TOOLS

See https://github.com/llvm/llvm-project/issues/141
The file was modifiedllvm/cmake/modules/AddLLVM.cmake (diff)
Commit bd2df13ee0f972ac386fd2d8edf5a9205ace04bb by ikudrin
[DebugInfo] Fix printing CIE offsets in EH FDEs.

While the value of the CIE pointer field in a DWARF FDE record is
an offset to the corresponding CIE record from the beginning of
the section, for EH FDE records it is relative to the current offset.
Previously, we did not make that distinction when dumped both kinds
of FDE records and just printed the same value for the CIE pointer
field and the CIE offset; that was acceptable for DWARF FDEs but was
wrong for EH FDEs.

This patch fixes the issue by explicitly printing the offset of the
linked CIE object.

Differential Revision: https://reviews.llvm.org/D74613
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame-arm64.test (diff)
The file was addedllvm/test/DebugInfo/X86/debug_frame-invalid-cie-offset.s
The file was modifiedllvm/test/MC/Mips/eh-frame.s (diff)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp (diff)
The file was modifiedllvm/test/DebugInfo/RISCV/eh-frame.s (diff)
The file was modifiedlld/test/ELF/eh-frame-hdr-augmentation.s (diff)
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h (diff)
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_frame_offset.test (diff)
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame-coff.test (diff)
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_frame_GNU_args_size.s (diff)
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame-mipsel.test (diff)
Commit 9fd7ce7f4449619bc85ab4d2643e656836a2d5e2 by dkszelethus
[analyzer][MallocChecker][NFC] Communicate the allocation family to auxiliary functions with parameters

The following series of refactoring patches aim to fix the horrible mess that MallocChecker.cpp is.

I genuinely hate this file. It goes completely against how most of the checkers
are implemented, its by far the biggest headache regarding checker dependencies,
checker options, or anything you can imagine. On top of all that, its just bad
code. Its seriously everything that you shouldn't do in C++, or any other
language really. Bad variable/class names, in/out parameters... Apologies, rant
over.

So: there are a variety of memory manipulating function this checker models. One
aspect of these functions is their AllocationFamily, which we use to distinguish
between allocation kinds, like using free() on an object allocated by operator
new. However, since we always know which function we're actually modeling, in
fact we know it compile time, there is no need to use tricks to retrieve this
information out of thin air n+1 function calls down the line. This patch changes
many methods of MallocChecker to take a non-optional AllocationFamily template
parameter (which also makes stack dumps a bit nicer!), and removes some no
longer needed auxiliary functions.

Differential Revision: https://reviews.llvm.org/D68162
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp (diff)
The file was modifiedclang/lib/StaticAnalyzer/Checkers/InterCheckerAPI.h (diff)
Commit 72848f26b434624f612834443e8a7c0239026340 by cullen.rhodes
[AArch64][SVE] Add predicate reinterpret intrinsics

Summary:
Implements the following intrinsics:

    * llvm.aarch64.sve.convert.to.svbool
    * llvm.aarch64.sve.convert.from.svbool

For converting the ACLE svbool_t type (<n x 16 x i1>) to and from the
other predicate types: <n x 8 x i1>, <n x 4 x i1> and <n x 2 x i1>.

Reviewers: sdesmalen, kmclaughlin, efriedma, dancgr, rengolin

Reviewed By: sdesmalen, efriedma

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74471
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h (diff)
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td (diff)
Commit 157b3d505f612460a109ac7d5325d81540b3eade by grimar
[yaml2obj] - Address post commit comments for D74764

It removes a stale comment and fixes the comment in the test
and section names related accordingly.
The file was modifiedllvm/test/tools/yaml2obj/ELF/section-address-assign.yaml (diff)
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp (diff)
Commit 7a7eacc797f7cc603d50987883ea95aee99d6b22 by herhut
[MLIR][GPU] Implement a simple greedy loop mapper.

Summary:
The mapper assigns annotations to loop.parallel operations that
are compatible with the loop to gpu mapping pass. The outermost
loop uses the grid dimensions, followed by block dimensions. All
remaining loops are mapped to sequential loops.

Differential Revision: https://reviews.llvm.org/D74963
The file was modifiedmlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp (diff)
The file was addedmlir/test/Dialect/GPU/mapping.mlir
The file was addedmlir/test/lib/Transforms/TestGpuParallelLoopMapping.cpp
The file was modifiedmlir/include/mlir/Dialect/LoopOps/LoopOps.td (diff)
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp (diff)
The file was modifiedmlir/lib/Dialect/GPU/CMakeLists.txt (diff)
The file was addedmlir/lib/Dialect/GPU/Transforms/ParallelLoopMapper.cpp
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt (diff)
The file was addedmlir/include/mlir/Dialect/GPU/ParallelLoopMapper.h
Commit decd021facba804b57e8d80b6159c987d3261ab8 by hans
Don't generate libcalls for wide shift on Windows ARM (PR42711)

The previous patch (cff90f07cb5cc3c3bc58277926103af31caef308) didn't
cover ARM.
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/ARM/shift_minsize.ll (diff)
Commit 00d4814f499fd09f8cf326c1c1a219175268b970 by zinenko
[mlir] Generalize intrinsic builders in the LLVM dialect definition

All LLVM IR intrinsics are constructed in a similar way. The ODS definition of
the LLVM dialect in MLIR also lists multiple intrinsics, many of which
reproduce the same (or similar enough) code stanza to translate the MLIR
operation into the LLVM IR intrinsic. Provide a single base class containing
parameterizable code to build LLVM IR intrinsics given their name and the lists
of overloadable operands and results. Use this class to remove (almost)
duplicate translations for intrinsics defined in LLVMOps.td.

Differential Revision: https://reviews.llvm.org/D74889
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td (diff)
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td (diff)
Commit 3a1b34ff69be5d1cbd218bfe81fc66edb8fa15f1 by zinenko
[mlir] Intrinsics generator: use TableGen-defined builder function

Originally, intrinsics generator for the LLVM dialect has been producing
customized code fragments for the translation of MLIR operations to LLVM IR
intrinsics. LLVM dialect ODS now provides a generalized version of the
translation code, parameterizable with the properties of the operation.
Generate ODS that uses this version of the translation code instead of
generating a new version of it for each intrinsic.

Differential Revision: https://reviews.llvm.org/D74893
The file was modifiedmlir/test/mlir-tblgen/llvm-intrinsics.td (diff)
The file was modifiedmlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td (diff)
Commit 5f9b543e8e305630c9d133e4ac6366d836d75a59 by zinenko
[mlir] simplify affine maps and operands in affine.min/max

Affine dialect already has a map+operand simplification infrastructure in
place. Plug the recently added affine.min/max operations into this
infrastructure and add a simple test. More complex behavior of the simplifier
is already tested by other ops.

Addresses https://bugs.llvm.org/show_bug.cgi?id=45008.

Differential Revision: https://reviews.llvm.org/D75058
The file was modifiedmlir/test/AffineOps/canonicalize.mlir (diff)
The file was modifiedmlir/lib/Dialect/AffineOps/AffineOps.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/AffineOps/AffineOps.td (diff)
Commit fc0d11c90420acfcaa5424f5df979a63f5ab4123 by Raphael Isemann
[lldb][NFC] Modernize logging in ClangASTSource/ExpressionDeclMap
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp (diff)
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp (diff)
Commit cff90c938b7be43de482ffb7a8a7fdbdf57c32a3 by andrzej.warzynski
[AArch64][SVE] Update names and comments for gathers/scatters (NFC)

Summary:
This patch renames functions and TableGen classes for SVE gathers and
scatters. The original names implied that the corresponding
methods/classes are only suited for regular gathers/scatters (i.e. LD1
and ST1), which is not the case. Indeed, we will be re-using them for
non-temporal and first-faulting gathers/scatters in the forthcoming
patches. The new names also highlight the split into Vector-Scalar (VS)
and Scalar-Vector (SV) cases.

List of changes:
* `performLD1GatherCombine` and `performST1ScatterCombine` are renamed
  as `performGatherLoadCombine` and `performScatterStoreCombine`,
  respectively.
* Selection DAG types for scatters and gathers from
  AArch64SVEInstrInfo.td are renamed. For example, `SDT_AArch64_GLD1` is
  renamed as `SDT_AArch64_GATHER_SV`. SV stands for Scalar-Vector, as
  opposed to Vector-Scalar (VS).
* The intrinsic classes from IntrinsicsAArch64.td are renamed. For
  example, `AdvSIMD_GatherLoad_64bitOffset_Intrinsic` is renamed as
  `AdvSIMD_GatherLoad_SV_64b_Offsets_Intrinsic`.
* Updated comments in `performGatherLoadCombine` and
  `performScatterStoreCombine`.

Reviewers: sdesmalen, rengolin, efriedma

Reviewed By: sdesmalen

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75035
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td (diff)
Commit e4e122aa1d59bdc1e15b414479d574952223b512 by herhut
[MLIR][GPU] Fix forward declaration of Region class.

I forward declared mlir::Region as a struct by mistake :(
The file was modifiedmlir/include/mlir/Dialect/GPU/ParallelLoopMapper.h (diff)
Commit 4486aa03c5f431ba33a1d1ac9991da912e3decd9 by hans
build_llvm_package.bat: Produce zip files in addition to the installers

Now that the Windows installer no longer does anything besides
self-extract, maybe it would make sense to distribute the toolchain as a
plain zip file in addition to the current installer.

Differential revision: https://reviews.llvm.org/D74896
The file was modifiedllvm/utils/release/build_llvm_package.bat (diff)
Commit 555d5ad85a4986d003040eb94109c72579021423 by kadircet
[clangd] Disable ExtractVariable for C

Summary:
Currently extract variable doesn't spell the type explicitly and just
uses an `auto` instead, which is not available in C.

Reviewers: usaxena95

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75053
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/ExtractVariable.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/TweakTests.cpp (diff)
Commit defd0e24aa054aed583d5272e2cc64ae7b0fdc7d by Raphael Isemann
[lldb][NFC] Move NameSearchContext to own header/source files

The class is large enough to be in its own file. This patch also removes the cyclic
dependency between ClangASTSource <-> NameSearchContext.
The file was addedlldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.cpp
The file was addedlldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.h
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp (diff)
The file was modifiedlldb/unittests/Expression/ClangExpressionDeclMapTest.cpp (diff)
The file was modifiedlldb/include/lldb/lldb-forward.h (diff)
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/CMakeLists.txt (diff)
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.h (diff)
Commit 2ad7b6fba0e3a9e71df64bd1a51a14f9c5930eb3 by Raphael Isemann
[lldb][NFC] Make NameSearchContext::m_found members bools instead of bitfields

The size of NameSearchContext isn't important as we never store it and rarely
allocate more than a few. This way we also don't have to use the memset to
initialize these fields to zero.
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp (diff)
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.h (diff)
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp (diff)
Commit 60a2db5986a84ef3e930818b6b86dc0d5c361e4a by whitequark
Remove myself from CODE_OWNERS.
The file was modifiedllvm/CODE_OWNERS.TXT (diff)
Commit 3950093951f49314f2c61157be96aa72f9a0e2e0 by thakis
[gn build] (manually) merge fee41517fe0f
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn (diff)
Commit 93b6e1924081874039e6c88828db8e0ab7bbba04 by Raphael Isemann
[lldb] Initialize NameSearchContext::m_namespace_map in constructor

This member is for some reason initialized in ClangASTSource::FindExternalVisibleDecls
so all other functions using this member dereference a nullptr unless we
call this function before that. Let's just initialize this in the constructor.

This should be NFC as the only side effect is that we don't reset the namespace map
when calling ClangASTSource::FindExternalVisibleDecls multiple times (and we never
call this function multiple times for one NameSearchContext from what I can see).
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.h (diff)
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp (diff)
Commit bdb24faa2af4b989e757bc0a220224df9fe4d874 by Raphael Isemann
[lldb][NFC] Move filling namespace map in ClangASTSource to own function
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp (diff)
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.h (diff)
Commit 0a3b0837915e9796ae4279fe704efa663b89d815 by jeremy.morse
[debuginfo-tests] Warn, not error, if we can't delete working directory

On Windows, an error running the debugger typically leaves a process
hanging around in the working directory. When Dexter exits, it can't then
delete the working directory and produces an exception, masking the problem
in the debugger. (This can be worked around by specifying --save-temps).
Rather than hard-erroring, print a warning when we can't delete the working
directory instead.

It'd be much better to improve our error handling, and make the
WorkingDirectory class aware that something's wrong when it enters exit.
However, this is something that's going to mask genuine errors and make
everyones lives harder right now, so I think this non-ideal fix is
important to get in first.

Differential Revision: https://reviews.llvm.org/D74548
The file was modifieddebuginfo-tests/dexter/dex/utils/WorkingDirectory.py (diff)
Commit 305320b0057924ef78978e9df8a0e1f591990a06 by zinenko
[mlir] NFC: move AffineOps tests from test/ to test/Dialect

AffineOps dialect lives under lib/Dialect/AffineOps and so should its
tests.
The file was removedmlir/test/AffineOps/canonicalize.mlir
The file was addedmlir/test/Dialect/AffineOps/ops.mlir
The file was removedmlir/test/AffineOps/load-store.mlir
The file was addedmlir/test/Dialect/AffineOps/load-store-invalid.mlir
The file was removedmlir/test/AffineOps/ops.mlir
The file was addedmlir/test/Dialect/AffineOps/inlining.mlir
The file was addedmlir/test/Dialect/AffineOps/load-store.mlir
The file was removedmlir/test/AffineOps/inlining.mlir
The file was removedmlir/test/AffineOps/invalid.mlir
The file was removedmlir/test/AffineOps/dma.mlir
The file was addedmlir/test/Dialect/AffineOps/dma.mlir
The file was addedmlir/test/Dialect/AffineOps/invalid.mlir
The file was removedmlir/test/AffineOps/memref-stride-calculation.mlir
The file was removedmlir/test/AffineOps/load-store-invalid.mlir
The file was addedmlir/test/Dialect/AffineOps/canonicalize.mlir
The file was addedmlir/test/Dialect/AffineOps/memref-stride-calculation.mlir
Commit 5e6d7246335dc4aa0145bdbd5cea70b886a34133 by herhut
[MLIR][GPU] Properly model step in parallel loop to gpu conversion.

Summary:
The original patch had TODOs to add support for step computations,
which this commit addresses. The computations are expressed using
affine expressions so that the affine canonicalizers can simplify
the full bound and index computations.

Also cleans up the code a little and exposes the pass in the
header file.

Differential Revision: https://reviews.llvm.org/D75052
The file was modifiedmlir/lib/Conversion/LoopsToGPU/LoopsToGPUPass.cpp (diff)
The file was modifiedmlir/test/Conversion/LoopsToGPU/parallel_loop.mlir (diff)
The file was modifiedmlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp (diff)
The file was modifiedmlir/include/mlir/Conversion/LoopsToGPU/LoopsToGPUPass.h (diff)
Commit b8d638d337e76a632d07d61f4cef59e243b961a8 by flo
[DSE,MSSA] Do not attempt to remove un-removable memdefs.

We have to skip MemoryDefs that cannot be removed. This fixes a crash in
the newly added test case and fixes a wrong case in
memset-and-memcpy.ll.
The file was addedllvm/test/Transforms/DeadStoreElimination/MSSA/atomic-todo.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/memset-and-memcpy.ll (diff)
The file was addedllvm/test/Transforms/DeadStoreElimination/MSSA/atomic-overlapping.ll
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp (diff)
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/atomic.ll (diff)
Commit 10ea01d80d6fb81d01856271dbcd6205911d451d by spatel
[VectorCombine] make cost calc consistent for binops and cmps

Code duplication (subsequently removed by refactoring) allowed
a logic discrepancy to creep in here.

We were being conservative about creating a vector binop -- but
not a vector cmp -- in the case where a vector op has the same
estimated cost as the scalar op. We want to be more aggressive
here because that can allow other combines based on reduced
instruction count/uses.

We can reverse the transform in DAGCombiner (potentially with a
more accurate cost model) if this causes regressions.

AFAIK, this does not conflict with InstCombine. We have a
scalarize transform there, but it relies on finding a constant
operand or a matching insertelement, so that means it eliminates
an extractelement from the sequence (so we won't have 2 extracts
by the time we get here if InstCombine succeeds).

Differential Revision: https://reviews.llvm.org/D75062
The file was modifiedllvm/test/Transforms/VectorCombine/X86/extract-binop.ll (diff)
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp (diff)
Commit e0568ef2c5c2e949ccfd5b66cc749fab8fa38e03 by spatel
[VectorCombine] add tests for possible extract->shuffle; NFC
The file was modifiedllvm/test/Transforms/VectorCombine/X86/extract-binop.ll (diff)
The file was modifiedllvm/test/Transforms/VectorCombine/X86/extract-cmp.ll (diff)
Commit 7b6168e7bef1cdc355fd28572bd69ea4057c57f8 by 1.int32
[ASTImporter] Improved variable template redecl chain handling.

Reviewers: martong, a.sidorin, shafik

Reviewed By: martong

Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, teemperor, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74720
The file was modifiedclang/unittests/AST/ASTImporterGenericRedeclTest.cpp (diff)
The file was modifiedclang/lib/AST/ASTImporter.cpp (diff)
Commit 770ad9f55e660e0ec89f61d5579dfafad17ab5f5 by adam.balogh
[Analyzer] Fix for iterator modeling and checkers: handle negative numbers correctly

Currently, using negative numbers in iterator operations (additions and
subractions) results in advancements with huge positive numbers due to
an error. This patch fixes it.

Differential Revision: https://reviews.llvm.org/D74760
The file was modifiedclang/lib/StaticAnalyzer/Checkers/Iterator.cpp (diff)
The file was modifiedclang/test/Analysis/iterator-modelling.cpp (diff)
Commit f452f7b95a8c20f187f67dc57dd4778ba09090b3 by spatel
[PhaseOrdering] add test for missing vector/CSE transforms (PR45015); NFC
The file was addedllvm/test/Transforms/PhaseOrdering/X86/addsub.ll
The file was addedllvm/test/Transforms/PhaseOrdering/X86/lit.local.cfg
Commit 83f4372f3a708ceaa800feff8b1bd92ae2c3be5f by spatel
[CodeGen] fix clang test that runs the optimizer pipeline; NFC

There's already a FIXME note on this file; it can break when the
underlying LLVM behavior changes independently of anything in clang.
The file was modifiedclang/test/CodeGen/complex-math.c (diff)
Commit 7d91fd23dfa8ad33b3d270b6a2b8f6cf6a589a38 by zinenko
[mlir] NFC: update documentation in ConvertLinalgToLLVM

The documentation was describing an obsolete version of the
transformation.
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp (diff)
Commit 91f7f0d8e3ef2b6be07bc9621de075ff11c730c9 by luismarques
[RISCV] Fix sysroot tests without GCC on RISC-V hosts with GCC

D68391 added tests that check scenarios where no RISC-V GCC toolchain is
supposed to be detected. When running the tests on RISC-V hosts the system's
GCC toolchain will be detected, and the tests will fail. This patch adds a
`--gcc-toolchain` option pointing to a path where no GCC toolchain is
present, ensuring that the tests are run under the expected conditions, and
therefore are able to pass in all test environments.

Differential Revision: https://reviews.llvm.org/D75061
The file was modifiedclang/test/Driver/riscv32-toolchain-extra.c (diff)
The file was modifiedclang/test/Driver/riscv64-toolchain-extra.c (diff)
Commit edae4be8e21c5deb9a8ffc24a8c17e70b878bf39 by hans
Fix DfaEmitter::visitDfaState() crash in MSVC x86 debug builds (PR44945)

No functionality change (intended), but this seems to make the code a
bit clearer for the compiler and maybe for human readers too.
The file was modifiedllvm/utils/TableGen/DFAEmitter.cpp (diff)
The file was modifiedllvm/utils/TableGen/DFAEmitter.h (diff)
Commit 2bd6974aaa664f01e8822514295425fee380b131 by jbcoe
[clang-format]  Wrap lines for C# property accessors

Summary: Ensure that auto-implemented properties `{ get; private set }` are wrapped on to one line for C# code.

Reviewers: MyDeveloperDay, krasimir

Reviewed By: MyDeveloperDay, krasimir

Subscribers: cfe-commits

Tags: #clang-format, #clang

Differential Revision: https://reviews.llvm.org/D75006
The file was modifiedclang/lib/Format/UnwrappedLineFormatter.cpp (diff)
The file was modifiedclang/unittests/Format/FormatTestCSharp.cpp (diff)
Commit e16e267bb6ee8dd923bf328fd277d8e637eb34c6 by kkwli0
[OpenMP][cmake] ignore warning on unknown CUDA version

Differential Revision: https://reviews.llvm.org/D75001
The file was modifiedopenmp/runtime/cmake/LibompCheckLinkerFlag.cmake (diff)
Commit dc383f07b080aa3a5725628691163850bc50ae89 by joerg
Stop including sys/param.h from Unix.h
The file was modifiedllvm/lib/Support/Unix/Unix.h (diff)
Commit e09754ccefc8cff7ae5fa18ce73db76339b559f5 by kadircet
[clangd] Migrate Lexer usages in TypeHierarchy to TokenBuffers

Summary:
Also fixes a bug, resulting from directly using ND.getEndLoc() for end
location of the range. As ND.getEndLoc() points to the begining of the last
token, whereas it should point one past the end, since LSP ranges are half open
(exclusive on the end).

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74850
The file was modifiedclang-tools-extra/clangd/test/type-hierarchy.test (diff)
The file was modifiedclang-tools-extra/clangd/XRefs.cpp (diff)
Commit e5513336aee4a9b10cb98f234145aeb4763fdd69 by dkszelethus
[analyzer][MallocChecker][NFC] Change the use of IdentifierInfo* to CallDescription

Exactly what it says on the tin! I decided not to merge this with the patch that
changes all these to a CallDescriptionMap object, so the patch is that much more
trivial.

Differential Revision: https://reviews.llvm.org/D68163
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h (diff)
The file was addedclang/test/Analysis/malloc-annotations.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp (diff)
The file was modifiedclang/test/Analysis/kmalloc-linux.c (diff)
Commit bcda1269c4c4d5d19d2be425c0a52d19fe09f146 by thakis
clang-cl: Add a `/showIncludes:user` flag.

This flag is like /showIncludes, but it only includes user headers and
omits system headers (similar to MD and MMD). The motivation is that
projects that already track system includes though other means can use
this flag to get consistent behavior on Windows and non-Windows, and it
saves tools that output /showIncludes output (e.g. ninja) some work.

implementation-wise, this makes `HeaderIncludesCallback` honor the
existing `IncludeSystemHeaders` bit, and changes the three clients of
`HeaderIncludesCallback` (`/showIncludes`, `-H`, `CC_PRINT_HEADERS=1`)
to pass `-sys-header-deps` to set that bit -- except for
`/showIncludes:user`, which doesn't pass it.

Differential Revision: https://reviews.llvm.org/D75093
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp (diff)
The file was modifiedclang/test/Driver/cl-options.c (diff)
The file was modifiedclang/test/Preprocessor/headermap-rel2.c (diff)
The file was modifiedclang/test/Frontend/print-header-includes.c (diff)
The file was modifiedclang/lib/Frontend/DependencyFile.cpp (diff)
The file was modifiedclang/include/clang/Driver/CLCompatOptions.td (diff)
The file was modifiedclang/lib/Frontend/HeaderIncludeGen.cpp (diff)
Commit ab96ec41ead8fadbbaae4c31ef5096a478772aa6 by jay.foad
[AMDGPU] Precommit some test updates for D68338 "Remove dubious logic in bidirectional list scheduler"
The file was modifiedllvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/add.v2i16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/mad_64_32.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/load-hi16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/sad.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/fneg-combines.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/global_smrd.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll (diff)
Commit fc466f87804f97b322394ef3b9db43ea3febcc15 by benny.kra
Make test not write to the source directory
The file was modifiedclang/test/CodeGen/static-init.cpp (diff)
Commit 425ef999385058143bb927aefe81daddcd43f623 by lebedev.ri
[NFC][InstCombine] Add shift amount reassociation miscompile example from PR44802

https://bugs.llvm.org/show_bug.cgi?id=44802
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation.ll (diff)
Commit 781d077afb0ed9771c513d064c40170c1ccd21c9 by lebedev.ri
[InstCombine] reassociateShiftAmtsOfTwoSameDirectionShifts(): fix miscompile (PR44802)

As input, we have the following pattern:
  Sh0 (Sh1 X, Q), K
We want to rewrite that as:
  Sh x, (Q+K)  iff (Q+K) u< bitwidth(x)
While we know that originally (Q+K) would not overflow
(because  2 * (N-1) u<= iN -1), we may have looked past extensions of
shift amounts. so it may now overflow in smaller bitwidth.

To ensure that does not happen, we need to ensure that the total maximal
shift amount is still representable in that smaller bitwidth.
If the overflow would happen, (Q+K) u< bitwidth(x) check would be bogus.

https://bugs.llvm.org/show_bug.cgi?id=44802
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation.ll (diff)
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineShifts.cpp (diff)
Commit 6f807ca00d951d3e74f7ea4fe1daa8e3560f4c0d by lebedev.ri
[NFC][InstCombine] Add shift amount reassociation in bittest miscompile example from PR44802

https://bugs.llvm.org/show_bug.cgi?id=44802
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll (diff)
Commit 2855c8fed9326ec44526767f1596a4fe4e55dc70 by lebedev.ri
[InstCombine] foldShiftIntoShiftInAnotherHandOfAndInICmp(): fix miscompile (PR44802)

Much like with reassociateShiftAmtsOfTwoSameDirectionShifts(),
as input, we have the following pattern:
  icmp eq/ne (and ((x shift Q), (y oppositeshift K))), 0
We want to rewrite that as:
  icmp eq/ne (and (x shift (Q+K)), y), 0  iff (Q+K) u< bitwidth(x)

While we know that originally (Q+K) would not overflow
(because  2 * (N-1) u<= iN -1), we may have looked past extensions of
shift amounts. so it may now overflow in smaller bitwidth.

To ensure that does not happen, we need to ensure that the total maximal
shift amount is still representable in that smaller bitwidth.
If the overflow would happen, (Q+K) u< bitwidth(x) check would be bogus.

https://bugs.llvm.org/show_bug.cgi?id=44802
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll (diff)
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)
Commit ec1efe71130f5b049e53828281204b50d89d4cf6 by aykevanlaethem
[LLDB] Let DataExtractor deal with two-byte addresses

AVR usually uses two byte addresses. By making DataExtractor deal with
this, it is possible to load AVR binaries that don't have debug info
associated with them.

Differential Revision: https://reviews.llvm.org/D73969
The file was modifiedlldb/unittests/Utility/DataExtractorTest.cpp (diff)
The file was modifiedlldb/source/Utility/DataExtractor.cpp (diff)
Commit deb116ee0a5b80f61bc341ed68606dc5ad093569 by pavel
[DWARFDebugLine] Avoid dumping prologue members we did not parse

Summary:
This patch if motivated by D74560, specifically the subthread about what
to print upon encountering reserved initial length values.

If the debug_line prologue has an unsupported version, we skip parsing
the rest of the data. If we encounter an reserved initial length field,
we don't even parse the version. However, we still print out all members
(with value 0) in the dump function.

This patch introduces early exits in the Prologue::dump function so that
we print only the fields that were parsed successfully. In case of an
unsupported version, we skip printing all subsequent prologue fields --
because we don't even know if this version has those fields. In case of a
reserved unit length, we don't print anything -- if the very first field
of the prologue is invalid, it's hard to say if we even have a prologue
to begin with.

Note that the user will still be able to see the invalid/reserved
initial length value in the error message. I've modified (reordered)
debug_line_invalid.test to show that the error message comes straight
after the debug_line offset. I've also added some flush() calls to the
dumping code to ensure this is the case in all situations (without that,
the warnings could get out of sync if the output was not a terminal -- I
guess this is why std::iostreams have the tie() function).

Reviewers: jhenderson, ikudrin, dblaikie

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75043
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_line_invalid.test (diff)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFContext.cpp (diff)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp (diff)
Commit a82ffe9d93a24abf30bcf63081096ea18baf78dc by Artem Dergachev
[analyzer] Add support for CXXInheritedCtorInitExpr.

So far we've been dropping coverage every time we've encountered
a CXXInheritedCtorInitExpr. This patch attempts to add some
initial support for it.

Constructors for arguments of a CXXInheritedCtorInitExpr are still
not fully supported.

Differential Revision: https://reviews.llvm.org/D74735
The file was modifiedclang/include/clang/Analysis/AnyCall.h (diff)
The file was addedclang/test/Analysis/cxx-inherited-ctor-init-expr.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp (diff)
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp (diff)
The file was modifiedclang/test/Analysis/osobject-retain-release.cpp (diff)
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h (diff)
The file was modifiedclang/lib/StaticAnalyzer/Core/SymbolManager.cpp (diff)
The file was modifiedclang/include/clang/Analysis/ConstructionContext.h (diff)
The file was modifiedclang/lib/StaticAnalyzer/Core/CallEvent.cpp (diff)
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngine.cpp (diff)
The file was modifiedclang/lib/Analysis/RetainSummaryManager.cpp (diff)
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h (diff)
Commit e6d0bad843c4c84bb762cf93a56c5bdd5cc535c0 by hokein.wu
[clang-rename] Add the USR of incomplete decl to the USRSet.

Summary:
This fixes a clangd rename issue, which is missing the reference of
an incomplete specialization.

Unfortunately, I didn't reproduce this issue in clang-rename, I guess
the input `FoundDecl` of AdditionalUSRFinder is different in clangd vs
clang-rename, clang-rename uses the underlying CXXRecordDecl of the
ClassTemplateDecl, which is fixed in https://github.com/llvm/llvm-project/commit/5d862c042b52ae2aad37471d0b83b6c678a520e3;
while clangd-rename uses the ClassTemplateDecl.

Reviewers: kbobyrev

Reviewed By: kbobyrev

Subscribers: ilya-biryukov, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74829
The file was modifiedclang-tools-extra/clangd/unittests/RenameTests.cpp (diff)
The file was modifiedclang/lib/Tooling/Refactoring/Rename/USRFindingAction.cpp (diff)
Commit 93331a17e8b3d6205efc8f1d4e7a74523f3b7035 by maskray
[ELF] Support archive:file syntax in input section descriptions

Fixes https://bugs.llvm.org/show_bug.cgi?id=44450

https://sourceware.org/binutils/docs/ld/Input-Section-Basics.html#Input-Section-Basics
The following two rules are not implemented.

* `archive:` matches every file in the archive.
* `:file` matches a file not in an archive.

Reviewed By: grimar, ruiu

Differential Revision: https://reviews.llvm.org/D75100
The file was modifiedlld/ELF/LinkerScript.cpp (diff)
The file was addedlld/test/ELF/linkerscript/input-archive.s
Commit 33cbd5ee080ecbc1775751d7f5d930ae9b83c8ec by jay.foad
AMDGPU/GlobalISel: Legalize s64 min/max by lowering

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75108
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
Commit 7b65886ec2d0de431959f6b1d1801ef43a958f55 by hokein.wu
Make builtbot happy.

Disable the failing rename test, it should not be failed, needs further
investigation.
The file was modifiedclang/unittests/Rename/RenameClassTest.cpp (diff)
Commit fa755d3e71ed590ac5c62f0e1eff09435c9593fe by anastasia.stulova
[Sema][C++] Propagate conversion kind to specialize the diagnostics

Compute and propagate conversion kind to diagnostics helper in C++
to provide more specific diagnostics about incorrect implicit
conversions in assignments, initializations, params, etc...

Duplicated some diagnostics as errors because C++ is more strict.

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74116
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td (diff)
The file was modifiedclang/test/SemaObjCXX/instantiate-stmt.mm (diff)
The file was modifiedclang/test/Sema/block-call.c (diff)
The file was modifiedclang/test/SemaCXX/int-ptr-cast-SFINAE.cpp (diff)
The file was modifiedclang/test/SemaOpenCL/address-spaces.cl (diff)
The file was modifiedclang/test/CXX/temp/temp.spec/temp.explicit/p10.cpp (diff)
The file was modifiedclang/test/SemaObjCXX/nullability-pragmas.mm (diff)
The file was modifiedclang/test/SemaTemplate/instantiate-member-class.cpp (diff)
The file was modifiedclang/test/Sema/callingconv-sysv_abi.c (diff)
The file was modifiedclang/test/SemaTemplate/extern-templates.cpp (diff)
The file was modifiedclang/test/SemaObjCXX/parameterized_classes_subst.mm (diff)
The file was modifiedclang/test/SemaCXX/addr-of-overloaded-function.cpp (diff)
The file was modifiedclang/test/SemaCXX/ms-property-error.cpp (diff)
The file was modifiedclang/test/SemaObjCXX/arc-type-conversion.mm (diff)
The file was modifiedclang/include/clang/Sema/Sema.h (diff)
The file was modifiedclang/test/SemaObjCXX/noescape.mm (diff)
The file was modifiedclang/test/CXX/conv/conv.fctptr/p1.cpp (diff)
The file was modifiedclang/test/SemaObjCXX/property-invalid-type.mm (diff)
The file was modifiedclang/test/CXX/expr/p13.cpp (diff)
The file was modifiedclang/test/SemaObjC/arc.m (diff)
The file was modifiedclang/test/SemaObjCXX/objc-container-subscripting.mm (diff)
The file was modifiedclang/test/SemaTemplate/temp_arg_nontype.cpp (diff)
The file was modifiedclang/test/CXX/temp/temp.spec/temp.expl.spec/p19.cpp (diff)
The file was modifiedclang/test/OpenMP/allocate_allocator_messages.cpp (diff)
The file was modifiedclang/test/SemaCXX/goto.cpp (diff)
The file was modifiedclang/test/CXX/except/except.handle/p16.cpp (diff)
The file was modifiedclang/test/Sema/preserve-call-conv.c (diff)
The file was modifiedclang/test/SemaObjCXX/comptypes-1.mm (diff)
The file was modifiedclang/test/CXX/temp/temp.spec/temp.explicit/p9.cpp (diff)
The file was modifiedclang/test/SemaTemplate/member-access-expr.cpp (diff)
The file was modifiedclang/test/Sema/callingconv-ms_abi.c (diff)
The file was modifiedclang/test/SemaObjC/comptypes-legal.m (diff)
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp (diff)
The file was modifiedclang/test/Sema/pass-object-size.c (diff)
The file was modifiedclang/test/SemaObjCXX/instantiate-expr.mm (diff)
The file was modifiedclang/test/SemaObjCXX/comptypes-7.mm (diff)
The file was modifiedclang/test/Sema/overloadable.c (diff)
The file was modifiedclang/test/Sema/block-return.c (diff)
The file was modifiedclang/test/Sema/callingconv.c (diff)
The file was modifiedclang/test/CXX/drs/dr3xx.cpp (diff)
The file was modifiedclang/lib/Sema/SemaExpr.cpp (diff)
The file was modifiedclang/test/SemaOpenCL/address-spaces-conversions-cl2.0.cl (diff)
The file was modifiedclang/test/SemaCXX/decl-microsoft-call-conv.cpp (diff)
Commit 11857d49948b845dcfd7c7f78595095e3add012d by xur
[remark][diagnostics] [codegen] Fix PR44896

This patch fixes PR44896. For IR input files, option fdiscard-value-names
should be ignored as we need named values in loadModule().
Commit 60d3947922 sets this option after loadModule() where valued names
already created. This creates an inconsistent state in setNameImpl()
that leads to a seg fault.
This patch forces fdiscard-value-names to be false for IR input files.

This patch also emits a warning of "ignoring -fdiscard-value-names" if
option fdiscard-value-names is explictly enabled in the commandline for
IR input files.

Differential Revision: https://reviews.llvm.org/D74878
The file was modifiedclang/lib/CodeGen/CodeGenAction.cpp (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td (diff)
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp (diff)
The file was addedclang/test/CodeGen/PR44896.ll
Commit 86e13ec194a01744822606f4473d577cbc2c211a by arsenm2
AMDGPU/GlobalISel: Use packed for G_ADD/G_SUB/G_MUL v2s16
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll
Commit ab41129b1ee1f20d772f9eed346c10edcd70396a by Louis Dionne
[libc++] Proper fix for libc++'s modulemap after D68480

Summary:
In libc++, we normally #ifdef out header content instead of #erroring
out when the Standard in use is insufficient for the requirements of
the header.

Reviewers: EricWF

Subscribers: jkorous, dexonsmith, libcxx-commits, teemperor

Tags: #libc

Differential Revision: https://reviews.llvm.org/D75074
The file was modifiedlibcxx/include/barrier (diff)
The file was modifiedlibcxx/include/latch (diff)
The file was addedlibcxx/test/libcxx/modules/stds_include.sh.cpp
The file was modifiedlibcxx/include/semaphore (diff)
Commit 7c2f4a8370829aae5a96b7353fb0727d4e47e8fd by Louis Dionne
[libc++] Revert 03dd205c151 "Adjust max_align_t handling"

That commit was made without approval from a libc++ reviewer, and it
also broke the build in C++03 mode.
The file was modifiedlibcxx/include/cstddef (diff)
The file was modifiedlibcxx/include/new (diff)
The file was modifiedlibcxx/include/stddef.h (diff)
Commit c66db2116507d56818c11b28f838d686c5ae4600 by jay.foad
AMDGPU/GlobalISel: Un-XFAIL a test

This was missed in 12fe9b26ec88bb2dd40d574a644edca302e804b2
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll (diff)
Commit 69da40033106aadbb452c473ec99c002ff801b12 by pavel
Revert "[DWARFDebugLine] Avoid dumping prologue members we did not parse"

The changed test started failing on the windows bots. Reverting while I
investigate.

This reverts commit deb116ee0a5b80f61bc341ed68606dc5ad093569.
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp (diff)
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_line_invalid.test (diff)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFContext.cpp (diff)
Commit 14845b2c459021e3dbf2ead52d707d4a7db40cbb by listmail
Revert "[LICM] Support hosting of dynamic allocas out of loops"

This reverts commit 8d22100f66c4170510c6ff028c60672acfe1cff9.

There was a functional regression reported (https://bugs.llvm.org/show_bug.cgi?id=44996).  I'm not actually sure the patch is wrong, but I don't have time to investigate currently, and this line of work isn't something I'm likely to get back to quickly.
The file was modifiedllvm/lib/Transforms/Scalar/LICM.cpp (diff)
The file was removedllvm/test/Transforms/LICM/hoist-alloca.ll
Commit bf6d94f15981dcffe2bd77a35423e25344ecd47d by Louis Dionne
[libc++] Remove incorrect XFAIL in modules test

Apparently, the test still works on single-threaded systems.
The file was modifiedlibcxx/test/libcxx/modules/stds_include.sh.cpp (diff)
Commit 342eca29749e3169cd9bb3ca0953519a41a7ca0f by lebedev.ri
[NFC][Codegen] Add miscompile test for constant store merging from PR43446

This miscompile was introduced by rL354676 / https://reviews.llvm.org/D58468

https://bugs.llvm.org/show_bug.cgi?id=43446
The file was modifiedllvm/test/CodeGen/X86/stores-merging.ll (diff)
Commit d20907d1de89bf63b589fadd8c096d4895e47fba by lebedev.ri
[Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile

This reverts https://reviews.llvm.org/D58468
(rL354676, 44037d7a6377ec8e5542cced73583283334b516b),
and all and any follow-ups to that code block.

https://bugs.llvm.org/show_bug.cgi?id=43446
The file was modifiedllvm/test/CodeGen/X86/constant-combines.ll (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/stores-merging.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/constant-combines.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/lifetime-alias.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr40631_deadstore_elision.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/ldst-paired-aliasing.ll (diff)
Commit eb1c040b413a3542a7a6db2cae0d0d7bc2728a95 by sd.fertile
[PowerPC][NFC] Remove comments mentioning Darwin and VRSAVE from lit test.
The file was modifiedllvm/test/CodeGen/PowerPC/sjlj.ll (diff)
Commit a12f1d6a52a195831da8f38eece08f271e2aa31b by qcolombet
[MachineInstr] Add a dumpr method

Add a dump method that recursively prints an instruction and all
the instructions defining its operands and so on.

This is helpful when looking at combiner issue.

NFC

Differential Revision: https://reviews.llvm.org/D75094
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h (diff)
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp (diff)
Commit eee22ec3c3712a1089cbdbe66ccf36dd89be507a by Vedant Kumar
[X86MCTargetDesc.h] Speculative fix for macro collision with sys/param.h

See discussion on https://reviews.llvm.org/D75091 for information about
the build failure and alternatives considered.
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h (diff)
Commit a57d9652a0dcc823921f2d4bac29680db5dbef64 by Yaxun.Liu
Make __builtin_amdgcn_dispatch_ptr dereferenceable and align at 4

Differential Revision: https://reviews.llvm.org/D75028
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td (diff)
The file was modifiedclang/test/CodeGenCUDA/builtins-amdgcn.cu (diff)
The file was modifiedclang/test/CodeGenOpenCL/builtins-amdgcn.cl (diff)
Commit 7f3afd480d95e77fb89565455b65b3ebd716aba1 by scott.linder
Emit register names in cfi assembly directives

Update .cfi_undefined, .cfi_register, and .cfi_return_column to
print symbolic register arguments.

Differential Revision: https://reviews.llvm.org/D74914
The file was modifiedllvm/test/MC/X86/return-column.s (diff)
The file was modifiedllvm/test/CodeGen/SPARC/2013-05-17-CallFrame.ll (diff)
The file was modifiedllvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll (diff)
The file was modifiedllvm/test/CodeGen/SPARC/exception.ll (diff)
The file was modifiedllvm/lib/MC/MCAsmStreamer.cpp (diff)
The file was modifiedllvm/test/CodeGen/SPARC/reserved-regs.ll (diff)
Commit 915b4aa1392fc865de9139696780ad5107f6cdc8 by scott.linder
Support emitting .cfi_undefined in CodeGen

This will be used by AMDGPU.

Differential Revision: https://reviews.llvm.org/D74914
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp (diff)
Commit 481b1c83802f730df5876d01ede2054a738ee37e by scott.linder
[AMDGPU] Implement wave64 DWARF register mapping

Summary:
Implement the DWARF register mapping described in
llvm/docs/AMDGPUUsage.rst

This is currently limited to wave64 VGPRs/AGPRs.

This also includes some minor changes in AMDGPUInstPrinter,
AMDGPUMCTargetDesc, and AMDGPUAsmParser to make generating CFI assembly
text and ELF sections possible to ease testing, although complete CFI
support is not yet implemented.

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74915
The file was addedllvm/test/DebugInfo/AMDGPU/print-reg-name.s
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h (diff)
The file was addedllvm/test/DebugInfo/AMDGPU/register-mapping.s
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp (diff)
The file was modifiedllvm/test/DebugInfo/AMDGPU/variable-locations.ll (diff)