Started 37 min ago

Progress:
In progress Build #23311 (Aug 10, 2020 5:01:15 AM)

Changes
  1. [PowerPC] Add intrinsic to read or set FPSCR register (details)
  2. [SyntaxTree] Implement the List construct. (details)
  3. [LoopInterchange] Form LCSSA phis for values in orig outer loop header. (details)
  4. [LoopInterchange] Move instructions from preheader to outer loop header. (details)
  5. [DebugInfo] Don't error for zero-length arange entries (details)

Started by timer (11 times)

This run spent 1 hr 46 min waiting in the queue.

Revision: 74e099cb9569f67ddb4341839eea408abc67e04e
  • refs/remotes/origin/master
Revision: cb3a598c87db2db997401b82dfb3f7f80707194e
  • refs/remotes/origin/master
Revision: 74e099cb9569f67ddb4341839eea408abc67e04e
  • refs/remotes/origin/master