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Summary

  1. [RISCV] Check register class for AMO memory operands (details)
Commit 0113cf193f0610bb1a5dfa0bcd29c41a8965938a by jrtc27
[RISCV] Check register class for AMO memory operands
Summary: AMO memory operands use a custom parser in order to accept both
(reg) and 0(reg). However, the validation predicate used for these
operands was only checking that they were registers, and not the
register class, so non-GPRs (such as FPRs) were also accepted. Thus, fix
this by making the predicate check that they are GPRs.
Reviewers: asb, lenary
Reviewed By: asb, lenary
Subscribers: hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD,
kito-cheng, shiva0217, MaskRay, zzheng, edward-jones, rogfer01,
MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna,
Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72471
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoA.td
The file was modifiedllvm/test/MC/RISCV/rva-aliases-invalid.s
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp