SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [llvm-exegesis][mips] Expand loadImmediate() (details)
  2. [clangd] Remove raw string literals in macros (details)
  3. [X86][SSE] Add knownbits test showing missing (details)
  4. [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant() (details)
Commit 804dd6722762040e7ce7e04bf97b19d9596fee20 by Milos.Stojanovic
[llvm-exegesis][mips] Expand loadImmediate()
Add support for loading 32-bit immediates and enable the use of GPR64
registers.
Differential Revision: https://reviews.llvm.org/D71873
The file was addedllvm/test/tools/llvm-exegesis/Mips/latency-GPR64.s
The file was modifiedllvm/tools/llvm-exegesis/lib/Mips/Target.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/TargetTest.cpp
Commit b96ec492d34ecf31fd2c8d2f0033f00e36cc2b9c by oliver.stannard
[clangd] Remove raw string literals in macros
Older (but still supported) versions of GCC don't handle C++11 raw
string literals in macro parameters correctly.
The file was modifiedclang-tools-extra/clangd/unittests/FormattedStringTests.cpp
Commit 7efc7ca8edf6762dc64472417dabfbbdd838ceeb by llvm-dev
[X86][SSE] Add knownbits test showing missing
getValidMinimumShiftAmountConstant() ISD::SHL support
As mentioned on D72573
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
Commit ef5debac4302cd479ddd9e784a5b5acc8c2b9804 by llvm-dev
[SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant()
ISD::SHL support
As mentioned on D72573
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp