Commit
ac2717bfdd0d36ce4b5c33661045a36db3c0cc45
by samuel.tebbs[ARM][LowOverheadLoops] Fix tests after ef0b9f3
ef0b9f3 didn't update the tests that it affected.
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 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/iv-two-vcmp.mir |
 | llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/iv-vcmp.mir |
Commit
a909a84ef2d9220242512b8be1206ee3d9b3d8b9
by kbobyrev[clang-tidy] Improve documentation on Clangd integration
The integration is already complete; this patch updates information as well as suggests using Clang-Tidy via Clangd integration that is vastly available in most editors through LSP client plugins.
Reviewed By: hokein
Differential Revision: https://reviews.llvm.org/D87686
|
 | clang-tools-extra/docs/clang-tidy/Integrations.rst |
Commit
3f682611ab26442fb2a5fd49f44c6f032150a2e6
by llvm-dev[DAG] Remover getOperand() call. NFCI.
|
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
Commit
3e5a4ef51a1d0def10525b2059f5cdab0cb0ae8d
by kbobyrevFix table formatting after D87686
|
 | clang-tools-extra/docs/clang-tidy/Integrations.rst |
Commit
86172ce378169743bf82d9e69e6f428ec8ee81d1
by sam.parker[ARM] Add more validForTailPredication
Modify the unit test to inspect all MVE instructions and mark the load/store/move of vpr/p0 as valid, as well as the remaining scalar shifts.
Differential Revision: https://reviews.llvm.org/D87753
|
 | llvm/lib/Target/ARM/ARMInstrMVE.td |
 | llvm/unittests/Target/ARM/MachineInstrTest.cpp |
 | llvm/lib/Target/ARM/ARMInstrVFP.td |
Commit
a63b2a4614b6b776cffcc0ab033e288024aa73b9
by sam.parker[ARM] Fix tail predication predicate tracking
Clear the CurrentPredicate when we find an instruction which would completely overwrite the VPR. This fix essentially means we're back to not really being able to handle VPT instructions when tail predicating.
Differential Revision: https://reviews.llvm.org/D87610
|
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir |
 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/remat-vctp.ll |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-blocks.mir |
Commit
7029e5d4ca20d20982da8efe89de27acd8d7d75b
by adamcz[clangd] Actually parse Index section of the YAML file.
This fixes a bug in dbf486c0de92c76df77c1a1f815cf16533ecbb3a, which introduced the Index section of the config, but did not register the parse method, so it didn't work in a YAML file (but did in a test).
Differential Revision: https://reviews.llvm.org/D87710
|
 | clang-tools-extra/clangd/ConfigYAML.cpp |
 | clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp |
Commit
779a2a2edcea89ad5f5bf99eeac90516542159d9
by adam.balogh[clang-tidy] Crash fix for bugprone-misplaced-pointer-arithmetic-in-alloc
Placement new operators on non-object types cause crash in `bugprone-misplaced-pointer-arithmetic-in-alloc`. This patch fixes this issue.
Differential Revision: https://reviews.llvm.org/D87683
|
 | clang-tools-extra/test/clang-tidy/checkers/bugprone-misplaced-pointer-arithmetic-in-alloc.cpp |
 | clang-tools-extra/clang-tidy/bugprone/MisplacedPointerArithmeticInAllocCheck.cpp |
Commit
dbd45b2db8e0c396fa20d4c72734c4f31f54af96
by adam.balogh[ASTMatchers] Fix `hasBody` for the descendants of `FunctionDecl`
//AST Matcher// `hasBody` is a polymorphic matcher that behaves differently for loop statements and function declarations. The main difference is the for functions declarations it does not only call `FunctionDecl::getBody()` but first checks whether the declaration in question is that specific declaration which has the body by calling `FunctionDecl::doesThisDeclarationHaveABody()`. This is achieved by specialization of the template `GetBodyMatcher`. Unfortunately template specializations do not catch the descendants of the class for which the template is specialized. Therefore it does not work correcly for the descendants of `FunctionDecl`, such as `CXXMethodDecl`, `CXXConstructorDecl`, `CXXDestructorDecl` etc. This patch fixes this issue by using a template metaprogram.
The patch also introduces a new matcher `hasAnyBody` which matches declarations which have a body present in the AST but not necessarily belonging to that particular declaration.
Differential Revision: https://reviews.llvm.org/D87527
|
 | clang/include/clang/ASTMatchers/ASTMatchersInternal.h |
 | clang-tools-extra/clang-tidy/modernize/UseEqualsDeleteCheck.cpp |
 | clang/include/clang/ASTMatchers/ASTMatchers.h |
 | clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
Commit
4abb5cd83902f1351db473c720ee0b95ebdcb338
by llvm-devCGBlocks.cpp - assert non-null CGF pointer. NFCI.
Fixes static analyzer warning.
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 | clang/lib/CodeGen/CGBlocks.cpp |
Commit
aa1e15dda9e5941611f2183ba34087c2d02beb1a
by llvm-devTokenAnnotator.cpp - remove useless pointer null test. NFCI.
We dereference the Left pointer throughout the parseParens() function apart from this single case - just add an non-null assertion and drop the check.
Fixes clang static analayzer null dereference warning.
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 | clang/lib/Format/TokenAnnotator.cpp |
Commit
439f5749d978acfa69f1a2d20c797c3fc0d97989
by llvm-dev[AST] ASTReader::ReadModuleMapFileBlock - assert non-null Module. NFCI.
At this stage the Module* shouldn't be null - add an assert to fix a clang static analyzer warning.
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 | clang/lib/Serialization/ASTReader.cpp |
Commit
f5c7102dbc7223e98ce5c0f02b343ed92062987c
by sam.mccallUpdate dead links to Itanium and ARM ABIs. NFC
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 | clang/lib/CodeGen/ItaniumCXXABI.cpp |
Commit
0a0abc0ede0ff8015e30aae89a3f89c7dc5b3f0f
by llvm-dev[Sema] isOpenMPCapturedDecl - assert we locate CapturedRegionScopeInfo. NFCI.
Fixes clang static analayzer null dereference warning.
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 | clang/lib/Sema/SemaOpenMP.cpp |
Commit
1c421046d742102e7016567d41a9db6a1fb61906
by sam.parker[RDA] Fix getUniqueReachingDef for self loops
We've fixed the case where this could return an instruction after the given instruction, but also means that we can falsely return a 'unique' def when they could be one coming from the backedge of a loop.
Differential Revision: https://reviews.llvm.org/D87751
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 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir |
 | llvm/lib/CodeGen/ReachingDefAnalysis.cpp |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-opcode-liveout.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-operand-liveout.mir |
 | llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-add-operand-liveout.mir |
Commit
158989184e9c6bfec25cefe55022dd41894a54dd
by spatel[SLP] change poorly named variable; NFC
'V' shadows a function argument.
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
bbad998bab52a1eabbb6a1ca16cc2129b3f99aa5
by spatel[SLP] move loop index variable declaration to its use; NFC
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 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
0cee1bf5d17dd424c569df7e2604be10906bd515
by spatel[SLP] remove redundant size check; NFC
We bail out on small array size anyway.
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 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
6a23668e78b05703ccba552e09b09b8055924bb6
by spatel[SLP] remove uses of 'auto' that obscure functionality; NFC
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
3ce9ec0cfa9e3690df8a345636d6fa3e385610c3
by sam.parker[ARM] Reorder some logic
Re-order some checks in ValidateMVEInst.
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 | llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
Commit
4dd9c709ef1b59f0ec8e71100c624ec946b95fe2
by mydeveloperday[clang-format] [NFC] Fix spelling mistake in the documentation
Ensure ClangFormatStyleOptions.rst can be regenerated from Format.h
Patch By: YangZhihui
Reviewed By: MyDeveloperDay
Differential Revision: https://reviews.llvm.org/D87352
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 | clang/docs/ClangFormatStyleOptions.rst |
 | clang/include/clang/Format/Format.h |
Commit
24238f09edb98b0f460aa41139874ae5d4e5cd8d
by spatel[SLP] fix formatting; NFC
Also move variable declarations closer to usage and add code comments.
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 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
|
 | llvm/docs/TableGen/ProgRef.rst |
Commit
4341c6618decb4014a167bc83aeeed49ab49b34f
by a.bataev[OPENMP]Do not allow threadprivates as base for array-like reduction.
The base must be shared between the threads, threadprivates are not allowed to be bases for array-like reductions.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D85762
|
 | clang/lib/Sema/SemaOpenMP.cpp |
 | clang/test/OpenMP/parallel_reduction_messages.cpp |
Commit
cb9528a0420e01caf7f3dc8288a11258fcf1425d
by flo[DSE] Add another test cases with loop carried dependence.
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 | llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loop-carried-dependence.ll |
Commit
855ec517a300daee6acb48474b6d3304c0914c60
by zinenko[mlir] Model StringRef in C API
Numerous MLIR functions return instances of `StringRef` to refer to a non-owning fragment of a string (usually owned by the context). This is a relatively simple class that is defined in LLVM. Provide a simple wrapper in the MLIR C API that contains the pointer and length of the string fragment and use it for Standard attribute functions that return StringRef instead of the previous, callback-based mechanism.
Reviewed By: stellaraccident
Differential Revision: https://reviews.llvm.org/D87677
|
 | mlir/docs/CAPI.md |
 | mlir/lib/Bindings/Python/IRModules.cpp |
 | mlir/lib/CAPI/IR/CMakeLists.txt |
 | mlir/include/mlir/CAPI/Support.h |
 | mlir/lib/CAPI/IR/StandardAttributes.cpp |
 | mlir/include/mlir-c/Support.h |
 | mlir/include/mlir-c/StandardAttributes.h |
 | mlir/lib/CAPI/IR/Support.cpp |
 | mlir/test/CAPI/ir.c |
Commit
01e2b394ee16502440dbbb5440502a1e2aaf1477
by flo[Partial Inliner] Compute intrinsic cost through TTI
https://bugs.llvm.org/show_bug.cgi?id=45932
assert(OutlinedFunctionCost >= Cloner.OutlinedRegionCost && "Outlined function cost should be no less than the outlined region") getting triggered in computeBBInlineCost.
Intrinsics like "assume" are considered regular function calls while computing costs. This patch enables computeBBInlineCost to queries TTI for intrinsic call cost.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D87132
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 | llvm/test/Transforms/PartialInlining/intrinsic-call-cost.ll |
 | llvm/lib/Transforms/IPO/PartialInlining.cpp |
Commit
8c0dc1e38b6c1a2d35c66ac4b0c1ccd616dd1685
by ntvEnable inlining for Linalg dialect
Enable inlining for Linalg dialect.
Differential Revision: https://reviews.llvm.org/D87567
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 | mlir/lib/Dialect/Linalg/IR/LinalgTypes.cpp |
 | mlir/test/Dialect/Linalg/inlining.mlir |
Commit
d9953d155493bf11a2276e202800f844a1d02396
by clementval[mlir][openacc] Add missing operands for acc.parallel operation
Add missing operands to represent copin with readonly modifier, copyout with zero modifier, create with zero modifier and default clause.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D87733
|
 | mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td |
 | mlir/test/Dialect/OpenACC/ops.mlir |
 | mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp |
Commit
aa4b0b755a02d69f7f20fddf1d011b0f67a0d207
by llvm-dev[X86][SSE] Move VZEXT_MOVL(INSERT_SUBVECTOR(UNDEF,X,0)) handling into combineTargetShuffle.
Now that we're getting better at combining shuffles of different vector widths, this can now be performed as part of the standard target shuffle combines and isn't required for cleanup.
Exposed a minor issue in combineX86ShufflesRecursively where we failed to check if a shuffle's src ops were simple types.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
54bb9e86498010c631a40dbd82617c433beea712
by jay.foad[AMDGPU] Add -show-mc-encoding to setreg tests
This is a pre-commit for D87446 "[AMDGPU] Enable scheduling around FP MODE-setting instructions"
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll |
Commit
90777e2924ec7f99a3f1b718a636f47036012514
by jay.foad[AMDGPU] Enable scheduling around FP MODE-setting instructions
Pre-gfx10 all MODE-setting instructions were S_SETREG_B32 which is marked as having unmodeled side effects, which makes the machine scheduler treat it as a barrier. Now that we have proper implicit $mode operands we can use a no-side-effects S_SETREG_B32_mode pseudo instead for setregs that only touch the FP MODE bits, to give the scheduler more freedom.
Differential Revision: https://reviews.llvm.org/D87446
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 | llvm/lib/Target/AMDGPU/SOPInstructions.td |
 | llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
 | llvm/lib/Target/AMDGPU/SIFoldOperands.cpp |
 | llvm/test/CodeGen/AMDGPU/frem.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll |
 | llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll |
 | llvm/lib/Target/AMDGPU/SIModeRegister.cpp |
Commit
cd4615120233c54034b42bafc3d2bcc9f29db63d
by llvm-dev[X86] Assert that we've found a terminator instruction. NFCI.
Fixes clang static analayzer null dereference warning.
|
 | llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp |
Commit
833b3b0d3a2ff4b8243940eef1a960050ec48682
by sebastian.neubauer[AMDGPU] Add v3f16/v3i16 support to SDag
Fix lowering and instruction selection for v3x16 types and enable InstCombine to emit them.
This patch only implements it for the selection dag. GlobalISel tests in GlobalISel/llvm.amdgcn.image.load.1d.d16.ll and GlobalISel/llvm.amdgcn.image.store.2d.d16.ll still don't work.
Differential Revision: https://reviews.llvm.org/D84420
|
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.d16.ll |
 | llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.td |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.d16.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll |
 | llvm/lib/Target/AMDGPU/BUFInstructions.td |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.d16.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.format.d16.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.d16.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
 | llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.d16.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.format.d16.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll |
Commit
71131db6895430d1c027712677a99a573eb7545f
by arsenm2AMDGPU: Improve <2 x i24> arguments and return value handling
This was asserting for GlobalISel. For SelectionDAG, this was passing this on the stack. Instead, scalarize this as if it were a 32-bit vector.
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 | llvm/test/CodeGen/AMDGPU/fshr.ll |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
 | llvm/test/CodeGen/AMDGPU/call-return-types.ll |
 | llvm/test/CodeGen/AMDGPU/function-args.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll |
Commit
6e85c3d5c786f0d3878d7f79503e8641d1b7030b
by mtrofin[NFC][Regalloc] accessors for 'reg' and 'weight'
Also renamed the fields to follow style guidelines.
Accessors help with readability - weight mutation, in particular, is easier to follow this way.
Differential Revision: https://reviews.llvm.org/D87725
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 | llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp |
 | llvm/lib/CodeGen/TargetRegisterInfo.cpp |
 | llvm/lib/CodeGen/LiveInterval.cpp |
 | llvm/lib/CodeGen/RegAllocBasic.cpp |
 | llvm/lib/CodeGen/StackSlotColoring.cpp |
 | llvm/lib/CodeGen/InlineSpiller.cpp |
 | llvm/lib/CodeGen/LiveIntervals.cpp |
 | llvm/lib/CodeGen/LiveIntervalUnion.cpp |
 | llvm/lib/CodeGen/MachineVerifier.cpp |
 | llvm/lib/CodeGen/LiveRegMatrix.cpp |
 | llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp |
 | llvm/lib/CodeGen/LiveRangeEdit.cpp |
 | llvm/lib/CodeGen/RenameIndependentSubregs.cpp |
 | llvm/lib/CodeGen/RegAllocPBQP.cpp |
 | llvm/lib/CodeGen/CalcSpillWeights.cpp |
 | llvm/lib/CodeGen/SplitKit.cpp |
 | llvm/lib/CodeGen/LiveDebugVariables.cpp |
 | llvm/lib/CodeGen/LiveIntervalCalc.cpp |
 | llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp |
 | llvm/include/llvm/CodeGen/LiveRangeEdit.h |
 | llvm/lib/CodeGen/RegisterCoalescer.cpp |
 | llvm/lib/CodeGen/RegAllocGreedy.cpp |
 | llvm/include/llvm/CodeGen/LiveInterval.h |
 | llvm/lib/CodeGen/RegAllocBase.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp |
Commit
b2c931eff3cd6f88426ef26d233fab1fabaa0b7e
by llvm-dev[X86] EmitInstrWithCustomInserter - remove redundant getDebugLoc() calls. NFCI.
Use the same DebugLoc that is called at the top of the method.
Fixes some Wshadow static analyzer warnings.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
f0546173fa4bdde03ecb21a174fcaa8a6490adbd
by benny.kra[ASTMatchers] Add missing definition for decompositionDecl
Otherwise we'd get a linker error whenever decompositionDecl is ODR used.
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 | clang/lib/ASTMatchers/ASTMatchersInternal.cpp |
Commit
06d058afecdf54021fbf8fece422dd04766227ea
by dmitry.preobrazhensky[AMDGPU] Corrected directive to use for ELF weak refs
WeakRefDirective should specify a directive to declare "a global as being a weak undefined symbol". The directive used by AMDGPU was incorrect - ".weakref" was intended for other purposes. The correct directive is ".weak" and it is already defined as default for ELF. So the redefinition was removed.
Reviewers: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D87762
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 | llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/hsa-globals.ll |
Commit
09c342493d89c2f32602f911e5c919742b837e10
by aeubanks[NPM] Translate alias analysis into require<> as well
'require<globals-aa>' is needed to make globals-aa work in NPM, since globals-aa is a module analysis but function passes cannot run module analyses on demand. So don't skip translating alias analyses to 'require<>'.
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D87743
|
 | llvm/lib/Passes/PassBuilder.cpp |
 | llvm/tools/opt/NewPMDriver.cpp |
 | llvm/test/Analysis/GlobalsModRef/no-escape.ll |
Commit
15e9a6c2118fa3db2c80043e6679da5dcc72b3a7
by francesco.petrogalli[llvm][CodeGen] Do not scalarize `llvm.masked.[gather|scatter]` operating on scalable vectors.
This patch prevents the `llvm.masked.gather` and `llvm.masked.scatter` intrinsics to be scalarized when invoked on scalable vectors.
The change in `Function.cpp` is needed to prevent the warning that is raised when `getNumElements` is used in place of `getElementCount` on `VectorType` instances. The tests guards for regressions on this change.
The tests makes sure that calls to `llvm.masked.[gather|scatter]` are still scalarized when:
# the intrinsics are operating on fixed size vectors, and # the compiler is not targeting fixed length SVE code generation.
Reviewed By: efriedma, sdesmalen
Differential Revision: https://reviews.llvm.org/D86249
|
 | llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp |
 | llvm/lib/IR/Function.cpp |
 | llvm/test/CodeGen/AArch64/llvm-masked-gather-legal-for-sve.ll |
 | llvm/test/CodeGen/AArch64/llvm-masked-scatter-legal-for-sve.ll |
Commit
cb64455faa36d6ac12759fa4ec4dd05847cb1b90
by jay.foad[AMDGPU] Remove obsolete comment
Obsoleted by e4464bf3d45848461630e3771d66546d389f1ed5 "AMDGPU/GlobalISel: Select scalar v2s16 G_BUILD_VECTOR"
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 | llvm/lib/Target/AMDGPU/SIInstructions.td |
Commit
b5c3efeb7bc9861dc04a1b00a4c0183bdfa9b582
by sjoerd.meijer[ARM][MVE] Tail-predication: predicate new elementcount checks on force-enabled
Additional sanity checks were added to get.active.lane.mask's second argument, the loop tripcount/elementcount, in rG635b87511ec3. Like the other (overflow) checks, skip this if tail-predication is forced.
Differential Revision: https://reviews.llvm.org/D87769
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 | llvm/lib/Target/ARM/MVETailPredication.cpp |
Commit
c27b64bbe1bf96642b5b1e0babde7886bb30c84f
by aeubanks[Coro][NewPM] Handle llvm.coro.prepare.retcon in NPM coro-split pass
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D87731
|
 | llvm/lib/Transforms/Coroutines/CoroSplit.cpp |
 | llvm/test/Transforms/Coroutines/coro-retcon-frame.ll |
Commit
66df98945e08906ce4a057245fda81f631cfd3ae
by mascasa[libfuzzer] Reduce default verbosity when printing large mutation sequences
When using a custom mutator (e.g. thrift mutator, similar to LPM) that calls back into libfuzzer's mutations via `LLVMFuzzerMutate`, the mutation sequences needed to achieve new coverage can get prohibitively large.
Printing these large sequences has two downsides:
1) It makes the logs hard to understand for a human. 2) The performance cost slows down fuzzing.
In this patch I change the `PrintMutationSequence` function to take a max number of entries, to achieve this goal. I also update `PrintStatusForNewUnit` to default to printing only 10 entries, in the default verbosity level (1), requiring the user to set verbosity to 2 if they want the full mutation sequence.
For our use case, turning off verbosity is not an option, as that would also disable `PrintStats()` which is very useful for infrastructure that analyzes the logs in realtime. I imagine most users of libfuzzer always want those logs in the default.
I built a fuzzer locally with this patch applied to libfuzzer.
When running with the default verbosity, I see logs like this:
#65 NEW cov: 4799 ft: 10443 corp: 41/1447Kb lim: 64000 exec/s: 1 rss: 575Mb L: 28658/62542 MS: 196 Custom-CrossOver-ChangeBit-EraseBytes-ChangeBit-ChangeBit-ChangeBit-CrossOver-ChangeBit-CrossOver- DE: "\xff\xff\xff\x0e"-"\xfe\xff\xff\x7f"-"\xfe\xff\xff\x7f"-"\x17\x00\x00\x00\x00\x00\x00\x00"-"\x00\x00\x00\xf9"-"\xff\xff\xff\xff"-"\xfa\xff\xff\xff"-"\xf7\xff\xff\xff"-"@\xff\xff\xff\xff\xff\xff\xff"-"E\x00"- #67 NEW cov: 4810 ft: 10462 corp: 42/1486Kb lim: 64000 exec/s: 1 rss: 577Mb L: 39823/62542 MS: 135 Custom-CopyPart-ShuffleBytes-ShuffleBytes-ChangeBit-ChangeBinInt-EraseBytes-ChangeBit-ChangeBinInt-ChangeBit- DE: "\x01\x00\x00\x00\x00\x00\x01\xf1"-"\x00\x00\x00\x07"-"\x00\x0d"-"\xfd\xff\xff\xff"-"\xfe\xff\xff\xf4"-"\xe3\xff\xff\xff"-"\xff\xff\xff\xf1"-"\xea\xff\xff\xff"-"\x00\x00\x00\xfd"-"\x01\x00\x00\x05"-
Staring hard at the logs it's clear that the cap of 10 is applied.
When running with verbosity level 2, the logs look like the below:
#66 NEW cov: 4700 ft: 10188 corp: 37/1186Kb lim: 64000 exec/s: 2 rss: 509Mb L: 47616/61231 MS: 520 Custom-CopyPart-ChangeBinInt-ChangeBit-ChangeByte-EraseBytes-PersAutoDict-CopyPart-ShuffleBytes-ChangeBit-ShuffleBytes-CopyPart-EraseBytes-CopyPart-ChangeBinInt-CopyPart-ChangeByte-ShuffleBytes-ChangeBinInt-ShuffleBytes-ChangeBit-CMP-ShuffleBytes-ChangeBit-CrossOver-ChangeBinInt-ChangeByte-ShuffleBytes-CrossOver-EraseBytes-ChangeBinInt-InsertRepeatedBytes-PersAutoDict-InsertRepeatedBytes-InsertRepeatedBytes-CrossOver-ChangeByte-ShuffleBytes-CopyPart-ShuffleBytes-CopyPart-CrossOver-ChangeBit-ShuffleBytes-CrossOver-PersAutoDict-ChangeByte-ChangeBit-ShuffleBytes-CrossOver-ChangeByte-EraseBytes-CopyPart-ChangeBinInt-PersAutoDict-CrossOver-ShuffleBytes-CrossOver-CrossOver-EraseBytes-CrossOver-EraseBytes-CrossOver-ChangeBit-ChangeBinInt-ChangeByte-EraseBytes-ShuffleBytes-ShuffleBytes-ChangeBit-EraseBytes-ChangeBinInt-ChangeBit-ChangeBinInt-CopyPart-EraseBytes-PersAutoDict-EraseBytes-CopyPart-ChangeBinInt-ChangeByte-CrossOver-ChangeBinInt-ShuffleBytes-PersAutoDict-PersAutoDict-ChangeBinInt-CopyPart-ChangeBinInt-CrossOver-ChangeBit-ChangeBinInt-CopyPart-ChangeByte-ChangeBit-CopyPart-CrossOver-ChangeByte-ChangeBit-ChangeByte-ShuffleBytes-CMP-ChangeBit-CopyPart-ChangeBit-ChangeByte-ChangeBinInt-PersAutoDict-ChangeBinInt-CrossOver-ChangeBinInt-ChangeBit-ChangeBinInt-ChangeBinInt-PersAutoDict-ChangeBinInt-ChangeBinInt-ChangeByte-CopyPart-ShuffleBytes-ChangeByte-ChangeBit-ChangeByte-ChangeByte-EraseBytes-CrossOver-ChangeByte-ChangeByte-EraseBytes-EraseBytes-InsertRepeatedBytes-ShuffleBytes-CopyPart-CopyPart-ChangeBit-ShuffleBytes-PersAutoDict-ShuffleBytes-ChangeBit-ChangeByte-ChangeBit-ShuffleBytes-ChangeByte-ChangeBinInt-CrossOver-ChangeBinInt-ChangeBit-EraseBytes-CopyPart-ChangeByte-CrossOver-EraseBytes-CrossOver-ChangeByte-ShuffleBytes-ChangeByte-ChangeBinInt-CrossOver-ChangeByte-InsertRepeatedBytes-InsertByte-ShuffleBytes-PersAutoDict-ChangeBit-ChangeByte-ChangeBit-ShuffleBytes-ShuffleBytes-CopyPart-ShuffleBytes-EraseBytes-ShuffleBytes-ShuffleBytes-CrossOver-ChangeBinInt-CopyPart-CopyPart-CopyPart-EraseBytes-EraseBytes-ChangeByte-ChangeBinInt-ShuffleBytes-CMP-InsertByte-EraseBytes-ShuffleBytes-CopyPart-ChangeBit-CrossOver-CopyPart-CopyPart-ShuffleBytes-ChangeByte-ChangeByte-ChangeBinInt-EraseBytes-ChangeByte-ChangeBinInt-ChangeBit-ChangeBit-ChangeByte-ShuffleBytes-PersAutoDict-PersAutoDict-CMP-ChangeBit-ShuffleBytes-PersAutoDict-ChangeBinInt-EraseBytes-EraseBytes-ShuffleBytes-ChangeByte-ShuffleBytes-ChangeBit-EraseBytes-CMP-ShuffleBytes-ChangeByte-ChangeBinInt-EraseBytes-ChangeBinInt-ChangeByte-EraseBytes-ChangeByte-CrossOver-ShuffleBytes-EraseBytes-EraseBytes-ShuffleBytes-ChangeBit-EraseBytes-CopyPart-ShuffleBytes-ShuffleBytes-CrossOver-CopyPart-ChangeBinInt-ShuffleBytes-CrossOver-InsertByte-InsertByte-ChangeBinInt-ChangeBinInt-CopyPart-EraseBytes-ShuffleBytes-ChangeBit-ChangeBit-EraseBytes-ChangeByte-ChangeByte-ChangeBinInt-CrossOver-ChangeBinInt-ChangeBinInt-ShuffleBytes-ShuffleBytes-ChangeByte-ChangeByte-ChangeBinInt-ShuffleBytes-CrossOver-EraseBytes-CopyPart-CopyPart-CopyPart-ChangeBit-ShuffleBytes-ChangeByte-EraseBytes-ChangeByte-InsertRepeatedBytes-InsertByte-InsertRepeatedBytes-PersAutoDict-EraseBytes-ShuffleBytes-ChangeByte-ShuffleBytes-ChangeBinInt-ShuffleBytes-ChangeBinInt-ChangeBit-CrossOver-CrossOver-ShuffleBytes-CrossOver-CopyPart-CrossOver-CrossOver-CopyPart-ChangeByte-ChangeByte-CrossOver-ChangeBit-ChangeBinInt-EraseBytes-ShuffleBytes-EraseBytes-CMP-PersAutoDict-PersAutoDict-InsertByte-ChangeBit-ChangeByte-CopyPart-CrossOver-ChangeByte-ChangeBit-ChangeByte-CopyPart-ChangeBinInt-EraseBytes-CrossOver-ChangeBit-CrossOver-PersAutoDict-CrossOver-ChangeByte-CrossOver-ChangeByte-ChangeByte-CrossOver-ShuffleBytes-CopyPart-CopyPart-ShuffleBytes-ChangeByte-ChangeByte-ChangeBinInt-ChangeBinInt-ChangeBinInt-ChangeBinInt-ShuffleBytes-CrossOver-ChangeBinInt-ShuffleBytes-ChangeBit-PersAutoDict-ChangeBinInt-ShuffleBytes-ChangeBinInt-ChangeByte-CrossOver-ChangeBit-CopyPart-ChangeBit-ChangeBit-CopyPart-ChangeByte-PersAutoDict-ChangeBit-ShuffleBytes-ChangeByte-ChangeBit-CrossOver-ChangeByte-CrossOver-ChangeByte-CrossOver-ChangeBit-ChangeByte-ChangeBinInt-PersAutoDict-CopyPart-ChangeBinInt-ChangeBit-CrossOver-ChangeBit-PersAutoDict-ShuffleBytes-EraseBytes-CrossOver-ChangeByte-ChangeBinInt-ShuffleBytes-ChangeBinInt-InsertRepeatedBytes-PersAutoDict-CrossOver-ChangeByte-Custom-PersAutoDict-CopyPart-CopyPart-ChangeBinInt-ShuffleBytes-ChangeBinInt-ChangeBit-ShuffleBytes-CrossOver-CMP-ChangeByte-CopyPart-ShuffleBytes-CopyPart-CopyPart-CrossOver-CrossOver-CrossOver-ShuffleBytes-ChangeByte-ChangeBinInt-ChangeBit-ChangeBit-ChangeBit-ChangeByte-EraseBytes-ChangeByte-ChangeBit-ChangeByte-ChangeByte-CopyPart-PersAutoDict-ChangeBinInt-PersAutoDict-PersAutoDict-PersAutoDict-CopyPart-CopyPart-CrossOver-ChangeByte-ChangeBinInt-ShuffleBytes-ChangeBit-CopyPart-EraseBytes-CopyPart-CopyPart-CrossOver-ChangeByte-EraseBytes-ShuffleBytes-ChangeByte-CopyPart-EraseBytes-CopyPart-CrossOver-ChangeBinInt-ChangeBinInt-InsertByte-ChangeBinInt-ChangeBit-ChangeByte-CopyPart-ChangeByte-EraseBytes-ChangeByte-ChangeBit-ChangeByte-ShuffleBytes-CopyPart-ChangeBinInt-EraseBytes-CrossOver-ChangeBit-ChangeBit-CrossOver-EraseBytes-ChangeBinInt-CopyPart-CopyPart-ChangeBinInt-ChangeBit-EraseBytes-InsertRepeatedBytes-EraseBytes-ChangeBit-CrossOver-CrossOver-EraseBytes-EraseBytes-ChangeByte-CopyPart-CopyPart-ShuffleBytes-ChangeByte-ChangeBit-ChangeByte-EraseBytes-ChangeBit-ChangeByte-ChangeByte-CrossOver-CopyPart-EraseBytes-ChangeByte-EraseBytes-ChangeByte-ShuffleBytes-ShuffleBytes-ChangeByte-CopyPart-ChangeByte-ChangeByte-ChangeBit-CopyPart-ChangeBit-ChangeBinInt-CopyPart-ShuffleBytes-ChangeBit-ChangeBinInt-ChangeBit-EraseBytes-CMP-CrossOver-CopyPart-ChangeBinInt-CrossOver-CrossOver-CopyPart-CrossOver-CrossOver-InsertByte-InsertByte-CopyPart-Custom- DE: "warn"-"\x00\x00\x00\x80"-"\xfe\xff\xff\xfb"-"\xff\xff"-"\x10\x00\x00\x00"-"\xfe\xff\xff\xff"-"\xff\xff\xff\xf6"-"U\x01\x00\x00\x00\x00\x00\x00"-"\xd9\xff\xff\xff"-"\xfe\xff\xff\xea"-"\xf0\xff\xff\xff"-"\xfc\xff\xff\xff"-"warn"-"\xff\xff\xff\xff"-"\xfe\xff\xff\xfb"-"\x00\x00\x00\x80"-"\xfe\xff\xff\xf1"-"\xfe\xff\xff\xea"-"\x00\x00\x00\x00\x00\x00\x012"-"\xe2\x00"-"\xfb\xff\xff\xff"-"\x00\x00\x00\x00"-"\xe9\xff\xff\xff"-"\xff\xff"-"\x00\x00\x00\x80"-"\x01\x00\x04\xc9"-"\xf0\xff\xff\xff"-"\xf9\xff\xff\xff"-"\xff\xff\xff\xff\xff\xff\xff\x12"-"\xe2\x00"-"\xfe\xff\xff\xff"-"\xfe\xff\xff\xea"-"\xff\xff\xff\xff"-"\xf4\xff\xff\xff"-"\xe9\xff\xff\xff"-"\xf1\xff\xff\xff"- #48 NEW cov: 4502 ft: 9151 corp: 27/750Kb lim: 64000 exec/s: 2 rss: 458Mb L: 50772/50772 MS: 259 ChangeByte-ShuffleBytes-ChangeBinInt-ChangeByte-ChangeByte-ChangeByte-ChangeByte-ChangeBit-CopyPart-CrossOver-CopyPart-ChangeByte-CrossOver-CopyPart-ChangeBit-ChangeByte-EraseBytes-ChangeByte-CopyPart-CopyPart-CopyPart-ChangeBit-EraseBytes-ChangeBinInt-CrossOver-CopyPart-CrossOver-CopyPart-ChangeBit-ChangeByte-ChangeBit-InsertByte-CrossOver-InsertRepeatedBytes-InsertRepeatedBytes-InsertRepeatedBytes-ChangeBinInt-EraseBytes-InsertRepeatedBytes-InsertByte-ChangeBit-ShuffleBytes-ChangeBit-ChangeBit-CopyPart-ChangeBit-ChangeByte-CrossOver-ChangeBinInt-ChangeByte-CrossOver-CMP-ChangeByte-CrossOver-ChangeByte-ShuffleBytes-ShuffleBytes-ChangeByte-ChangeBinInt-CopyPart-EraseBytes-CrossOver-ChangeBit-ChangeBinInt-InsertByte-ChangeBit-CopyPart-ChangeBinInt-ChangeByte-CrossOver-ChangeBit-EraseBytes-CopyPart-ChangeBinInt-ChangeBit-ChangeBit-ChangeByte-CopyPart-ChangeBinInt-CrossOver-PersAutoDict-ChangeByte-ChangeBit-ChangeByte-ChangeBinInt-ChangeBinInt-EraseBytes-CopyPart-CopyPart-ChangeByte-ChangeByte-EraseBytes-PersAutoDict-CopyPart-ChangeByte-ChangeByte-EraseBytes-CrossOver-CopyPart-CopyPart-CopyPart-ChangeByte-ChangeBit-CMP-CopyPart-ChangeBinInt-ChangeBinInt-CrossOver-ChangeBit-ChangeBit-EraseBytes-ChangeByte-ShuffleBytes-ChangeBit-ChangeBinInt-CMP-InsertRepeatedBytes-CopyPart-Custom-ChangeByte-CrossOver-EraseBytes-ChangeBit-CopyPart-CrossOver-CMP-ShuffleBytes-EraseBytes-CrossOver-PersAutoDict-ChangeByte-CrossOver-CopyPart-CrossOver-CrossOver-ShuffleBytes-ChangeBinInt-CrossOver-ChangeBinInt-ShuffleBytes-PersAutoDict-ChangeByte-EraseBytes-ChangeBit-CrossOver-EraseBytes-CrossOver-ChangeBit-ChangeBinInt-EraseBytes-InsertByte-InsertRepeatedBytes-InsertByte-InsertByte-ChangeByte-ChangeBinInt-ChangeBit-CrossOver-ChangeByte-CrossOver-EraseBytes-ChangeByte-ShuffleBytes-ChangeBit-ChangeBit-ShuffleBytes-CopyPart-ChangeByte-PersAutoDict-ChangeBit-ChangeByte-InsertRepeatedBytes-CMP-CrossOver-ChangeByte-EraseBytes-ShuffleBytes-CrossOver-ShuffleBytes-ChangeBinInt-ChangeBinInt-CopyPart-PersAutoDict-ShuffleBytes-ChangeBit-CopyPart-ShuffleBytes-CopyPart-EraseBytes-ChangeByte-ChangeBit-ChangeBit-ChangeBinInt-ChangeByte-CopyPart-EraseBytes-ChangeBinInt-EraseBytes-EraseBytes-PersAutoDict-CMP-PersAutoDict-CrossOver-CrossOver-ChangeBit-CrossOver-PersAutoDict-CrossOver-CopyPart-ChangeByte-EraseBytes-ChangeByte-ShuffleBytes-ChangeByte-ChangeByte-CrossOver-ChangeBit-EraseBytes-ChangeByte-EraseBytes-ChangeBinInt-CrossOver-CrossOver-EraseBytes-ChangeBinInt-CrossOver-ChangeBit-ShuffleBytes-ChangeBit-ChangeByte-EraseBytes-ChangeBit-CrossOver-CrossOver-CrossOver-ChangeByte-ChangeBit-ShuffleBytes-ChangeBit-ChangeBit-EraseBytes-CrossOver-CrossOver-CopyPart-ShuffleBytes-ChangeByte-ChangeByte-CopyPart-CrossOver-CopyPart-CrossOver-CrossOver-EraseBytes-EraseBytes-ShuffleBytes-InsertRepeatedBytes-ChangeBit-CopyPart-Custom- DE: "\xfe\xff\xff\xfc"-"\x00\x00\x00\x00"-"F\x00"-"\xf3\xff\xff\xff"-"St9exception"-"_\x00\x00\x00"-"\xf6\xff\xff\xff"-"\xfe\xff\xff\xff"-"\x00\x00\x00\x00"-"p\x02\x00\x00\x00\x00\x00\x00"-"\xfe\xff\xff\xfb"-"\xff\xff"-"\xff\xff\xff\xff"-"\x01\x00\x00\x07"-"\xfe\xff\xff\xfe"-
These are prohibitively large and of limited value in the default case (when someone is running the fuzzer, not debugging it), in my opinion.
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D86658
|
 | compiler-rt/test/fuzzer/fuzzer-custommutator.test |
 | compiler-rt/test/fuzzer/CustomMutatorWithLongSequencesTest.cpp |
 | compiler-rt/lib/fuzzer/FuzzerLoop.cpp |
 | compiler-rt/lib/fuzzer/FuzzerMutate.h |
 | compiler-rt/lib/fuzzer/FuzzerMutate.cpp |
Commit
4cff1b40dacf6a5489b09657d94ea4757b8cd3b0
by elizabeth.andrewsDo not apply calling conventions to MSVC entry points
Fix link error for MSVC entry points when calling conventions are specified. MSVC entry points should have default calling convention.
Differential Revision: https://reviews.llvm.org/D87701
|
 | clang/test/CodeGenCXX/default_calling_conv.cpp |
 | clang/lib/Sema/SemaDecl.cpp |
Commit
8d8a496356dbdf4fcc17caa69fe489d8d87068ac
by Matthew.ArsenaultLocalStackSlotAllocation: Swap order of check
|
 | llvm/lib/CodeGen/LocalStackSlotAllocation.cpp |
Commit
deae5e567d65c49c40abc99d5ad53855c9872d5b
by Matthew.ArsenaultAMDGPU: Add baseline test for incorrect SP access
|
 | llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll |
Commit
367248956e93982a73c0441868a562aeb85af5a0
by Matthew.ArsenaultAMDGPU: Clear offset register when using local stack area
eliminateFrameIndex won't fix up the offset register when the direct frame index reference is moved to a separate move instruction. Switch the offset to a base 0 (which it probably should be to begin with).
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 | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll |
 | llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll |
Commit
e47d2927de79767663f0a0ece0581522fbe40ac4
by rnkInclude (Type|Symbol)Record.h less
Most clients only need CVType and CVSymbol, not structs for every type and symbol. Move CVSymbol and CVType to CVRecord.h to accomplish this. Update some of the common headers that need CVSymbol and CVType to use the new location.
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 | llvm/include/llvm/DebugInfo/CodeView/CVRecord.h |
 | llvm/unittests/DebugInfo/CodeView/TypeHashingTest.cpp |
 | llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h |
 | llvm/include/llvm/DebugInfo/PDB/Native/TpiStream.h |
 | llvm/include/llvm/DebugInfo/CodeView/TypeIndexDiscovery.h |
 | llvm/include/llvm/DebugInfo/CodeView/CVSymbolVisitor.h |
 | llvm/include/llvm/DebugInfo/CodeView/TypeRecordHelpers.h |
 | llvm/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp |
 | llvm/include/llvm/DebugInfo/CodeView/SymbolDumper.h |
 | llvm/include/llvm/DebugInfo/CodeView/DebugSymbolsSubsection.h |
 | llvm/include/llvm/DebugInfo/CodeView/LazyRandomTypeCollection.h |
 | llvm/include/llvm/DebugInfo/CodeView/TypeStreamMerger.h |
 | llvm/include/llvm/DebugInfo/CodeView/CodeViewRecordIO.h |
 | llvm/include/llvm/DebugInfo/CodeView/TypeRecord.h |
 | llvm/include/llvm/DebugInfo/CodeView/TypeCollection.h |
 | llvm/include/llvm/DebugInfo/CodeView/SymbolRecordHelpers.h |
 | llvm/include/llvm/DebugInfo/CodeView/RecordName.h |
Commit
738c73a454881ca78214816754c1b82941d0cd26
by Matthew.ArsenaultRegAllocFast: Make self loop live-out heuristic more aggressive
This currently has no impact on code, but prevents sizeable code size regressions after D52010. This prevents spilling and reloading all values inside blocks that loop back. Add a baseline test which would regress without this patch.
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 | llvm/lib/CodeGen/RegAllocFast.cpp |
 | llvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir |
Commit
39faf428164a28f3652370958ce893d9200927c8
by Louis Dionne[libc++] Ensure streams are initialized early
When statically linking libc++ on some systems, the streams are not initialized early enough, which causes all kinds of issues. This was reported e.g. in http://llvm.org/PR28954, but also in various open source projects that use libc++.
Fixes http://llvm.org/PR28954.
Differential Revision: https://reviews.llvm.org/D31413
|
 | libcxx/src/iostream.cpp |
 | libcxx/test/std/input.output/iostream.objects/init.pass.cpp |
Commit
f9e6d1edc0dad9afb26e773aa125ed62c58f7080
by anhtuyenRe-land: Add new hidden option -print-changed which only reports changes to IR
A new hidden option -print-changed is added along with code to support printing the IR as it passes through the opt pipeline in the new pass manager. Only those passes that change the IR are reported, with others only having the banner reported, indicating that they did not change the IR, were filtered out or ignored. Filtering of output via the -filter-print-funcs is supported and a new supporting hidden option -filter-passes is added. The latter takes a comma separated list of pass names and filters the output to only show those passes in the list that change the IR. The output can also be modified via the -print-module-scope function.
The code introduces a template base class that generalizes the comparison of IRs that takes an IR representation as template parameter. The constructor takes a series of lambdas that provide an event based API for generalized reporting of IRs as they are changed in the opt pipeline through the new pass manager.
The first of several instantiations is provided that prints the IR in a form similar to that produced by -print-after-all with the above mentioned filtering capabilities. This version, and the others to follow will be introduced at the upcoming developer's conference.
Reviewed By: aeubanks (Arthur Eubanks), yrouban (Yevgeny Rouban), ychen (Yuanfang Chen)
Differential Revision: https://reviews.llvm.org/D86360
|
 | llvm/test/Other/change-printer.ll |
 | llvm/lib/Passes/StandardInstrumentations.cpp |
 | llvm/lib/IR/LegacyPassManager.cpp |
 | llvm/include/llvm/Passes/StandardInstrumentations.h |
Commit
50f4c7c785da87679fac1f483ef6a3e53dfca37a
by i[llvm-nm] Use aggregate initialization instead of memset zero
|
 | llvm/tools/llvm-nm/llvm-nm.cpp |
Commit
b011611e373c3d6dfddde5120ce7974cc8719d4a
by spatel[SLP] add tests for reduction ordering; NFC
|
 | llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll |
Commit
c6a82fdbf2ea691fdaf70fb07ae1f61d8452e1ac
by llvm-devValueEnumerator.cpp - remove duplicate includes. NFCI.
Remove headers already included in ValueEnumerator.h
|
 | llvm/lib/Bitcode/Writer/ValueEnumerator.cpp |
Commit
69682f993cc0545da30be32fab572a2a56074653
by llvm-devInterferenceCache.cpp - remove duplicate includes. NFCI.
Remove headers already included in InterferenceCache.h
|
 | llvm/lib/CodeGen/InterferenceCache.cpp |
Commit
73d02064d2533daecf6fe82b8608da8f6eed59a5
by llvm-devraw_ostream.cpp - remove duplicate includes. NFCI.
Remove headers already included in raw_ostream.h
|
 | llvm/lib/Support/raw_ostream.cpp |
Commit
8f7d6b2375618a79f621d5484e44870ede335a13
by llvm-devDwarfUnit.h - remove unnecessary includes. NFCI.
|
 | llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h |
 | llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp |
Commit
c4e589b7954c4e202474ce4a2101f07014792835
by mkitzan[GISel] Add new combines for unary FP instrs with constant operand
https://reviews.llvm.org/D86393
Patch adds five new `GICombinerRules`, one for each of the following unary FP instrs: `G_FNEG`, `G_FABS`, `G_FPTRUNC`, `G_FSQRT`, and `G_FLOG2`. The combine rules perform the FP operation on the constant operand and replace the original instr with the result. Patch additionally adds new combiner tests for the AArch64 target to test these new combiner rules.
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 | llvm/lib/CodeGen/LowLevelType.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/combine-flog2.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/combine-fptrunc.mir |
 | llvm/include/llvm/CodeGen/LowLevelType.h |
 | llvm/test/CodeGen/AArch64/GlobalISel/combine-fsqrt.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/combine-fneg.mir |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
 | llvm/test/CodeGen/AArch64/GlobalISel/combine-fabs.mir |
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
Commit
ebf267b87d4b557dff488f87f66df3628e3da957
by zequanwu[Sema][MSVC] warn at dynamic_cast/typeid when /GR- is given
Differential Revision: https://reviews.llvm.org/D86369
|
 | clang/test/SemaCXX/ms-no-rtti-data.cpp |
 | clang/test/SemaCXX/no-rtti-data.cpp |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/lib/Sema/SemaCast.cpp |
 | clang/lib/Sema/SemaExprCXX.cpp |
 | clang/include/clang/Basic/DiagnosticGroups.td |
Commit
f3c2e0bcee64b0905addaefe9cd0c9ad4d20ac6f
by mascasa[libFuzzer] Enable entropic by default.
Entropic has performed at least on par with vanilla scheduling on Clusterfuzz, and has shown a slight coverage improvement on FuzzBench: https://www.fuzzbench.com/reports/2020-08-31/index.html
Reviewed By: Dor1s
Differential Revision: https://reviews.llvm.org/D87476
|
 | compiler-rt/test/fuzzer/cross_over_uniform_dist.test |
 | compiler-rt/lib/fuzzer/FuzzerDriver.cpp |
 | compiler-rt/test/fuzzer/keep-seed.test |
 | compiler-rt/lib/fuzzer/FuzzerFlags.def |
 | compiler-rt/lib/fuzzer/FuzzerOptions.h |
Commit
77a01d9498a79d2e6e3f366fdb363928f188ec11
by Saleem AbdulrasoolSema: add support for `__attribute__((__swift_bridge__))`
This extends semantic analysis of attributes for Swift interoperability by introducing the `swift_bridge` attribute. This attribute enables bridging Objective-C types to Swift specific types.
This is based on the work of the original changes in https://github.com/llvm/llvm-project-staging/commit/8afaf3aad2af43cfedca7a24cd817848c4e95c0c
Differential Revision: https://reviews.llvm.org/D87532 Reviewed By: Aaron Ballman
|
 | clang/include/clang/Basic/Attr.td |
 | clang/include/clang/Basic/AttrDocs.td |
 | clang/test/SemaObjC/attr-swift_bridge.m |
 | clang/test/AST/attr-swift_bridge.m |
 | clang/lib/Sema/SemaDeclAttr.cpp |
Commit
4d437348d24d6342bdeb3ad84a64e57a889a0ea2
by zequanwufix test no-rtti.cpp
|
 | clang/test/SemaCXX/no-rtti.cpp |