[Jenkins]Jenkins

AbortedChanges

Summary

  1. [X86][SSE] Fold SIGN_EXTEND(SIGN_EXTEND_VECTOR_INREG(X)) -> SIGN_EXTEND_VECTOR_INREG(X) (details)
  2. [X86][SSE] Fold EXTEND_VECTOR_INREG(EXTRACT_SUBVECTOR(EXTEND(X),0)) -> EXTEND_VECTOR_INREG(X) (details)
  3. [LVI] Refactor getValueFromICmpCondition (NFC) (details)
  4. [CVP] Add tests for mask comparisons (NFC) (details)
  5. [LVI] Get value range from mask comparison (details)
  6. [CVP] Additional tests for comparison with offset (NFC) (details)
  7. [ARM] Constant fold VMOVrh (details)
  8. [X86] Add 32-bit command lines to masked_store.ll and masked_load.ll (details)
  9. [X86] Stop reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore from creating scalar i64 load/stores in 32-bit mode (details)
  10. [X86] Pre-commit test cases for D87863. NFC (details)
  11. [X86] Make reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore work for avx512 after type legalization. (details)
  12. [clangd] Fix typo in field name (details)
  13. [llvm-profdata]Fix llvm-profdata crash on compact binary profile (details)
  14. [XRay] Change mips to use version 2 sled (PC-relative address) (details)
  15. [Polly][NewPM] Port Simplify to the new pass manager (details)
  16. [PowerPC] Pass nofpexcept flag to custom lowered constrained ops (details)
Commit bb0078e5911a8cd7742c99c391ccea802f02e22e by llvm-dev
[X86][SSE] Fold SIGN_EXTEND(SIGN_EXTEND_VECTOR_INREG(X)) -> SIGN_EXTEND_VECTOR_INREG(X)

It should be possible to make this generic, but we're not great at checking legality of *_EXTEND_VECTOR_INREG ops so I'm conservatively putting this inside X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/masked_load.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 0bfeede669f0d9c051344977805005c98e8cb41d by llvm-dev
[X86][SSE] Fold EXTEND_VECTOR_INREG(EXTRACT_SUBVECTOR(EXTEND(X),0)) -> EXTEND_VECTOR_INREG(X)
The file was modifiedllvm/test/CodeGen/X86/min-legal-vector-width.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit f94bbe19b6f6086ff94b1eb4ef0bc5802752bfe1 by nikita.ppv
[LVI] Refactor getValueFromICmpCondition (NFC)

Rewrite this in a way where the core logic is in a separate
function, that is invoked with swapped operands. This makes it
easier to add handling for additional icmp patterns.
The file was modifiedllvm/lib/Analysis/LazyValueInfo.cpp
Commit 91af6a78d00f731826ff2eb81c9a9281b1d21388 by nikita.ppv
[CVP] Add tests for mask comparisons (NFC)
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Commit 445db89b537e5397a2d4b08e79751edb845b2c2a by nikita.ppv
[LVI] Get value range from mask comparison

InstCombine likes to canonicalize comparisons of the form
X == C || X == C+1 into (X & -2) == C'. Make sure LVI can still
recover the value range from this. Can of course also be useful
for proper mask comparisons.

For the sake of clarity, the implementation goes through KnownBits
to compute the range.
The file was modifiedllvm/lib/Analysis/LazyValueInfo.cpp
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Commit 1a2723809839a888f03ba69e36a358ba18c0c8ae by nikita.ppv
[CVP] Additional tests for comparison with offset (NFC)

Both icmps have an additional offset here. We would fold this if
the second one didn't.
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Commit 29bd8ea11091d996d166257e07bf2308651d284d by david.green
[ARM] Constant fold VMOVrh

This adds simple constant folding for VMOVrh, to constant fold fp16
constants to integer values. It can help especially with soft calling
conventions, but some of the results are not optimal as we end up
loading using a vldr. This will be improved in a follow up patch.

Differential Revision: https://reviews.llvm.org/D87789
The file was modifiedllvm/test/CodeGen/ARM/cmse-clear-float-hard.ll
The file was modifiedllvm/test/CodeGen/ARM/fp16-bitcast.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
Commit 9b1c98c0fbe2d7fdc22debd3e7d1fcf44952a0ce by craig.topper
[X86] Add 32-bit command lines to masked_store.ll and masked_load.ll
The file was modifiedllvm/test/CodeGen/X86/masked_load.ll
The file was modifiedllvm/test/CodeGen/X86/masked_store.ll
Commit 4e8c028158b56d9c2142a62464e8e0686bde3584 by craig.topper
[X86] Stop reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore from creating scalar i64 load/stores in 32-bit mode

If we emit a scalar i64 load/store it will get type legalized to two i32 load/stores.

Differential Revision: https://reviews.llvm.org/D87862
The file was modifiedllvm/test/CodeGen/X86/masked_load.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit c89b3af0e3e970820ed35798ab2516459a8d829d by craig.topper
[X86] Pre-commit test cases for D87863. NFC
The file was modifiedllvm/test/CodeGen/X86/masked_store.ll
The file was modifiedllvm/test/CodeGen/X86/masked_load.ll
Commit a74b1faba242e0ca4608e5d90495766a272758f0 by craig.topper
[X86] Make reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore work for avx512 after type legalization.

The scalar elements of the vXi1 build_vector will have been type legalized to i8 by padding with 0s. So we can't check for all ones. Instead we should just look at bit 0 of the constant.

Differential Revision: https://reviews.llvm.org/D87863
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/masked_store.ll
The file was modifiedllvm/test/CodeGen/X86/masked_load.ll
Commit 90a8c44d92b217eccba2467a11d0658675b5fe80 by zeratul976
[clangd] Fix typo in field name

Differential Revision: https://reviews.llvm.org/D87995
The file was modifiedclang-tools-extra/clangd/index/FileIndex.cpp
The file was modifiedclang-tools-extra/clangd/index/FileIndex.h
Commit a8b8a9374a3c555ac8528fc37b92935554083b9f by aktoon
[llvm-profdata]Fix llvm-profdata crash on compact binary profile

llvm-profdata `show` and `overlap` will crash in `getFuncName` on compact binary profile. This change fixed this by switching to use `getName`.

 `getFuncName` is misused in llvm-profdata. As showed below, `GUIDToFuncNameMap` is only supported in compilation mode, there is no initialization in llvm-profdata. Compact profile whose MD5 is true would try to query `GUIDToFuncNameMap` then caused the crash. So fix this by switching to `getName`

Reviewed By: MaskRay, wmi, wenlei, weihe, hoy

Differential Revision: https://reviews.llvm.org/D87740
The file was modifiedllvm/tools/llvm-profdata/llvm-profdata.cpp
The file was modifiedllvm/test/tools/llvm-profdata/compact-sample.proftext
Commit d06485685d421c944afeffc3ad59f6f6f78afd72 by i
[XRay] Change mips to use version 2 sled (PC-relative address)

Follow-up to D78590. All targets use PC-relative addresses now.

Reviewed By: atanasyan, dberris

Differential Revision: https://reviews.llvm.org/D87977
The file was modifiedcompiler-rt/lib/xray/xray_mips64.cpp
The file was modifiedcompiler-rt/lib/xray/xray_mips.cpp
The file was modifiedllvm/lib/Target/Mips/MipsAsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/Mips/xray-mips-attribute-instrumentation.ll
The file was modifiedllvm/test/CodeGen/Mips/xray-section-group.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Commit deb00cf0b5abd45e160f1e0ff3e3dcce97b071e5 by pzheng
[Polly][NewPM] Port Simplify to the new pass manager

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D87328
The file was modifiedpolly/lib/Support/RegisterPasses.cpp
The file was modifiedpolly/test/Simplify/overwritten_3store.ll
The file was modifiedpolly/test/Simplify/redundant.ll
The file was modifiedpolly/test/Simplify/dead_access_load.ll
The file was modifiedpolly/test/Simplify/overwritten.ll
The file was modifiedpolly/test/Simplify/pass_existence.ll
The file was modifiedpolly/test/Simplify/redundant_storebetween.ll
The file was modifiedpolly/test/Simplify/notredundant_region_middle.ll
The file was modifiedpolly/lib/Transform/Simplify.cpp
The file was modifiedpolly/test/Simplify/redundant_differentindex.ll
The file was modifiedpolly/test/Simplify/dead_instruction.ll
The file was modifiedpolly/test/Simplify/phi_in_regionstmt.ll
The file was modifiedpolly/test/Simplify/notredundant_synthesizable_unknownit.ll
The file was modifiedpolly/test/Simplify/notdead_region_exitphi.ll
The file was modifiedpolly/test/Simplify/overwritten_loadbetween.ll
The file was modifiedpolly/test/Simplify/dead_access_value.ll
The file was modifiedpolly/test/Simplify/dead_access_phi.ll
The file was modifiedpolly/test/Simplify/notdead_region_innerphi.ll
The file was modifiedpolly/include/polly/Simplify.h
The file was modifiedpolly/lib/Support/PollyPasses.def
Commit 1d782c29872ce3dcc4b64bfde97e197e9042fbfb by qiucofan
[PowerPC] Pass nofpexcept flag to custom lowered constrained ops

This is a follow-up of D86605. For strict DAG FP node, if its FP
exception behavior metadata is ignore, it should have nofpexcept flag.
But during custom lowering, this flag isn't passed down.

This is also seen on X86 target.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D87390
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict-conv.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll