SuccessChanges

Summary

  1. [OpenMP] Fix import library installation with MinGW (details)
  2. [libomptarget][amdgpu] Update plugin CMake to work with latest rocr library (details)
  3. [Support][Windows] Fix incorrect GetFinalPathNameByHandleW() return value check in realPathFromHandle() (details)
  4. [llvm] [Thumb2] Test unusual length for active lane mask (details)
  5. [DAGCombiner] allow store merging non-i8 truncated ops (details)
  6. Reapply D70800: Fix AArch64 AAPCS frame record chain (details)
Commit 1596ea80fdf3410f94ef9a2548701d26cc81c2f5 by Andrey.Churbanov
[OpenMP] Fix import library installation with MinGW

Patch by mati865@gmail.com

Differential Revision: https://reviews.llvm.org/D86552
The file was modifiedopenmp/runtime/src/CMakeLists.txt (diff)
Commit 28fbf422f248fc74681a53208aa2f543a67515ac by jonathanchesterfield
[libomptarget][amdgpu] Update plugin CMake to work with latest rocr library
The file was modifiedopenmp/libomptarget/plugins/amdgpu/CMakeLists.txt (diff)
Commit ceffd6993c350b57f43cec3b6371b159fc4a3149 by platonov.aleksandr
[Support][Windows] Fix incorrect GetFinalPathNameByHandleW() return value check in realPathFromHandle()

`GetFinalPathNameByHandleW(,,N,)` returns:
- `< N` on success (this value does not include the size of the terminating null character)
- `>= N` if buffer is too small (this value includes the size of the terminating null character)

So, when `N == Buffer.capacity() - 1`, we need to resize buffer if return value is > `Buffer.capacity() - 2`.
Also, we can set `N` to `Buffer.capacity()`.

Thus, without this patch `realPathFromHandle()` returns unfilled buffer when length of the final path of the file is equal to `Buffer.capacity()` or `Buffer.capacity() - 1`.

Reviewed By: andrewng, amccarth

Differential Revision: https://reviews.llvm.org/D86564
The file was modifiedllvm/lib/Support/Windows/Path.inc (diff)
Commit c6c292da910578bdec76616c606da2d79b730667 by ajcbik
[llvm] [Thumb2] Test unusual length for active lane mask

Thumb2 test for the fixed issue with unusual length.

https://bugs.llvm.org/show_bug.cgi?id=47299

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D86646
The file was modifiedllvm/test/CodeGen/Thumb2/active_lane_mask.ll (diff)
Commit 54a5dd485c4d04d142a58c9349ada0c897cbeae6 by spatel
[DAGCombiner] allow store merging non-i8 truncated ops

We have a gap in our store merging capabilities for shift+truncate
patterns as discussed in:
https://llvm.org/PR46662

I generalized the code/comments for this function in earlier commits,
so we only need ease the type restriction and adjust the address/endian
checking to make this work.

AArch64 lets us switch endian to make sure that patterns are matched
either way.

Differential Revision: https://reviews.llvm.org/D86420
The file was modifiedllvm/test/CodeGen/AArch64/merge-trunc-store.ll (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/stores-merging.ll (diff)
Commit 9936455204fd6ab72715cc9d67385ddc93e072ed by resistor
Reapply D70800: Fix AArch64 AAPCS frame record chain

Original Commit Message:
After the commit r368987 (rG643adb55769e) was landed, the frame record (FP and LR register)
may be placed in the middle of a stack frame if a function has both callee-saved
general-purpose registers and floating point registers. This will break the stack unwinders
that simply walk through the frame records (based on the guarantee from AAPCS64
"The Frame Pointer" section). This commit fixes the problem by adding the frame record offset.

Patch By: logan
The file was modifiedllvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h (diff)
The file was addedllvm/test/CodeGen/AArch64/framelayout-fp-csr.ll
The file was addedllvm/test/CodeGen/AArch64/framelayout-frame-record.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp (diff)