FailedChanges

Summary

  1. [gn build] Manually port c9455d3 (details)
  2. [gn build] Port 7ed8124d46f (details)
  3. [HeapProf] Fix bot failures from instrumentation pass (details)
  4. Reapply D70800: Fix AArch64 AAPCS frame record chain (details)
  5. [X86] Don't call hasFnAttribute and getFnAttribute for 'prefer-vector-width' and 'min-legal-vector-width' in getSubtargetImpl (details)
  6. [ARM][BFloat16] Change types of some Arm and AArch64 bf16 intrinsics (details)
Commit 897839425bdb3564aec1a03ee9d2acad608ba265 by aeubanks
[gn build] Manually port c9455d3
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-config/BUILD.gn (diff)
Commit b3efa65363ba9a3380b68a9a3bd4767a762b8715 by llvmgnsyncbot
[gn build] Port 7ed8124d46f
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Instrumentation/BUILD.gn (diff)
Commit 5b9d462b7d3c41a605534a1d95ae0b8d97a661d0 by tejohnson
[HeapProf] Fix bot failures from instrumentation pass

Fix bot failure from 7ed8124d46f94601d5f1364becee9cee8538265e:
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-ubuntu/builds/8533

Since we are always using dynamic shadow,
insertDynamicShadowAtFunctionEntry should always return true for
modifying the function.
The file was modifiedllvm/lib/Transforms/Instrumentation/HeapProfiler.cpp (diff)
Commit e9d9a612084b47fc4277523561d61e675370c854 by resistor
Reapply D70800: Fix AArch64 AAPCS frame record chain

Original Commit Message:
After the commit r368987 (rG643adb55769e) was landed, the frame record (FP and LR register)
may be placed in the middle of a stack frame if a function has both callee-saved
general-purpose registers and floating point registers. This will break the stack unwinders
that simply walk through the frame records (based on the guarantee from AAPCS64
"The Frame Pointer" section). This commit fixes the problem by adding the frame record offset.

Patch By: logan
Differential Revision: D70800
The file was addedllvm/test/CodeGen/AArch64/framelayout-frame-record.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp (diff)
The file was addedllvm/test/CodeGen/AArch64/framelayout-fp-csr.ll
The file was addedllvm/test/CodeGen/AArch64/framelayout-unaligned-fp.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp (diff)
Commit ba852e1e19ab8605ed199ea125e11ed80ae15386 by craig.topper
[X86] Don't call hasFnAttribute and getFnAttribute for 'prefer-vector-width' and 'min-legal-vector-width' in getSubtargetImpl

We only need to call getFnAttribute and then check if the Attribute
is None or not.
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp (diff)
Commit ae1396c7d4d83366695137f69f046719fd199408 by mikhail.maltsev
[ARM][BFloat16] Change types of some Arm and AArch64 bf16 intrinsics

This patch adjusts the following ARM/AArch64 LLVM IR intrinsics:
- neon_bfmmla
- neon_bfmlalb
- neon_bfmlalt
so that they take and return bf16 and float types. Previously these
intrinsics used <8 x i8> and <4 x i8> vectors (a rudiment from
implementation lacking bf16 IR type).

The neon_vbfdot[q] intrinsics are adjusted similarly. This change
required some additional selection patterns for vbfdot itself and
also for vector shuffles (in a previous patch) because of SelectionDAG
transformations kicking in and mangling the original code.

This patch makes the generated IR cleaner (less useless bitcasts are
produced), but it does not affect the final assembly.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D86146
The file was modifiedclang/test/CodeGen/arm-bf16-dotprod-intrinsics.c (diff)
The file was addedllvm/test/Bitcode/arm-bf16-upgrade.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td (diff)
The file was modifiedclang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c (diff)
The file was addedllvm/test/Bitcode/aarch64-bf16-upgrade.ll.bc
The file was modifiedllvm/lib/Target/ARM/ARMInstrNEON.td (diff)
The file was modifiedllvm/test/CodeGen/AArch64/aarch64-bf16-dotprod-intrinsics.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/arm-bf16-dotprod-intrinsics.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td (diff)
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td (diff)
The file was addedllvm/test/Bitcode/arm-bf16-upgrade.ll.bc
The file was addedllvm/test/Bitcode/aarch64-bf16-upgrade.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsARM.td (diff)
The file was modifiedllvm/lib/IR/AutoUpgrade.cpp (diff)