1. [SCCP] Use bulk-remove API to bulk-remove attributes. NFCI. (details)
  2. [NFC][ARM] Add tail predication test (details)
  3. [ARM][LowOverheadLoops] Liveouts and reductions (details)
  4. [Statepoint] Turn assert into check in foldPatchpoint. (details)
Commit 3524c23ff2998bbde467397c4df3bd92d50c1485 by benny.kra
[SCCP] Use bulk-remove API to bulk-remove attributes. NFCI.
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp (diff)
Commit 3c8be94f3d8a82f07f61aeddf834a8cc007175bb by sam.parker
[NFC][ARM] Add tail predication test
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions-vpt-liveout.mir
Commit b30adfb5295eaa894669e62eec627adda8820a43 by sam.parker
[ARM][LowOverheadLoops] Liveouts and reductions

Remove the code that tried to look for reduction patterns, since the
vectorizer and isel can now produce predicated arithmetic instructios
within the loop body. This has required some reorganisation and fixes
around live-out and predication checks, as well as looking for cases
where an input/output is initialised to zero.

Differential Revision:
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/extract-element.mir (diff)
The file was modifiedllvm/lib/CodeGen/ReachingDefAnalysis.cpp (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/no-vpsel-liveout.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll (diff)
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-opcode-liveout.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/varying-outer-2d-reduction.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir (diff)
The file was modifiedllvm/include/llvm/CodeGen/ReachingDefAnalysis.h (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-add-operand-liveout.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-operand-liveout.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll (diff)
Commit 248a67f1445d716cd18a588db35328d1f5b501c8 by dantrushin
[Statepoint] Turn assert into check in foldPatchpoint.

Original D81646 had check for tied regs in foldPatchpoint().
Due to unfortunate miscommunication with review comments and
adressing some comments post commit, it turned into assertion.

We had an offline talk and agreed that with current implementation
this path is possible, so I'm changing it back to check.

Note that this is workaround until ussues described in PR46917 are
The file was modifiedllvm/lib/CodeGen/TargetInstrInfo.cpp (diff)