SuccessChanges

Summary

  1. [NewPM] Port -print-alias-sets to NPM (details)
  2. [IRSim] Adding IR Instruction Mapper (details)
  3. [mlir] expose affine map to C API (details)
  4. [gn build] Port b04c1a9d312 (details)
  5. [libunwind][DWARF] Fix end of .eh_frame calculation (details)
  6. [MachineSink] add one more mir case - nfc (details)
  7. [PowerPC] Fix store-fptoi combine of f128 on Power8 (details)
Commit f4ea0f98142a97666cd0478757570e819923a829 by aeubanks
[NewPM] Port -print-alias-sets to NPM

Really it should be named print<alias-sets>, but for the sake of
changing fewer tests, added a TODO to rename after NPM switch and test
cleanup.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D87713
The file was modifiedllvm/lib/Analysis/AliasSetTracker.cpp (diff)
The file was modifiedllvm/lib/Passes/PassBuilder.cpp (diff)
The file was modifiedllvm/lib/Passes/PassRegistry.def (diff)
The file was modifiedllvm/test/Analysis/AliasSet/guards.ll (diff)
The file was modifiedllvm/include/llvm/Analysis/AliasSetTracker.h (diff)
Commit b04c1a9d3127730c05e8a22a0e931a12a39528df by andrew_litteken
[IRSim] Adding IR Instruction Mapper

This introduces the IRInstructionMapper, and the associated wrapper for
instructions, IRInstructionData, that maps IR level Instructions to
unsigned integers.

Mapping is done mainly by using the "isSameOperationAs" comparison
between two instructions.  If they return true, the opcode, result type,
and operand types of the instruction are used to hash the instruction
with an unsigned integer.  The mapper accepts instruction ranges, and
adds each resulting integer to a list, and each wrapped instruction to
a separate list.

At present, branches, phi nodes are not mapping and exception handling
is illegal.  Debug instructions are not considered.

The different mapping schemes are tested in
unittests/Analysis/IRSimilarityIdentifierTest.cpp

Differential Revision: https://reviews.llvm.org/D86968
The file was addedllvm/include/llvm/Analysis/IRSimilarityIdentifier.h
The file was modifiedllvm/unittests/Analysis/CMakeLists.txt (diff)
The file was modifiedllvm/lib/Analysis/CMakeLists.txt (diff)
The file was addedllvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp
The file was addedllvm/lib/Analysis/IRSimilarityIdentifier.cpp
Commit b76f523be6ea606d9cf494e247546cec1cd7f209 by zhanghb97
[mlir] expose affine map to C API

This patch provides C API for MLIR affine map.
- Implement C API for AffineMap class.
- Add Utils.h to include/mlir/CAPI/, and move the definition of the CallbackOstream to Utils.h to make sure mlirAffineMapPrint work correct.
- Add TODO for exposing the C API related to AffineExpr and mutable affine map.

Differential Revision: https://reviews.llvm.org/D87617
The file was addedmlir/include/mlir/CAPI/Utils.h
The file was modifiedmlir/include/mlir-c/AffineMap.h (diff)
The file was modifiedmlir/lib/CAPI/IR/AffineMap.cpp (diff)
The file was modifiedmlir/lib/CAPI/IR/IR.cpp (diff)
The file was modifiedmlir/test/CAPI/ir.c (diff)
Commit 436a43afb2cf85ae6e61b4c1ac09e944a6566646 by llvmgnsyncbot
[gn build] Port b04c1a9d312
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn (diff)
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn (diff)
Commit fb1abe00635c1ec28e55921709904d5ca2e86a74 by rprichard
[libunwind][DWARF] Fix end of .eh_frame calculation

* When .eh_frame is located using .eh_frame_hdr (PT_GNU_EH_FRAME), the
   start of .eh_frame is known, but not the size. In this case, the
   unwinder must rely on a terminator present at the end of .eh_frame.
   Set dwarf_section_length to UINTPTR_MAX to indicate this.

* Add a new field, text_segment_length, that the FrameHeaderCache uses
   to track the size of the PT_LOAD segment indicated by dso_base.

* Compute ehSectionEnd by adding sectionLength to ehSectionStart,
   never to fdeHint.

Fixes PR46829.

Differential Revision: https://reviews.llvm.org/D87750
The file was modifiedlibunwind/src/AddressSpace.hpp (diff)
The file was modifiedlibunwind/src/FrameHeaderCache.hpp (diff)
The file was modifiedlibunwind/src/UnwindCursor.hpp (diff)
The file was modifiedlibunwind/src/DwarfParser.hpp (diff)
The file was modifiedlibunwind/test/frameheadercache_test.pass.cpp (diff)
Commit 5782ab0f52db1b1914d8ee5fe3828b0a5de9d685 by czhengsz
[MachineSink] add one more mir case - nfc
The file was addedllvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
Commit ebfbdebe9678f4a42ec35396eb517eefd85d2b4c by qiucofan
[PowerPC] Fix store-fptoi combine of f128 on Power8

llc would crash for (store (fptosi-f128-i32)) when -mcpu=pwr8, we should
not generate FP_TO_(S|U)INT_IN_VSR for f128 types at this time. This
patch fixes it.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D86686
The file was modifiedllvm/test/CodeGen/PowerPC/store_fptoi.ll (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp (diff)