FailedChanges

Summary

  1. [PowerPC] Implement Move to VSR Mask builtins in LLVM/Clang (details)
  2. [GlobalISel] Add lowering support for G_ABS and use for AArch64. (details)
  3. [SCEV] Fix an unused variable in -DLLVM_ENABLE_ASSERTIONS=off build (details)
Commit 37e7673c21af1531b601ca975cb6118d04b6e1cc by amy.kwan1
[PowerPC] Implement Move to VSR Mask builtins in LLVM/Clang

This patch implements the vec_gen[b|h|w|d|q]m function prototypes in altivec.h
in order to utilize the move to VSR with mask instructions introduced in Power10.

Differential Revision: https://reviews.llvm.org/D82725
The file was modifiedclang/lib/Headers/altivec.h (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/p10-vector-mask-ops.ll (diff)
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def (diff)
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td (diff)
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c (diff)
Commit 5d34d7f1a0cae8367066ce2b55afe42b94a7466f by Amara Emerson
[GlobalISel] Add lowering support for G_ABS and use for AArch64.

Differential Revision: https://reviews.llvm.org/D87952
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir (diff)
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
Commit 76eec6c95b14abd5b72a805ac2e9bb3d8480679b by i
[SCEV] Fix an unused variable in -DLLVM_ENABLE_ASSERTIONS=off build
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp (diff)