SuccessChanges

Summary

  1. Sema: remove unnecessary parameter for SwiftName handling (NFCI) (details)
  2. Fix DISubprogram-v4.ll after e17f52d623cc146b7d9bf5a2e02965043508b4c4 (details)
  3. [PowerPC] Add accumulator register class and instructions (details)
  4. Fix Assembler/disubprogram.ll after e17f52d623cc146b7d9bf5a2e02965043508b4c4 (details)
  5. [MLIR] Fix for updating function signature in normalizing memrefs (details)
  6. AArch64/GlobalISel: Narrow stack passed argument access size (details)
Commit 76eb163259c46171559a49111a394a3e48d1e523 by Saleem Abdulrasool
Sema: remove unnecessary parameter for SwiftName handling (NFCI)

This code never actually did anything in the implementation.

`mergeDeclAttribute` is declared as `static`, and referenced exactly
once in the file: from `Sema::mergeDeclAttributes`.

`Sema::mergeDeclAttributes` sets `LocalAMK` to `AMK_None`.  If the
attribute is `DeprecatedAttr`, `UnavailableAttr`, or `AvailabilityAttr`
then the `LocalAMK` is updated.  However, because we are dealing with a
`SwiftNameDeclAttr` here, `LocalAMK` remains `AMK_None`.  This is then
passed to the function which will as a result pass the value of
`AMK_None == AMK_Override` aka `false`.  Simply propagate the value
through and erase the dead codepath.

Thanks to Aaron Ballman for flagging the use of the availability merge
kind here leading to this simplification!

Differential Revision: https://reviews.llvm.org/D88263
Reviewed By: Aaron Ballman
The file was modifiedclang/lib/Sema/SemaDecl.cpp (diff)
The file was modifiedclang/include/clang/Sema/Sema.h (diff)
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp (diff)
Commit 7d0556fc137aa07347741b7750e50ecbc2b4c6e2 by i
Fix DISubprogram-v4.ll after e17f52d623cc146b7d9bf5a2e02965043508b4c4
The file was modifiedllvm/test/Bitcode/DISubprogram-v4.ll (diff)
The file was modifiedllvm/test/Bitcode/DISubprogram-v4.ll.bc (diff)
Commit 9b86b7009430789d28d67bb1b630e74473f80fa2 by baptiste.saleil
[PowerPC] Add accumulator register class and instructions

This patch adds the xxmfacc, xxmtacc and xxsetaccz instructions to manipulate
accumulator registers. It also adds the ACC register class definition for the
accumulator registers.

Differential Revision: https://reviews.llvm.org/D84847
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td (diff)
The file was modifiedllvm/test/MC/PowerPC/ppc64-encoding-ISA31.s (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.td (diff)
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt (diff)
Commit 6caf3fb8178699ac14fb94fef99aaf1cf297264f by i
Fix Assembler/disubprogram.ll after e17f52d623cc146b7d9bf5a2e02965043508b4c4
The file was modifiedllvm/test/Assembler/disubprogram.ll (diff)
Commit c1f856803142a113fa094411fa4760512b919ef6 by uday
[MLIR] Fix for updating function signature in normalizing memrefs

Normalizing memrefs failed when a caller of symbolic use in a function
can not be casted to `CallOp`. This patch avoids the failure by checking
the result of the casting. If the caller can not be casted to `CallOp`,
it is skipped.

Differential Revision: https://reviews.llvm.org/D87746
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.h (diff)
The file was modifiedmlir/lib/Transforms/NormalizeMemRefs.cpp (diff)
The file was modifiedmlir/test/Transforms/normalize-memrefs-ops.mlir (diff)
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td (diff)
Commit 6cb0d23f2ea6fb25106b0380797ccbc2141d71e1 by Matthew.Arsenault
AArch64/GlobalISel: Narrow stack passed argument access size

This fixes a verifier error in the testcase from bug 47619.

The stack passed s3 value was widened to 4-bytes, and producing a
4-byte memory access with a < 1 byte result type. We need to either
widen the result type or narrow the access size. This copies the code
directly from the AMDGPU handling, which narrows the load size. I
don't like that every target has to handle this, but this is currently
broken on the 11 release branch and this is the simplest fix.

This reverts commit 42bfa7c63b85e76fe16521d1671afcafaf8f64ed.
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-evt-bug47619.ll
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp (diff)