Started 3 mo 4 days ago
Took 6 hr 33 min

Failed Build #1165 (Mar 29, 2020 10:20:04 AM)

Changes
  1. [mlir] NFC: fix trivial typo in documents (details)
  2. [X86][AVX] Add X86ISD::VALIGN target shuffle decode support (details)
  3. [X86] Rename matchShuffleAsByteRotate to matchShuffleAsElementRotate. NFC. (details)
  4. [X86][AVX] Combine 128-bit lane shuffles with a zeroable upper half to EXTRACT_SUBVECTOR (PR40720) (details)
  5. [InstCombine] Use replaceOperand() in a few more places (details)
  6. [InstCombine] Erase original add when creating saddo (details)
  7. [InstCombine] Fix worklist management in varargs transform (details)
  8. [OpenMP] set_bits iterator yields unsigned elements, no reference (NFC). (details)
  9. [InstCombine] Simplify select of cmpxchg transform (details)
  10. Remove unnecessary empty comments from test check lines. NFC. (details)
  11. [X86][AVX] Add tests for 512-bit shuffle patterns that could reduce to subvector extractions (details)
  12. [InstCombine] make test independent of branch undef/UB; NFC (details)
  13. [VectorCombine] skip debug intrinsics first for efficiency (details)
  14. AMDGPU: Fix typo (details)
  15. AMDGPU: Add some additional tests for v_cvt_ubyte* formation (details)
  16. AMDGPU: Fix using wrong instruction for FP conversion (details)
  17. AMDGPU/GlobalISel: Remove redundant virtual (details)
  18. GlobalISel: Add matcher for G_SHL (details)
  19. Introduce support for lib function aligned_alloc in TLI / memory builtins (details)
  20. [InstCombine] Erase old add when optimizing add overflow (details)
  21. [InstCombine] Use replaceOperand() in assoc cast simplification (details)
  22. [MLIR] Add missing asserts in interchangeLoops util, doc comment update (details)
  23. [InstCombine] Use replaceOperand() in demanded elements simplification (details)
  24. [InstCombine] Erase old mul when creating umulo (details)
  25. [X86] Add isAnyZero shuffle mask helper (details)
  26. Fix -Wdocumentation warning. NFC. (details)
  27. [X86][AVX] Combine 128/256-bit lane shuffles with zeroable upper subvectors to EXTRACT_SUBVECTOR (PR40720) (details)
  28. clang-format fixes in ClangTidyDiagnosticConsumer.cpp and DiagnosticsTets.cpp (details)
  29. [clangd] Handle clang-tidy suppression comments for diagnostics inside macro expansions (details)
  30. [MC] Move deprecation infos from MCTargetDesc to MCInstrInfo (details)
  31. [gn build] Port 854f268ca62 (details)
  32. [ARM] VMOV.64 immediate tests. NFC (details)
  33. [ELF][test] Improve arm-exidx-output.s to test different output text sections (details)
  34. Don't claim template names that name non-templates are undeclared. (details)
  35. [ARMMVE] Create fewer temporary SmallVectors (details)
  36. [X86] Add sse4.2 command lines to min/max reduction tests. (details)

Started by upstream project LLDB Incremental build number 13514
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This run spent:

  • 9 hr 54 min waiting;
  • 6 hr 33 min build duration;
  • 12 hr total from scheduled to completion.
Revision: 4abf27c36f15a0828fd4794e4a63fc663589c69c
  • refs/remotes/origin/master
Revision: 2451e4c597885aaa76a1a70f98056ecca7d23cf8
  • refs/remotes/origin/master
Revision: 4abf27c36f15a0828fd4794e4a63fc663589c69c
  • refs/remotes/origin/master
Test Result (3 failures / ±0)Show all failed tests >>>

Identified problems

Regression test failed

This build failed because a regression test in the test suite FAILed. See the test report for details.
Indication 1

Ninja target failed

Below is a link to the first failed ninja target.
Indication 2