FailedChanges

Summary

  1. [mlir] NFC: fix trivial typo in documents (details)
  2. [X86][AVX] Add X86ISD::VALIGN target shuffle decode support (details)
  3. [X86] Rename matchShuffleAsByteRotate to matchShuffleAsElementRotate. NFC. (details)
  4. [X86][AVX] Combine 128-bit lane shuffles with a zeroable upper half to EXTRACT_SUBVECTOR (PR40720) (details)
  5. [InstCombine] Use replaceOperand() in a few more places (details)
  6. [InstCombine] Erase original add when creating saddo (details)
  7. [InstCombine] Fix worklist management in varargs transform (details)
  8. [OpenMP] set_bits iterator yields unsigned elements, no reference (NFC). (details)
  9. [InstCombine] Simplify select of cmpxchg transform (details)
  10. Remove unnecessary empty comments from test check lines. NFC. (details)
  11. [X86][AVX] Add tests for 512-bit shuffle patterns that could reduce to subvector extractions (details)
  12. [InstCombine] make test independent of branch undef/UB; NFC (details)
  13. [VectorCombine] skip debug intrinsics first for efficiency (details)
  14. AMDGPU: Fix typo (details)
  15. AMDGPU: Add some additional tests for v_cvt_ubyte* formation (details)
  16. AMDGPU: Fix using wrong instruction for FP conversion (details)
  17. AMDGPU/GlobalISel: Remove redundant virtual (details)
  18. GlobalISel: Add matcher for G_SHL (details)
  19. Introduce support for lib function aligned_alloc in TLI / memory builtins (details)
  20. [InstCombine] Erase old add when optimizing add overflow (details)
  21. [InstCombine] Use replaceOperand() in assoc cast simplification (details)
  22. [MLIR] Add missing asserts in interchangeLoops util, doc comment update (details)
  23. [InstCombine] Use replaceOperand() in demanded elements simplification (details)
  24. [InstCombine] Erase old mul when creating umulo (details)
  25. [X86] Add isAnyZero shuffle mask helper (details)
  26. Fix -Wdocumentation warning. NFC. (details)
  27. [X86][AVX] Combine 128/256-bit lane shuffles with zeroable upper subvectors to EXTRACT_SUBVECTOR (PR40720) (details)
  28. clang-format fixes in ClangTidyDiagnosticConsumer.cpp and DiagnosticsTets.cpp (details)
  29. [clangd] Handle clang-tidy suppression comments for diagnostics inside macro expansions (details)
  30. [MC] Move deprecation infos from MCTargetDesc to MCInstrInfo (details)
  31. [gn build] Port 854f268ca62 (details)
  32. [ARM] VMOV.64 immediate tests. NFC (details)
  33. [ELF][test] Improve arm-exidx-output.s to test different output text sections (details)
  34. Don't claim template names that name non-templates are undeclared. (details)
  35. [ARMMVE] Create fewer temporary SmallVectors (details)
  36. [X86] Add sse4.2 command lines to min/max reduction tests. (details)
Commit b632bd88a633c84eb2ce8f999119bc4e6c1ee98c by ishizaki
[mlir] NFC: fix trivial typo in documents

Reviewers: mravishankar, antiagainst, nicolasvasilache, herhut, aartbik, mehdi_amini, bondhugula

Reviewed By: mehdi_amini, bondhugula

Subscribers: bondhugula, jdoerfert, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, bader, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76993
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
The file was modifiedmlir/test/IR/attribute.mlir
The file was modifiedmlir/test/mlir-tblgen/llvm-intrinsics.td
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was modifiedmlir/docs/RationaleLinalgDialect.md
The file was modifiedmlir/include/mlir/Dialect/Quant/QuantOps.td
The file was modifiedmlir/include/mlir/Interfaces/InferTypeOpInterface.td
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-types-to-spirv.mlir
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/docs/CreatingADialect.md
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/docs/ConversionToLLVMDialect.md
The file was modifiedmlir/docs/Diagnostics.md
Commit 10439f9e32edf0efd34e19f19c0d0e7555cd5492 by llvm-dev
[X86][AVX] Add X86ISD::VALIGN target shuffle decode support

Allows us to combine VALIGN instructions with other shuffles - the combiner doesn't create VALIGN yet though.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-v1.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
Commit da4c7db793aa71a1e59c31b346e975593c090232 by llvm-dev
[X86] Rename matchShuffleAsByteRotate to matchShuffleAsElementRotate. NFC.

This was an inner helper function for the real matchShuffleAsByteRotate function, but it is more generic and is used directly for VALIGN lowering which doesn't work at the byte level.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 7734e4b3a36f233df493e6101086a9c95d309a40 by llvm-dev
[X86][AVX] Combine 128-bit lane shuffles with a zeroable upper half to EXTRACT_SUBVECTOR (PR40720)

As explained on PR40720, EXTRACTF128 is always as good/better than VPERM2F128, and we can use the implicit zeroing of the upper half.

I've added some extra tests to vector-shuffle-combining-avx2.ll to make sure we don't lose coverage.
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-mul.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/avx-vperm2x128.ll
Commit 1e363023b823d399a4eac311e846a078cb329ceb by nikita.ppv
[InstCombine] Use replaceOperand() in a few more places

To make sure the old operands get DCEd.

NFC apart from worklist order changes.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
Commit 6f07a9e80ab6f3040ae7d8afeaed7f2a207467d2 by nikita.ppv
[InstCombine] Erase original add when creating saddo

Usually when we replaceInstUsesWith() we also return the original
instruction, and InstCombine will take care of erasing it. Here
we don't do that, so we need to manually erase it.

NFC apart from worklist order changes.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 28f67bd5c56ba9c466b1fef600923483a967aa97 by nikita.ppv
[InstCombine] Fix worklist management in varargs transform

Add a replaceUse() helper to mirror replaceOperand() for the
rare cases where we're working directly on uses.

NFC apart from worklist order changes.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
Commit 99913ef3d14fcbfc939d9547506b55ac76fd0c59 by flo
[OpenMP] set_bits iterator yields unsigned elements, no reference (NFC).

BitVector::set_bits() returns an iterator range yielding unsinged
elements, which always will be copied while const & gives the impression
that there will be no copy. Newer version of clang complain:

    warning: loop variable 'SetBitsIt' is always a copy because the range of type 'iterator_range<llvm::BitVector::const_set_bits_iterator>' (aka 'iterator_range<const_set_bits_iterator_impl<llvm::BitVector> >') does not return a reference [-Wrange-loop-analysis]

Reviewers: jdoerfert, rnk

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D77010
The file was modifiedllvm/lib/Frontend/OpenMP/OMPContext.cpp
Commit 26fa33755f112194850a4bad62442f1043614213 by nikita.ppv
[InstCombine] Simplify select of cmpxchg transform

Rather than converting to a dummy select with equal true and false
ops, just directly return the resulting value.

As a side-effect, this fixes missing DCE of the previously replaced
operand.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Commit b44f07045c53870f6b1889bd385f6d2c8d0de396 by llvm-dev
Remove unnecessary empty comments from test check lines. NFC.
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
Commit 443dcc0e008bfac4ea3c9ef740074488e660122c by llvm-dev
[X86][AVX] Add tests for 512-bit shuffle patterns that could reduce to subvector extractions
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
Commit febcb24f14901ed4b666533a02d099dccd511201 by spatel
[InstCombine] make test independent of branch undef/UB; NFC
The file was modifiedllvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll
Commit fc3cc8a4b074d42f5352824ccd53de2e592a7af7 by spatel
[VectorCombine] skip debug intrinsics first for efficiency
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
Commit 97bbe7ad2a961c37d50df24e913cb8766cf2e792 by arsenm2
AMDGPU: Fix typo
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 0b68ca516239829e6a6d5a79100151eb70a53c9e by arsenm2
AMDGPU: Add some additional tests for v_cvt_ubyte* formation

Use functions now that we have them for less boilerplate in the
output.
The file was modifiedllvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
Commit ab7a41069ebf2f628913face89e6a0ecc0348f5d by arsenm2
AMDGPU: Fix using wrong instruction for FP conversion

This was was never actually hit, but FTRUNC was clearly not the intent
here.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
Commit d15723ef06508b6b257279fda31fad0fcec8c686 by arsenm2
AMDGPU/GlobalISel: Remove redundant virtual
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
Commit cce3d96bcc6585e5f134fc093ec50813659c5c5e by arsenm2
GlobalISel: Add matcher for G_SHL
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
The file was modifiedllvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
Commit c0955edfd6ec51e9a3720f9bfc90bac2e511c06d by uday
Introduce support for lib function aligned_alloc in TLI / memory builtins

Aligned_alloc is a standard lib function and has been in glibc since
2.16 and in the C11 standard. It has semantics similar to malloc/calloc
for several analyses/transforms. This patch introduces aligned_alloc
in target library info and memory builtins. Subsequent ones will
make other passes aware and fix https://bugs.llvm.org/show_bug.cgi?id=44062

This change will also be useful to LLVM generators that need to allocate
buffers of vector elements larger than 16 bytes (for eg. 256-bit ones),
element boundary alignment for which is not typically provided by glibc malloc.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D76970
The file was modifiedllvm/lib/Analysis/TargetLibraryInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/MemoryBuiltins.h
The file was modifiedllvm/include/llvm/Analysis/TargetLibraryInfo.def
The file was modifiedllvm/unittests/Analysis/TargetLibraryInfoTest.cpp
The file was modifiedllvm/lib/Analysis/MemoryBuiltins.cpp
The file was modifiedllvm/lib/Transforms/Utils/BuildLibCalls.cpp
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
The file was modifiedllvm/test/Transforms/DeadStoreElimination/simple.ll
Commit a9ddcd6411bcbffe551641a91413c417de491189 by nikita.ppv
[InstCombine] Erase old add when optimizing add overflow

We don't return the replaceInstUsesWith() result, so we're
responsible for cleaning up.

NFC apart from worklist order changes.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 0c8714006582dc4a4e7c646c7dba2ef8302ed85a by nikita.ppv
[InstCombine] Use replaceOperand() in assoc cast simplification

To make sure the old operands are DCEd.

NFC apart from worklist order.
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Commit 4e4ea2cde44db699e6111caee4a1a71ae8d0b9d6 by uday
[MLIR] Add missing asserts in interchangeLoops util, doc comment update

Add missing assert checks for input to mlir::interchangeLoops utility.
Rename interchangeLoops -> permuteLoops; update doc comments to clarify
inputs / return val. Other than the assert checks, this is NFC.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D77003
The file was modifiedmlir/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedmlir/include/mlir/Transforms/LoopUtils.h
Commit 53d209076aa877e4e40edaaf3614f33285e1851b by nikita.ppv
[InstCombine] Use replaceOperand() in demanded elements simplification

To make sure that dead operands get DCEd. This fixes the largest
source of leftover dead operands we see in tests.

NFC apart from worklist changes.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
Commit 8253a86b65c626f470e90ddacba1166b81012b12 by nikita.ppv
[InstCombine] Erase old mul when creating umulo

As we don't return the result of replaceInstUsesWith(), we are
responsible for erasing the instruction.

There is a small subtlety here in that we need to do this after
the other uses of Builder, which uses the original multiply as
the insertion point.

NFC apart from worklist order changes.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 8206c50cdec1551cf6e51da2bc492b8daaf80e1d by llvm-dev
[X86] Add isAnyZero shuffle mask helper
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit fe0723dc9d45acfa4511961b208b7817b09297ec by llvm-dev
Fix -Wdocumentation warning. NFC.

gcc was misinterpreting the template code snippet as html.
The file was modifiedclang/include/clang/AST/PrettyPrinter.h
Commit 9c8ec99c80a5ad9b21d424d77fb19f825319b284 by llvm-dev
[X86][AVX] Combine 128/256-bit lane shuffles with zeroable upper subvectors to EXTRACT_SUBVECTOR (PR40720)

As explained on PR40720, EXTRACTF128 is always as good/better than VPERM2F128/SHUF128, and we can use the implicit zeroing of the uppers.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-mul.ll
Commit 15f1fe1506f5e860409fddd8e62ed5508855ff79 by zeratul976
clang-format fixes in ClangTidyDiagnosticConsumer.cpp and DiagnosticsTets.cpp

Subscribers: jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77023
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
The file was modifiedclang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
Commit b9d9968f63ab8f24b300c69be11eadda3d405ac5 by zeratul976
[clangd] Handle clang-tidy suppression comments for diagnostics inside macro expansions

Summary:
Not handling this was a side-effect of being overly cautious when trying
to avoid reading files for which clangd doesn't have the source mapped.

Fixes https://github.com/clangd/clangd/issues/266

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75286
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.h
The file was modifiedclang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
Commit 854f268ca62e0138bb36469a58a3bf040a8e9984 by benny.kra
[MC] Move deprecation infos from MCTargetDesc to MCInstrInfo

This allows emitting it only when the feature is used by a target.
Shrinks Release+Asserts clang by 900k.
The file was modifiedllvm/lib/MC/MCInstrDesc.cpp
The file was modifiedllvm/include/llvm/MC/MCInstrDesc.h
The file was modifiedllvm/utils/TableGen/InstrInfoEmitter.cpp
The file was modifiedllvm/include/llvm/MC/MCInstrInfo.h
The file was addedllvm/lib/MC/MCInstrInfo.cpp
The file was modifiedllvm/unittests/CodeGen/MachineInstrTest.cpp
The file was modifiedllvm/lib/MC/CMakeLists.txt
The file was modifiedllvm/utils/TableGen/AsmMatcherEmitter.cpp
Commit 6628c525cba17ec0914e8c7130147a0fca497cef by llvmgnsyncbot
[gn build] Port 854f268ca62
The file was modifiedllvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn
Commit 7c1a6873aa53b11605e8860b0ae3ff11bb6e9a02 by david.green
[ARM] VMOV.64 immediate tests. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmovimm.ll
Commit 00c76f34962e822fa9bb5f16e516620a47c566ae by maskray
[ELF][test] Improve arm-exidx-output.s to test different output text sections

Delete arm-exidx-link.s which is now covered by arm-exidx-output.s

Differential Revision: https://reviews.llvm.org/D76409
The file was modifiedlld/test/ELF/arm-exidx-output.s
The file was removedlld/test/ELF/arm-exidx-link.s
Commit a5458bb0d6b1c35c7dcca4f339e77c40f5fc5e06 by richard
Don't claim template names that name non-templates are undeclared.
The file was modifiedclang/test/SemaCXX/pseudo-destructors.cpp
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/include/clang/Sema/Sema.h
Commit 6e0afb5f108fe0570268978f4b32a0c8b4a43ee1 by benny.kra
[ARMMVE] Create fewer temporary SmallVectors

Shrinks clang by 40k.
The file was modifiedclang/utils/TableGen/MveEmitter.cpp
Commit 2451e4c597885aaa76a1a70f98056ecca7d23cf8 by craig.topper
[X86] Add sse4.2 command lines to min/max reduction tests.

SSE4.2 has the pcmpgtq instruction which we will use in
vXi64 reductions when its available.
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-umin.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-smax.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-smin.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-umax.ll