SuccessChanges

Summary

  1. [DAGCombiner] tighten fast-math constraints for fma fold (details)
  2. [NFC] Fix comment style in MLIR unittests to conform to LLVM coding standards. (details)
  3. [AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex (details)
  4. [SCCP] Extend nonnull metadata test (NFC) (details)
  5. [LLD][ELF][AVR] Implement the missing relocation types (details)
  6. BPF: permit .maps section variables with typedef type (details)
  7. [LV] Fixing versioning-for-unit-stide of loops with small trip count (details)
  8. [clang-format] PR46609 clang-format does not obey `PointerAlignment: Right` for ellipsis in declarator for pack (details)
  9. [X86] Fix two places that appear to misuse peekThroughOneUseBitcasts (details)
  10. [X86] Consistently use 128 as the PSHUFB/VPPERM index for zero (details)
  11. [polly] NFC clang-format change following D83564 (details)
  12. [Matrix] Tighten LangRef definitions and Verifier checks. (details)
  13. Revert "[Matrix] Tighten LangRef definitions and Verifier checks." (details)
  14. [InstCombine] fold mul of zext/sext bools to 'and' (details)
  15. [X86] Add CPU name strings to getIntelProcessorTypeAndSubtype and getAMDProcessorTypeAndSubtype in compiler-rt. (details)
  16. [X86] Add CPU string output to getIntelProcessorTypeAndSubtype/getAMDProcessorTypeAndSubtype in Host.cpp (details)
  17. [X86] Remove model number based detection for 'pentiumpro', 'pentium2', 'pentium3', 'pentium-m', and 'yonah' from getHostCPUName. (details)
Commit 39009a8245dae78250081b16fc679ce338af405a by spatel
[DAGCombiner] tighten fast-math constraints for fma fold

fadd (fma A, B, (fmul C, D)), E --> fma A, B, (fma C, D, E)

This is only allowed when "reassoc" is present on the fadd.

As discussed in D80801, this transform goes beyond
what is allowed by "contract" FMF (-ffp-contract=fast).
That is because we are fusing the trailing add of 'E' with a
multiply, but without "reassoc", the code mandates that the
products A*B and C*D are added together before adding in 'E'.

I've added this example to the LangRef to try to clarify the
meaning of "contract". If that seems reasonable, we should
probably do something similar for the clang docs because
there does not appear to be any formal spec for the behavior
of -ffp-contract=fast.

Differential Revision: https://reviews.llvm.org/D82499
The file was modifiedllvm/test/CodeGen/AArch64/fadd-combines.ll
The file was modifiedllvm/test/CodeGen/X86/fma_patterns.ll
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 032810f58986cd568980227c9531de91d8bcb1cd by jurahul
[NFC] Fix comment style in MLIR unittests to conform to LLVM coding standards.

Differential Revision: https://reviews.llvm.org/D83632
The file was modifiedmlir/unittests/Dialect/SPIRV/DeserializationTest.cpp
The file was modifiedmlir/unittests/TableGen/StructsGenTest.cpp
The file was modifiedmlir/unittests/TableGen/EnumsGenTest.cpp
The file was modifiedmlir/unittests/TableGen/FormatTest.cpp
The file was modifiedmlir/unittests/SDBM/SDBMTest.cpp
Commit be9f363704a802b10b30d853f1bb6571e5ebed94 by maskray
[AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex

Differential Revision: https://reviews.llvm.org/D83634
The file was modifiedllvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
The file was addedllvm/test/MC/AVR/hex-immediates.s
Commit d589372704fc7da0c143cbfe27f930a9d7dd333b by nikita.ppv
[SCCP] Extend nonnull metadata test (NFC)
The file was modifiedllvm/test/Transforms/SCCP/metadata.ll
Commit 69e60c9dc76653c10c4e8f7af1743307532102eb by aykevanlaethem
[LLD][ELF][AVR] Implement the missing relocation types

Implements the missing relocation types for AVR target.
The results have been cross-checked with binutils.

Original patch by LemonBoy. Some changes by me.

Differential Revision: https://reviews.llvm.org/D78741
The file was modifiedlld/ELF/Arch/AVR.cpp
The file was addedlld/test/ELF/avr-reloc.s
Commit 152a9fef1b3b44f2c224cb8096b3d649279f2578 by yhs
BPF: permit .maps section variables with typedef type

Currently, llvm when see a global variable in .maps section,
it ensures its type must be a struct type. Then pointee
will be further evaluated for the structure members.
In normal cases, the pointee type will be skipped.

Although this is what current all bpf programs are doing,
but it is a little bit restrictive. For example, it is legitimate
for users to have:
typedef struct { int key_size; int value_size; } __map_t;
__map_t map __attribute__((section(".maps")));

This patch lifts this restriction and typedef of
a struct type is also allowed for .maps section variables.
To avoid create unnecessary fixup entries when traversal
started with typedef/struct type, the new implementation
first traverse all map struct members and then traverse
the typedef/struct type. This way, in internal BTFDebug
implementation, no fixup entries are generated.

Two new unit tests are added for typedef and const
struct in .maps section. Also tested with kernel bpf selftests.

Differential Revision: https://reviews.llvm.org/D83638
The file was modifiedllvm/test/CodeGen/BPF/BTF/map-def.ll
The file was addedllvm/test/CodeGen/BPF/BTF/map-def-3.ll
The file was addedllvm/test/CodeGen/BPF/BTF/map-def-2.ll
The file was modifiedllvm/lib/Target/BPF/BTFDebug.cpp
Commit 82a5157ff1650e3366f7a9c619269766ad1d5e93 by ayal.zaks
[LV] Fixing versioning-for-unit-stide of loops with small trip count

This patch fixes D81345 and PR46652.

If a loop with a small trip count is compiled w/o -Os/-Oz, Loop Access Analysis
still generates runtime checks for unit strides that will version the loop.

In such cases, the loop vectorizer should either re-run the analysis or bail-out
from vectorizing the loop, as done prior to D81345. The latter is applied for
now as the former requires refactoring.

Differential Revision: https://reviews.llvm.org/D83470
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/optsize.ll
Commit 65dc97b79eb1979c54e7e17c411ea5f58f8dcc9c by mydeveloperday
[clang-format] PR46609 clang-format does not obey `PointerAlignment: Right` for ellipsis in declarator for pack

Summary:
https://bugs.llvm.org/show_bug.cgi?id=46609

Ensure `*...` obey they left/middle/right rules of Pointer alignment

Reviewed By: curdeius

Differential Revision: https://reviews.llvm.org/D83564
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit 04013a07ac3b67eb176ddfd1ddaeda41415c038f by craig.topper
[X86] Fix two places that appear to misuse peekThroughOneUseBitcasts

peekThroughOneUseBitcasts checks the use count of the operand of the bitcast. Not the bitcast itself. So I think that means we need to do any outside haseOneUse checks before calling the function not after.

I was working on another patch where I misused the function and did a very quick audit to see if I there were other similar mistakes.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D83598
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit f8f007e378e1ed84fadf281f05166a4463a79316 by craig.topper
[X86] Consistently use 128 as the PSHUFB/VPPERM index for zero

Bit 7 of the index controls zeroing, the other bits are ignored when bit 7 is set. Shuffle lowering was using 128 and shuffle combining was using 255. Seems like we should be consistent.

This patch changes shuffle combining to use 128 to match lowering.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D83587
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-trunc.ll
Commit 7a1bcf9f9a95fca9dcf8e42f8eb845db3643fffb by mydeveloperday
[polly] NFC clang-format change following D83564
The file was modifiedpolly/lib/Analysis/ScopDetection.cpp
Commit f4d29d6e8c43cfd924d9d7cc1ac0c269b2788e75 by sjoerd.meijer
[Matrix] Tighten LangRef definitions and Verifier checks.

This tightens the matrix intrinsic definitions in LLVM LangRef and adds
correspondings checks to the IR Verifier.

Differential Revision: https://reviews.llvm.org/D83477
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/test/Verifier/matrix-intrinsics.ll
The file was modifiedllvm/lib/IR/Verifier.cpp
Commit 4ff7ed33108d9039fd960a4979b2e1503888582c by sjoerd.meijer
Revert "[Matrix] Tighten LangRef definitions and Verifier checks."

This reverts commit f4d29d6e8c43cfd924d9d7cc1ac0c269b2788e75.

Hm, some build bot failures, reverting it while I investigate that.
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/test/Verifier/matrix-intrinsics.ll
The file was modifiedllvm/docs/LangRef.rst
Commit 445897334741c53e98f8044f5f33ab1e888b3818 by spatel
[InstCombine] fold mul of zext/sext bools to 'and'

Similar to rG40fcc42:
The base case only worked because we were relying on a
poison-unsafe select transform; if that is fixed, we
would regress on patterns like this.

The extra use tests show that the select transform can't
be applied consistently. So it may be a regression to have
an extra instruction on 1 test, but that result was not
created safely and does not happen reliably.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
The file was modifiedllvm/test/Transforms/InstCombine/mul.ll
Commit b92c2bb6a2058611d727c4e2ce3a928f0a3e647d by craig.topper
[X86] Add CPU name strings to getIntelProcessorTypeAndSubtype and getAMDProcessorTypeAndSubtype in compiler-rt.

These aren't used in compiler-rt, but I plan to make a similar
change to the equivalent code in Host.cpp where the mapping from
type/subtype is an unnecessary complication. Having the CPU strings
here will help keep the code somewhat synchronized.
The file was modifiedcompiler-rt/lib/builtins/cpu_model.c
Commit ea84dc9500df383b4fe07199134033f358411e59 by craig.topper
[X86] Add CPU string output to getIntelProcessorTypeAndSubtype/getAMDProcessorTypeAndSubtype in Host.cpp

Rather than converting type/subtype into strings, just directly
select the string as part of family/model decoding. This avoids
the need for creating fake Type/SubTypes for CPUs not supported
by compiler-rtl. I've left the Type/SubType in place where it matches
compiler-rt so that the code can be diffed, but the Type/SubType
is no longer used by Host.cpp.

compiler-rt was already updated to select strings that aren't used
so the code will look similar.
The file was modifiedllvm/lib/Support/Host.cpp
The file was modifiedllvm/include/llvm/Support/X86TargetParser.def
Commit 90c577a113e97212e02d5956d6db45e701e3552f by craig.topper
[X86] Remove model number based detection for 'pentiumpro', 'pentium2', 'pentium3', 'pentium-m', and 'yonah' from getHostCPUName.

For model 6 CPUs, we have a fallback detection method based on
available features. That mechanism should be enough to detect
these early family 6 CPUs as they only differ in the features
used by the detection anyway.
The file was modifiedllvm/lib/Support/Host.cpp