Changes

[c++20] For P1907R1: Add checking for structural types for non-type
template parameters.

No support for the new kinds of non-type template argument yet.

This is not entirely NFC for prior language modes: we have historically
incorrectly accepted rvalue references as the types of non-type template
parameters. Such invalid code is now rejected.

[lld-macho] Mark weak symbols in symbol table

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D86908

[lld-macho] Export trie addresses should be relative to the image base

We didn't notice this earlier this we were only testing the export trie
encoded in a dylib, whose image base starts at zero. But a regular
executable contains `__PAGEZERO`, which means it has a non-zero image
base. This bug was discovered after attempting to run some programs that
performed `dlopen` on an executable.

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D87780

[EHStreamer] Fix a "Continue to action" -fverbose-asm comment when multi-byte LEB128 encoding is needed

This only happens with more than 64 action records and it is difficult to construct a test.

[docs][flang] Fix typos

Reviewed By: SouraVX

Differential Revision: https://reviews.llvm.org/D87885

Add missing new line after debug logging in MLIRContext (NFC)

[c++20] Consistent with the intent to allow all plausible types in
non-type template parameters, permit vector types.

[SyntaxTree][Synthesis] Improve testing `createLeaf`

The new test shows that `createLeaf` depends on the C++ version.

Differential Revision: https://reviews.llvm.org/D87896

[AST] Fix dependence-bits for CXXDefaultInitExpr.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D87382

[SyntaxTree] Test for '\' inside token.

Differential Revision: https://reviews.llvm.org/D87895

[clang][AArch64] Correct return type of Neon vqmovun intrinsics

Neon intrinsics vqmovunh_s16, vqmovuns_s32, vqmovund_s64
should have unsigned return types.

See https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics?search=vqmovun

Fixes https://bugs.llvm.org/show_bug.cgi?id=46840

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D85118

[clang] Fix incorrect call to TextDiagnostic::printDiagnosticMessage

As per the documentation, the 2nd argument in printDiagnosticMessage
should be a bool that specifies whether the underlying message is a
continuation note diagnostic or not. More specifically, it should be:
```
Level == DiagnosticsEngine::Note
```
instead of:
```
Level
```

This change means that `no input file` in the following scenario will be
now correctly printed in bold:
```
$ bin/clang
clang: error: no input files
```
In terminals that don't support text formatting the behaviour doesn't
change.

Differential Revision: https://reviews.llvm.org/D87816

[LSR] Preserve MSSA when using SplitCriticalEdge.

LSR claims to MemorySSA, but we also have to make sure it is preserved
when splitting critical edges. This can be done by passing MSSAU to
SplitCriticalEdge.

Fixes PR47557.

Fix crash in the pass pipeline when local reproducer is enabled

This crash only happens when a function pass is followed by a module
pass. In this case the splitting of the pass pipeline didn't handle
properly the verifier passes and ended up with an odd number of pass in
the pipeline, breaking an assumption of the local crash reproducer
executor and hitting an assertion.

Differential Revision: https://reviews.llvm.org/D88000

[CodeGen] Fixing inconsistent ABI mangling of vlaues in SelectionDAGBuilder

SelectionDAGBuilder was inconsistently mangling values based on ABI
Calling Conventions when getting them through copyFromRegs in
SelectionDAGBuilder, causing duplicate value type convertions for
function arguments. The checking for the mangling requirement was based
on the value's originating instruction and was performed outside of, and
inspite of, the regular Calling Convention Lowering.

The issue could be observed in a scenario such as:

```
%arg1 = load half, half* %const, align 2
%arg2 = call fastcc half @someFunc()
call fastcc void @otherFunc(half %arg1, half %arg2)
; Here, %arg2 was incorrectly mangled twice, as the CallConv data from
; the call to @someFunc() was taken into consideration for the check
; when getting the value for processing the call to @otherFunc(...),
; after the proper convertion had taken place when lowering the return
; value of the first call.
```

This patch fixes the issue by disregarding the Calling Convention
information for such copyFromRegs, making sure the ABI mangling is
properly contanined in the Calling Convention Lowering.

This fixes Bugzilla #47454.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D87844

[Test] Test auto-update

[lld][ELF][test] Add additional LTO testing

The additional testing is testing we previously had in a downstream test
suite.

Reviewed by: grimar, MaskRay

Differential Revision: https://reviews.llvm.org/D87824

[RISC-V] Implement RISCVInstrInfo::isCopyInstrImpl()

This does not result in changes for any of the current tests, but it might
improve debug information in some cases.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D86522

[compiler-rt] Fix atomic support functions on 32-bit architectures

The code currently uses __c11_atomic_is_lock_free() to detect whether an
atomic operation is natively supported. However, this can result in a
runtime function call to determine whether the given operation is lock-free
and clang generating a call to e.g. __atomic_load_8 since the branch is
not a constant zero. Since we are implementing those runtime functions, we
must avoid those calls. This patch replaces __c11_atomic_is_lock_free()
with __atomic_always_lock_free() which always results in a compile-time
constant value. This problem was found while compiling atomic.c for MIPS32
since the -Watomic-alignment warning was being triggered and objdump showed
an undefined reference to _atomic_is_lock_free.

In addition to fixing 32-bit platforms this also enables the 16-byte case
that was disabled in r153779 (185f2edd70a34d28b305df0cd8ce519ecbca2cfd).

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D86510

[SyntaxTree][Synthesis] Implement `deepCopy`

Differential Revision: https://reviews.llvm.org/D87749

[mlir] Shape.AssumingOp implements RegionBranchOpInterface.

This adds support for the interface and provides unambigious information
on the control flow as it is unconditional on any runtime values.
The code is tested through confirming that buffer-placement behaves as
expected.

Differential Revision: https://reviews.llvm.org/D87894

[AArch64] Cortex-A55 scheduler model

This is an initial commit adding the A55 model, but it isn't used/enabled yet.
We will follow up on this to improve the model, then flip the switch.

The optimisation guide describing Cortex-A55 micro-architecture in more detail
can be found here:

https://static.docs.arm.com/epm128372/20/arm_cortex_a55_software_optimization_guide_v2.pdf

Original patch by Javed Absar.

Differential Revision: https://reviews.llvm.org/D46884

[NFC][ARM] More tail predication tests.

Add mir tests for use/def of P0.

[llvm-readelf/obj] - Stop printing invalid names for unnamed section symbols.

We have an issue with `ELFDumper<ELFT>::getSymbolSectionName`:
1) It is used deeply for both LLVM/GNU styles and might return LLVM-style only
   values to describe symbols: "Undefined", "Processor Specific", "Absolute", etc.

2) `getSymbolSectionName` is used by `getFullSymbolName` and these special values
   might appear instead of symbol names in many places.
   This occurs for unnamed section symbols currently.

This patch extracts the LLVM specific logic to `LLVMStyle<ELFT>::printSymbolSection`,
which seems to be the only place where we want to print the special values mentioned.
It also adds a meaningful new warning that is reported when we are unable to get
a section index for a section symbol.

Differential revision: https://reviews.llvm.org/D87764

Do not dereference an array out of bound just to take its address

This is UB by the standard, and caught by the libstdc++ asserts

Differential Revision: https://reviews.llvm.org/D87892

[ARM] Select f32 constants with vmov.f16

This adds lowering for f32 values using the vmov.f16, which zeroes the
top bits whilst setting the lower bits to a pattern. This range of
values does not often come up, except where a f16 constant value has
been converted to a f32.

Differential Revision: https://reviews.llvm.org/D87790