AbortedChanges

Summary

  1. Update recipe for flang-aarch64 slaves (details)
  2. clang-x86-ninja-win10 - replacing backslashes (details)
Commit 965bd9eb785ee6929a9dd71b741c6e81745357fb by caroline.concatto
Update recipe for flang-aarch64 slaves

- Update compiler location for flang-aarch64-ubuntu-{clang and gcc10}
- Add another email to the extra recipient for flang-aarch64
- Make flang-aarch64 slaves build new flang driver by default
- Add a missing coma to flang-aarch64-ubuntu-gcc10 recipe

Differential Revision: https://reviews.llvm.org/D87125
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)
The file was modifiedbuildbot/osuosl/master/config/status.py (diff)
Commit bc6f110d29f33b97e734d3d9a15ec7dbc63733e3 by kuhnel
clang-x86-ninja-win10 - replacing backslashes

in buildbot.tac with forward slashes to address re-configuration
cycles in cmake
The file was modifiedbuildbot/google/terraform/main.tf (diff)
The file was modifiedbuildbot/google/docker/buildbot-windows10-vs2019/VERSION (diff)
The file was modifiedbuildbot/google/docker/buildbot-windows10-vs2019/run.ps1 (diff)

Summary

  1. [WebAssembly][MC] Fix computation of relative symbol offset (details)
  2. Reorder linalg.conv indexing_maps loop order (details)
  3. [AlwaysInliner] Emit optimization remarks (details)
  4. [clangd] Link libclangdSupport into clangd-index-server (details)
  5. [clang] Traverse init-captures while indexing (details)
  6. [CMake] Use find_dependency in LLVMConfig.cmake (details)
  7. [CMake] Use append for CMAKE_REQUIRED_* variables (details)
  8. [SyntaxTree][Nit] Take `ArrayRef` instead of `std::vector` as argument for `createTree` (details)
  9. [SyntaxTree] Test `findFirstLeaf` and `findLastLeaf` (details)
  10. [gn build] Port af582c9b0f3 (details)
  11. Revert "[CMake] Use find_dependency in LLVMConfig.cmake" (details)
  12. Reapply: [clang-cl] Always interpret the LIB env var as separated with semicolons (details)
  13. [AArch64] Fix return type of Neon scalar comparison intrinsics (details)
  14. [ARM] VPT validForTailPredication (details)
  15. [ARM] Remove MVEDomain from VLDR/STR of P0 (details)
  16. [MLIR] Add subf and rsqrt EDSC intrinsics (details)
  17. [mlir][Linalg] Uniformize linalg.generic with named ops. (details)
  18. [llvm-readobj/elf] - Stop reporting invalid extended indexes in warnings for unnamed section symbols. (details)
  19. [SyntaxTree][Synthesis] Fix: `deepCopy` -> `deepCopyExpandingMacros`. (details)
  20. Revert "Reapply Revert "RegAllocFast: Rewrite and improve"" (details)
  21. [ARM] Improve VPT predicate tracking (details)
  22. [AMDGPU] More codegen patterns for v2i16/v2f16 build_vector (details)
  23. Revert "Implement a new kind of Pass: dynamic pass pipeline" (details)
  24. [SCEV] Support unsigned predicates in isKnownPredicateViaNoOverflow (details)
  25. [MLIR][Linalg] Fix assertion in dependency analysis (details)
  26. [NFC][PowerPC]Add tests for multiply-by-constant. (details)
  27. [APFloat] multiplySignificand - always pass IEEEFloat as const reference. NFCI. (details)
  28. [PowerPC] Add support for R_PPC64_GOT_TPREL_PCREL34 used in TLS Initial Exec (details)
  29. Revert rGf835779160ec303 "[APFloat] multiplySignificand - always pass IEEEFloat as const reference. NFCI." (details)
  30. [lldb] Ignore certain Clang type sugar when creating the type name (details)
  31. [ARM][TTI] Prevents constants in a min(max) or max(min) pattern from being hoisted when in a loop (details)
  32. [SCEV] Handle `less` predicates for FoundPred = NE (details)
  33. [SystemZ][z/OS] Set default wchar_t type for zOS (details)
  34. [LLD][PowerPC][test] Update thunk range error report for PPC64PCRelLongBranchThunk (details)
  35. [ARM] Trying to fix asan buildbot (details)
  36. [libc++] NFC: Remove trailing whitespace from the feature test macro table (details)
  37. [SLP] Merge null and dyn_cast<> checks into dyn_cast_or_null<>. NFCI. (details)
  38. [MLIR][Standard] Add `atan` to standard dialect (details)
  39. [SyntaxTree] Add tests for the assignment of the `canModify` tag. (details)
  40. [SLP] clean up code in gather(); NFC (details)
  41. [SLP] move misplaced code comments; NFC (details)
  42. [SLP] reduce code duplication for checking parent block; NFC (details)
  43. [PowerPC] Fix for compiler side issue in PCRelative Local Exec (details)
  44. [NFC][mlir] Remove llvm:: prefix from SmallVector in parallel pretty printer. (details)
  45. [AIX][clang][driver] Make sure crti[_64].o is linked in C++ mode (details)
  46. [X86] Cleanup/add namespace closure comments. NFCI. (details)
  47. [X86] Add missing namespace closure comments. NFCI. (details)
  48. [PeepholeOptimizer] Enhance the redundant COPY elimination. (details)
  49. [VPlan] Add dump() helper to VPValue & VPRecipeBase. (details)
  50. [lld-macho] minimally handle option -dynamic (details)
  51. [AIX][compiler-rt] Use the AR/ranlib mode flag for 32-bit and 64-bit mode (details)
  52. [libc++] Implement C++20's P0784 (More constexpr containers) (details)
  53. [GVNSink][NewPM] Add GVNSinkPass to PassRegistry.def (details)
  54. [scudo][standalone] Remove the pthread key from the shared TSD (details)
  55. [ThinLTO] Re-order modules for optimal multi-threaded processing (details)
  56. [DI][ASan][NewPM] Fix some DebugInfo ASan tests under NPM (details)
  57. Sema: introduce `__attribute__((__swift_name__))` (details)
  58. [OpenMPOpt] Refactored "issue" and "wait" declarations for data map runtime call. (details)
  59. [lld-macho] Make lld::getInteger() tolerate leading "0x"/"0X" when base is 16 (details)
  60. [sanitizer_common] Add debug print to sysmsg.c (details)
  61. Silence 'warning: unused variable' when compiling with Clang 10.0 (details)
  62. [DAG] Remove DAGTypeLegalizer::GenWidenVectorTruncStores (PR42046) (details)
  63. [PowerPC] Implement the 128-bit Vector Divide Extended Builtins in Clang/LLVM (details)
  64. [PowerPC] Implement Vector String Isolate Builtins in Clang/LLVM (details)
  65. [mlir] NFC: fix trivial typos under include directory (details)
  66. [mlir][ods] Make OpBuilder and OperationState optional (details)
  67. [SyntaxTree] Test the List API (details)
  68. [ASTMatchers] Avoid recursion in ancestor matching to save stack space. (details)
  69. [NFC][regalloc] Simplify/conform to style guide indvars in Greedy (details)
  70. Version 0.5 of the new "TableGen Backend Developer's Guide." (details)
  71. [Analyzer][WebKit] UncountedLocalVarsChecker (details)
  72. [gn build] Port 848d66fafd2 (details)
  73. [gn build] Port 8a64689e264 (details)
  74. [clang] Fix a typo-correction crash (details)
  75. [test][MC] Rehabilitate llvm/test/MC/COFF/bigobj.py (details)
  76. [NFC] Replace tabs with spaces in PPCInstrPrefix.td (details)
  77. [InstCombine] For pow(x, +/-0.5), stop falling into pow(x, 1.5), etc. case (details)
  78. [lldb] Skip test_common_completion_process_pid_and_name with reproducers (details)
  79. [lldb] Skip TestMiniDumpUUID with reproducers (details)
  80. [LoopInfo][NewPM] Fix tests in Analysis/LoopInfo under NPM (details)
  81. [test][NewPM] Pin do-nothing-intrinsic.ll to legacy PM (details)
  82. [NFC][CVP] Add tests for srem with potentially different sigdness domains (details)
  83. [CVP] Enhance SRem -> URem fold to work not just on non-negative operands (details)
  84. [ConstantRange] binaryXor(): special-case binary complement case - the result is precise (details)
  85. [ConstantRange] Introduce getActiveBits() method (details)
  86. [NFC][CVP] processUDivOrURem(): refactor to use ConstantRange::getActiveBits() (details)
  87. [NFC][APInt] Refactor getMinSignedBits() in terms of getNumSignBits() (details)
  88. [ConstantRange] Introduce getMinSignedBits() method (details)
  89. [NFC][CVP] Give a better name STATISTIC() counting udiv i16 -> udiv i8 xforms (details)
  90. [NFC][CVP] Add tests for SDiv/SRem narrowing (details)
  91. [CVP] Narrow SDiv/SRem to the smallest power-of-2 that's sufficient to contain its operands (details)
  92. Implement a new kind of Pass: dynamic pass pipeline (details)
  93. Revert "[lldb] XFAIL TestMemoryHistory on Linux" (details)
  94. [flang][msvc] Add explicit function template argument to applyFunction. NFC. (details)
  95. [flang][msvc] Add explicit function template argument to applyLamda. NFC. (details)
  96. [flang][msvc] Explicitly reference "this" inside closure. NFC. (details)
  97. Revert "The wrong placement of add pass with optimizations led to -funique-internal-linkage-names being disabled." (details)
  98. Two patches to fix the broken build. (details)
  99. [lldb][test] Remove accidental import pdb in 783dc7dc7ed7487d0782c2feb8854df949b98e69 (details)
  100. [compiler-rt][AIX] Add CMake support for 32-bit Power builds (details)
  101. [ThinLTO] Option to bypass function importing. (details)
  102. [AArch64] Avoid pairing loads with same result reg (details)
  103. [LoopInfo] empty() -> isInnermost(), add isOutermost() (details)
  104. Revert "[CodeGen] emit CG profile for COFF object file" (details)
  105. Small fixes for "[LoopInfo] empty() -> isInnermost(), add isOutermost()" (details)
  106. Change LoopInfo::empty to isInnermost after D82895 (details)
  107. [libc++] Implement LWG1203 (details)
  108. Fix build due to renaming in LoopInfo. (details)
  109. [AArch64] Teach analyzeBranch to remove branch equivelent to fallthrough (details)
  110. [libc++] NFC: Collocate C++20 removed members of std::allocator (details)
  111. [libc++] NFC: Reindent the feature test macro generation script (details)
  112. [SLP]Fix coding style, NFC. (details)
Commit 9c7b58080ebd7ad3a63b892b5ae7f92e41587327 by d.c.ddcc
[WebAssembly][MC] Fix computation of relative symbol offset

For relative symbols, add its offset when computing relocation value.
Also, warn on unsupported absolute symbols.

Differential Revision: https://reviews.llvm.org/D87407
The file was removedllvm/test/MC/WebAssembly/offset.s
The file was addedllvm/test/MC/WebAssembly/alias-offset.s
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
Commit 9b47525824df9be5ae23c39e7ce0d220d12f85e5 by ataei
Reorder linalg.conv indexing_maps loop order

Change the indexing map to iterate over the (b, x0, x1, z0, z1, q, k) instead of (b, x0, x1, k, q, z0, z1) to evaluate the convolution expression:
Y[b, x0, x1, k] = sum(W[z0, z1, q, k] * X[b, x0 + z0, x1 + z1, q], z0, z1, q)

This allows llvm auto vectorize to work and has better locality resulting significant performance improvments

Differential Revision: https://reviews.llvm.org/D87781
The file was modifiedmlir/test/Dialect/Linalg/loops.mlir
The file was modifiedmlir/test/Dialect/Linalg/affine.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile_conv.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
Commit 3bf703fb6d55b23d29c792325a78cd3ead9ad07c by aeubanks
[AlwaysInliner] Emit optimization remarks

To match the normal inliner in preparation for https://reviews.llvm.org/D86988.

Also change a FIXME to an assert.

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D88067
The file was modifiedllvm/test/Transforms/Inline/optimization-remarks.ll
The file was modifiedllvm/lib/Transforms/IPO/AlwaysInliner.cpp
Commit f18f8f34d3d82b0842daf184c71e8240620d925c by zeratul976
[clangd] Link libclangdSupport into clangd-index-server

Fixes https://github.com/clangd/clangd/issues/534

Differential Revision: https://reviews.llvm.org/D87979
The file was modifiedclang-tools-extra/clangd/index/remote/server/CMakeLists.txt
Commit aa3c7638ba1648e020cf65a424389e093f2b3a1a by zeratul976
[clang] Traverse init-captures while indexing

Fixes https://github.com/clangd/clangd/issues/496

Differential Revision: https://reviews.llvm.org/D87257
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
The file was modifiedclang/lib/Index/IndexBody.cpp
The file was modifiedclang/test/Index/cxx14-lambdas.cpp
Commit 247c4fc50720ed48db2464bbe59839eedbe16794 by phosek
[CMake] Use find_dependency in LLVMConfig.cmake

This prefered over find_package as find_dependency forwards the correct
parameters for QUIET and REQUIRED to find_package.

Differential Revision: https://reviews.llvm.org/D88069
The file was modifiedllvm/cmake/modules/LLVMConfig.cmake.in
Commit bc3615f50e585232f34edcf6faf8cbd3e6dece1a by phosek
[CMake] Use append for CMAKE_REQUIRED_* variables

This ensures that required includes and libraries such as -lm that
were added earlier aren't overwritten.

Differential Revision: https://reviews.llvm.org/D88068
The file was modifiedllvm/cmake/config-ix.cmake
Commit 1dc7836aed134b4543bad6aa54f15cc0e51a627f by ecaldas
[SyntaxTree][Nit] Take `ArrayRef` instead of `std::vector` as argument for `createTree`

I also assured that there are no other functions unnecessarily using std::vector as argument.

Differential Revision: https://reviews.llvm.org/D88024
The file was modifiedclang/lib/Tooling/Syntax/Synthesis.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/BuildTree.h
Commit af582c9b0f3a09b6a1b5101fd30dcbcef5c188b0 by ecaldas
[SyntaxTree] Test `findFirstLeaf` and `findLastLeaf`

* Introduce `TreeTest.cpp` to unit test `Tree.h`
* Add `generateAllTreesWithShape` to generating test cases
* Add tests for `findFirstLeaf` and `findLastLeaf`
* Fix implementations of `findFirstLeaf` and `findLastLeaf` that had
been broken when empty `Tree` were present.

Differential Revision: https://reviews.llvm.org/D87779
The file was modifiedclang/unittests/Tooling/Syntax/CMakeLists.txt
The file was addedclang/unittests/Tooling/Syntax/TreeTest.cpp
The file was modifiedclang/lib/Tooling/Syntax/Tree.cpp
Commit 9114d6cbda6042000e12b9d799868c98e8fae385 by llvmgnsyncbot
[gn build] Port af582c9b0f3
The file was modifiedllvm/utils/gn/secondary/clang/unittests/Tooling/Syntax/BUILD.gn
Commit 6fa38de071f0993be81ea090c4a307b1d146c179 by phosek
Revert "[CMake] Use find_dependency in LLVMConfig.cmake"

This reverts commit 247c4fc50720ed48db2464bbe59839eedbe16794 as it
broke the runtime build.
The file was modifiedllvm/cmake/modules/LLVMConfig.cmake.in
Commit 3fec6ddc276a595e4409f04dabdd50c84f5f2a2d by martin
Reapply: [clang-cl] Always interpret the LIB env var as separated with semicolons

When cross compiling with clang-cl, clang splits the INCLUDE env
variable around semicolons (clang/lib/Driver/ToolChains/MSVC.cpp,
MSVCToolChain::AddClangSystemIncludeArgs) and lld splits the
LIB variable similarly (lld/COFF/Driver.cpp,
LinkerDriver::addLibSearchPaths). Therefore, the consensus for
cross compilation with clang-cl and lld-link seems to be to use
semicolons, despite path lists normally being separated by colons
on unix and EnvPathSeparator being set to that.

Therefore, handle the LIB variable similarly in Clang, when
handling lib file arguments when driving linking via Clang.

This fixes commands like "clang-cl test.c -Fetest.exe kernel32.lib" in
a cross compilation setting. Normally, most users call (lld-)link
directly, but meson happens to use this command syntax for
has_function() tests.

Reapply: Change Program.h to define procid_t as ::pid_t. When included
in lldb/unittests/Host/NativeProcessProtocolTest.cpp, it is included
after an lldb namespace containing an lldb::pid_t typedef, followed
later by a "using namespace lldb;". Previously, Program.h wasn't
included in this translation unit, but now it ends up included
transitively from Process.h.

Differential Revision: https://reviews.llvm.org/D88002
The file was modifiedllvm/lib/Support/Process.cpp
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/test/Driver/cl-inputs.c
The file was modifiedllvm/include/llvm/Support/Program.h
The file was modifiedllvm/include/llvm/Support/Process.h
Commit f93514545cd91b132fe987618488b8c1e5388fb0 by david.spickett
[AArch64] Fix return type of Neon scalar comparison intrinsics

The following should have unsigned return types
but were signed:
vceqd_s64 vceqzd_s64 vcged_s64 vcgezd_s64
vcgtd_s64 vcgtzd_s64 vcled_s64 vclezd_s64
vcltd_s64 vcltzd_s64 vtstd_s64

See https://developer.arm.com/documentation/ihi0073/latest

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D88009
The file was modifiedclang/include/clang/Basic/arm_neon.td
The file was modifiedclang/test/CodeGen/aarch64-neon-intrinsics.c
Commit e461921d6ccdd2a77209b2f4d3ca0a4db8e11c35 by sam.parker
[ARM] VPT validForTailPredication

Mark all VPT instructions as valid.

Differential Revision: https://reviews.llvm.org/D87759
The file was modifiedllvm/unittests/Target/ARM/MachineInstrTest.cpp
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
Commit a0c1dcc3182769ad1cb9b0ac8fd4ea8ff48847b4 by sam.parker
[ARM] Remove MVEDomain from VLDR/STR of P0

Remove the domain from the instructions and create a shouldInspect
helper for LowOverheadLoops which queries it or a vpr operand.

Differential Revision: https://reviews.llvm.org/D87900
The file was modifiedllvm/lib/Target/ARM/ARMInstrVFP.td
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir
Commit 0304c6da1006f6b472a1e5c1d8776a9f35c9439d by ntv
[MLIR] Add subf and rsqrt EDSC intrinsics

[MLIR] Add subf and rsqrt EDSC intrinsics

NOTE: Please merge it when ready.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D88039
The file was modifiedmlir/include/mlir/Dialect/StandardOps/EDSC/Intrinsics.h
Commit ed229132f1c4ea2ba0644fc345d8279e47a00565 by ntv
[mlir][Linalg] Uniformize linalg.generic with named ops.

This revision allows representing a reduction at the level of linalg on tensors for generic ops by uniformizing with the named ops approach.
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/test/Dialect/Linalg/fusion_indexed_generic.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile_indexed_generic.mlir
The file was modifiedmlir/test/Dialect/Linalg/transform-patterns.mlir
The file was modifiedmlir/test/Dialect/Linalg/fusion.mlir
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h
The file was modifiedmlir/test/Transforms/buffer-placement-preparation-allowed-memref-results.mlir
The file was modifiedmlir/test/Transforms/buffer-placement-preparation.mlir
The file was modifiedmlir/test/Conversion/LinalgToSPIRV/linalg-to-spirv.mlir
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/Builders.h
The file was modifiedmlir/test/Dialect/Linalg/fold-unit-trip-loops.mlir
The file was modifiedmlir/test/Transforms/buffer-placement.mlir
The file was modifiedmlir/lib/Dialect/Linalg/EDSC/Builders.cpp
The file was modifiedmlir/test/Dialect/Linalg/drop-unit-extent-dims.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile_parallel_reduce.mlir
The file was modifiedmlir/test/Dialect/Linalg/inlining.mlir
The file was modifiedmlir/test/Dialect/Linalg/fusion-tensor.mlir
The file was modifiedmlir/test/Dialect/Linalg/tensors-to-buffers.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/TensorsToBuffers.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile_parallel.mlir
The file was modifiedmlir/test/lib/Transforms/TestBufferPlacement.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile.mlir
The file was modifiedmlir/test/Transforms/copy-removal.mlir
The file was modifiedmlir/include/mlir/Dialect/Utils/StructuredOpsUtils.h
The file was modifiedmlir/test/Dialect/Linalg/standard.mlir
The file was modifiedmlir/test/Dialect/Linalg/loops.mlir
The file was modifiedmlir/test/Dialect/Linalg/parallel_loops.mlir
Commit 28b84dd138666abc005de4810af16bcf007530ea by grimar
[llvm-readobj/elf] - Stop reporting invalid extended indexes in warnings for unnamed section symbols.

We have an issue with `getFullSymbolName`: it assumes that the symbol passed is
always in the `.symtab`, what is wrong. We might calculate and report a wrong index currently.
I've added a test case revealing that.

This patch adds the "symbol index" argument to `getFullSymbolName` signature,
what fixes the issue.

Differential revision: https://reviews.llvm.org/D87899
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dyn-symbols.test
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit 66bcb14312a08b5d7e1197d23d748b2e23c4d852 by ecaldas
[SyntaxTree][Synthesis] Fix: `deepCopy` -> `deepCopyExpandingMacros`.

There can be Macros that are tagged with `modifiable`. Thus verifying
`canModifyAllDescendants` is not sufficient to avoid macros when deep
copying.

We think the `TokenBuffer` could inform us whether a `Token` comes from
a macro. We'll look into that when we can surface this information
easily, for instance in unit tests for `ComputeReplacements`.

Differential Revision: https://reviews.llvm.org/D88034
The file was modifiedclang/lib/Tooling/Syntax/Synthesis.cpp
The file was modifiedclang/unittests/Tooling/Syntax/SynthesisTest.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/BuildTree.h
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
Commit 73a6a164b84a8195defbb8f5eeb6faecfc478ad4 by omair.javaid
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""

This reverts commit 55f9f87da2c2ad791b9e62cccb1c035e037444fa.

Breaks following buildbots:
http://lab.llvm.org:8011/builders/lldb-arm-ubuntu/builds/4306
http://lab.llvm.org:8011/builders/lldb-aarch64-ubuntu/builds/9154
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-br.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll
The file was modifiedlldb/test/Shell/SymbolFile/NativePDB/disassembly.cpp
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_split_because_of_memsize_or_align.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select-sse.ll
The file was modifiedllvm/test/CodeGen/PowerPC/anon_aggr.ll
The file was removedllvm/test/CodeGen/PowerPC/spill-nor0.mir
The file was modifiedllvm/test/CodeGen/X86/atomic64.ll
The file was modifiedllvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir
The file was modifiedllvm/test/CodeGen/AArch64/br-cond-not-merge.ll
The file was modifiedllvm/test/CodeGen/Mips/atomicCmpSwapPW.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_split_because_of_memsize_or_align.ll
The file was modifiedllvm/test/CodeGen/Mips/implicit-sret.ll
The file was modifiedllvm/test/CodeGen/X86/pr30813.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll
The file was modifiedllvm/test/CodeGen/X86/swifterror.ll
The file was modifiedllvm/test/CodeGen/ARM/ldrd.ll
The file was modifiedllvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
The file was modifiedllvm/test/CodeGen/X86/win64_eh.ll
The file was modifiedllvm/test/CodeGen/X86/crash-O0.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul_vec.ll
The file was modifiedllvm/test/DebugInfo/Mips/prologue_end.ll
The file was modifiedllvm/test/CodeGen/X86/pr32484.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/float_constants.ll
The file was removedllvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
The file was modifiedllvm/test/CodeGen/Mips/atomic-min-max.ll
The file was modifiedllvm/test/CodeGen/PowerPC/spill-nor0.ll
The file was removedllvm/test/CodeGen/X86/bug47278-eflags-error.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitreverse.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s64.ll
The file was modifiedllvm/test/CodeGen/X86/pr34592.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-call.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-vararg.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-cmp-branch.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll
The file was modifiedllvm/test/CodeGen/X86/pr42452.ll
The file was modifiedllvm/test/CodeGen/Hexagon/vect/vect-load-v4i16.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bswap.ll
The file was modifiedllvm/test/CodeGen/ARM/pr47454.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/cttz.ll
The file was modifiedllvm/test/CodeGen/X86/pr34653.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-monotonic.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64_32-fastisel.ll
The file was removedllvm/test/CodeGen/X86/bug47278.mir
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
The file was modifiedllvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
The file was modifiedllvm/test/CodeGen/X86/pr44749.ll
The file was modifiedllvm/test/DebugInfo/X86/prologue-stack.ll
The file was modifiedllvm/test/DebugInfo/X86/pieces-1.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-ldr-str-thumb-neg-index.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
The file was modifiedllvm/test/CodeGen/AArch64/swifterror.ll
The file was modifiedllvm/test/CodeGen/Mips/atomic64.ll
The file was modifiedllvm/test/DebugInfo/AArch64/prologue_end.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vector-spill.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict-fcmp-noopt.ll
The file was modifiedllvm/test/CodeGen/PowerPC/stack-guard-reassign.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
The file was modifiedllvm/test/DebugInfo/Mips/delay-slot.ll
The file was modifiedllvm/test/CodeGen/PowerPC/elf-common.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vsx.ll
The file was modifiedllvm/test/CodeGen/X86/avx-load-store.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll
The file was modifiedllvm/test/CodeGen/Mips/atomic.ll
The file was modifiedllvm/test/CodeGen/X86/volatile.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64_32-null.ll
The file was modifiedllvm/test/DebugInfo/X86/fission-ranges.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll
The file was modifiedllvm/test/CodeGen/X86/pr32241.ll
The file was modifiedllvm/test/CodeGen/X86/x86-32-intrcc.ll
The file was modifiedllvm/test/CodeGen/ARM/stack-guard-reassign.ll
The file was modifiedllvm/test/CodeGen/X86/pr30430.ll
The file was modifiedllvm/test/DebugInfo/ARM/prologue_end.ll
The file was modifiedllvm/test/CodeGen/ARM/thumb-big-stack.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll
The file was modifiedllvm/test/DebugInfo/AArch64/frameindices.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select.ll
The file was modifiedllvm/test/CodeGen/AArch64/fast-isel-cmpxchg.ll
The file was modifiedllvm/test/CodeGen/X86/pr39733.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-nontemporal.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/darwin-tls-call-clobber.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
The file was modifiedllvm/test/CodeGen/PowerPC/addegluecrash.ll
The file was modifiedllvm/test/CodeGen/SPARC/fp16-promote.ll
The file was modifiedllvm/test/CodeGen/ARM/debug-info-blocks.ll
The file was modifiedllvm/test/CodeGen/X86/regalloc-fast-missing-live-out-spill.mir
The file was modifiedllvm/test/CodeGen/X86/pr32340.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zext_and_sext.ll
The file was modifiedllvm/test/CodeGen/Mips/micromips-eva.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address_pic.ll
The file was modifiedllvm/test/CodeGen/X86/pr1489.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill192.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/var_arg.ll
The file was modifiedllvm/test/DebugInfo/X86/sret.ll
The file was modifiedllvm/test/CodeGen/ARM/swifterror.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/test_TypeInfoforMF.ll
The file was modifiedllvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fast-isel-pcrel.ll
The file was modifiedllvm/test/CodeGen/AArch64/combine-loads.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_4_unaligned.ll
The file was modifiedllvm/test/CodeGen/PowerPC/popcount.ll
The file was modifiedllvm/test/CodeGen/X86/atomic32.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
The file was modifiedllvm/test/CodeGen/X86/pr32345.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll
The file was modifiedllvm/test/CodeGen/Mips/copy-fp64.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll
The file was modifiedllvm/test/DebugInfo/X86/parameters.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s32.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
The file was modifiedllvm/test/CodeGen/Mips/msa/ldr_str.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-x86-64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-m0.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/aggregate_struct_return.ll
The file was modifiedllvm/test/CodeGen/AArch64/swift-return.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll
The file was modifiedllvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll
The file was modifiedllvm/test/CodeGen/ARM/crash-greedy-v6.ll
The file was modifiedllvm/test/CodeGen/ARM/legalize-bitcast.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zextLoad_and_sextLoad.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/callabi.ll
The file was modifiedllvm/test/CodeGen/X86/stack-protector-strong-macho-win32-xor.ll
The file was modifiedllvm/test/CodeGen/X86/pr11415.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub_vec.ll
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll
The file was modifiedllvm/test/CodeGen/X86/atomic6432.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-agpr.mir
The file was removedllvm/test/CodeGen/AMDGPU/unexpected-reg-unit-state.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/brindirect.ll
The file was removedllvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
The file was modifiedllvm/test/CodeGen/X86/atomic-unordered.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/branch.ll
The file was modifiedllvm/test/CodeGen/X86/pr27591.ll
The file was modifiedllvm/test/CodeGen/ARM/cmpxchg-O0-be.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
The file was modifiedllvm/test/DebugInfo/X86/dbg-declare-arg.ll
The file was modifiedllvm/test/CodeGen/ARM/cmpxchg-O0.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll
The file was modifiedllvm/test/CodeGen/Thumb2/high-reg-spill.mir
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-select.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
The file was modifiedllvm/test/CodeGen/X86/pr47000.ll
The file was modifiedllvm/test/CodeGen/X86/x86-64-intrcc.ll
The file was modifiedllvm/test/DebugInfo/X86/op_deref.ll
The file was modifiedllvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll
The file was modifiedllvm/test/CodeGen/X86/mixed-ptr-sizes.ll
The file was modifiedllvm/test/CodeGen/SystemZ/swift-return.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sitofp_and_uitofp.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
The file was modifiedllvm/test/CodeGen/X86/pr32451.ll
The file was modifiedllvm/test/CodeGen/AArch64/cmpxchg-O0.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
The file was modifiedllvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctlz.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fp64-to-int16.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctpop.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_4_unaligned.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vsx-args.ll
The file was modifiedllvm/test/CodeGen/AArch64/unwind-preserved.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll
The file was modifiedllvm/test/DebugInfo/X86/subreg.ll
The file was modifiedllvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-overflow-toc.py
The file was modifiedllvm/test/CodeGen/X86/phys-reg-local-regalloc.ll
The file was modifiedllvm/test/CodeGen/AArch64/popcount.ll
The file was modifiedllvm/test/CodeGen/ARM/Windows/alloca.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
The file was modifiedllvm/test/DebugInfo/X86/reference-argument.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
The file was modifiedllvm/test/CodeGen/X86/stack-protector-msvc.ll
The file was modifiedllvm/test/CodeGen/SystemZ/swifterror.ll
The file was modifiedllvm/test/CodeGen/X86/swift-return.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll
Commit b4fa884a73c5c883723738f67ad1810a6d48cc2d by sam.parker
[ARM] Improve VPT predicate tracking

The VPTBlock has been modified to track the 'global' state of the
VPR, as well as the state for each block. Each object now just holds
a list of instructions that makeup the block, while static structures
hold the predicate information. This enables global access for
querying how both a VPT block and individual instructions are
predicated. These changes now allow us, again, to handle more
complicated cases where multiple instructions build a predicate
and/or where the same predicate in used in multiple blocks.

It doesn't, however, get us back to before the tracking was 'fixed'
as some extra logic will be required to properly handle VPT
instructions. Currently a VPT could be effectively predicated because
of it's inputs, but the existing logic will not detect that and so
will refuse to perform the transformation. This can be seen in
remat-vctp.ll test where we still don't perform the transform.

Differential Revision: https://reviews.llvm.org/D87681
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/tp-multiple-vpst.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-blocks.mir
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Commit 892ef2e3c0b60656a95d0d9e9f458b73238b21b7 by jay.foad
[AMDGPU] More codegen patterns for v2i16/v2f16 build_vector

It's simpler to do this at codegen time than to do ad-hoc constant
folding of machine instructions in SIFoldOperands.

Differential Revision: https://reviews.llvm.org/D88028
The file was modifiedllvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
Commit 0356a413a443864409f966b069656814f10e7710 by benny.kra
Revert "Implement a new kind of Pass: dynamic pass pipeline"

This reverts commit 385c3f43fceba227be2e4dce84a59075733541c1.

Test  mlir/test/Pass:dynamic-pipeline-fail-on-parent.mlir.test fails
when run with ASAN:

ERROR: AddressSanitizer: stack-use-after-scope on address ...

Reviewed By: bkramer, pifon2a

Differential Revision: https://reviews.llvm.org/D88079
The file was modifiedmlir/include/mlir/Pass/Pass.h
The file was modifiedmlir/include/mlir/Pass/PassManager.h
The file was removedmlir/test/lib/Transforms/TestDynamicPipeline.cpp
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Pass/Pass.cpp
The file was removedmlir/test/Pass/dynamic-pipeline-nested.mlir
The file was removedmlir/test/Pass/dynamic-pipeline.mlir
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was removedmlir/test/Pass/dynamic-pipeline-fail-on-parent.mlir
Commit 16fde88dbd797b01f3c236062fbec50fe5bbf81d by mkazantsev
[SCEV] Support unsigned predicates in isKnownPredicateViaNoOverflow

SCEV should be able to prove facts like `x <u x+1<nuw>`.

Differential Revision: https://reviews.llvm.org/D88015
Reviewed By: lebedev.ri
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/unittests/Analysis/ScalarEvolutionTest.cpp
Commit 0841f7172b74e1cbe2ce9839e5f4e1f0c2836bef by frgossen
[MLIR][Linalg] Fix assertion in dependency analysis

The assertion falsely expected ranked memrefs only.  Now both, ranked and
unranked memrefs are allowed.

Differential Revision: https://reviews.llvm.org/D88080
The file was modifiedmlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
Commit c7ff6e0fe1cd37a162af5f30d8cb070eb4cc038d by esme.yi
[NFC][PowerPC]Add tests for multiply-by-constant.
The file was modifiedllvm/test/CodeGen/PowerPC/mulli.ll
Commit f835779160ec30340676918915526615a07e826e by llvm-dev
[APFloat] multiplySignificand - always pass IEEEFloat as const reference. NFCI.

We do this in all other cases.
The file was modifiedllvm/lib/Support/APFloat.cpp
The file was modifiedllvm/include/llvm/ADT/APFloat.h
Commit c0071862bb426689acef09491b01b1edca9d747e by stefanp
[PowerPC] Add support for R_PPC64_GOT_TPREL_PCREL34 used in TLS Initial Exec

Add Thread Local Storage Initial Exec support to LLD.

This patch adds the computation for the relocations as well as the relaxation from Initial Exec to Local Exec.

Initial Exec:
```
pld r9, x@got@tprel@pcrel
add r9, r9, x@tls@pcrel
```
or
```
pld r9, x@got@tprel@pcrel
lbzx r10, r9, x@tls@pcrel
```
Note that @tls@pcrel is actually encoded as R_PPC64_TLS with a one byte displacement.

For the above examples relaxing Intitial Exec to Local Exec:
```
paddi r9, r9, x@tprel
nop
```
or
```
paddi r9, r13, x@tprel
lbz r10, 0(r9)
```

Reviewed By: nemanjai, MaskRay, #powerpc

Differential Revision: https://reviews.llvm.org/D86893
The file was addedlld/test/ELF/ppc64-tls-pcrel-ie.s
The file was modifiedlld/ELF/Arch/PPC64.cpp
Commit a15b42146c617777b364e3b63babf1de547b9f26 by llvm-dev
Revert rGf835779160ec303 "[APFloat] multiplySignificand - always pass IEEEFloat as const reference. NFCI."

This reverts commit f835779160ec30340676918915526615a07e826e while I investigate some buildbot failures
The file was modifiedllvm/lib/Support/APFloat.cpp
The file was modifiedllvm/include/llvm/ADT/APFloat.h
Commit b5e49e91cb90eda1f926139c8567e27f1b664cc1 by Raphael Isemann
[lldb] Ignore certain Clang type sugar when creating the type name

Clang has some type sugar that only serves as a way to preserve the way a user
has typed a certain type in the source code. These types are currently not
unwrapped when we query the type name for a Clang type, which means that this
type sugar actually influences what formatters are picked for a certain type.
Currently if a user decides to reference a type by doing `::GlobalDecl Var = 3;`,
the type formatter for `GlobalDecl` will not be used (as the type sugar
around the type gives it the name `::GlobalDecl`. The same goes for other ways
to spell out a type such as `auto` etc.

With this patch most of this type sugar gets stripped when the full type name is
calculated. Typedefs are not getting desugared as that seems counterproductive.
I also don't desugar atomic types as that's technically not type sugar.

Reviewed By: jarin

Differential Revision: https://reviews.llvm.org/D87481
The file was addedlldb/test/API/lang/cpp/elaborated-types/main.cpp
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
The file was addedlldb/test/API/lang/cpp/elaborated-types/Makefile
The file was addedlldb/test/API/lang/cpp/elaborated-types/TestElaboratedTypes.py
Commit a3d0dce2608bb399f2bf0122d8c6a4c7b4d6c1fa by meera.nakrani
[ARM][TTI] Prevents constants in a min(max) or max(min) pattern from being hoisted when in a loop

Changes TTI function getIntImmCostInst to take an additional Instruction parameter,
which enables us to be able to check it is part of a min(max())/max(min()) pattern that will match SSAT.
We can then mark the constant used as free to prevent it being hoisted so SSAT can still be generated.
Required minor changes in some non-ARM backends to allow for the optional parameter to be included.

Differential Revision: https://reviews.llvm.org/D87457
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
The file was modifiedllvm/lib/Transforms/Scalar/ConstantHoisting.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
Commit e2703c021d844ea0e5c1b203a4bd534e7a231997 by mkazantsev
[SCEV] Handle `less` predicates for FoundPred = NE

Currently these predicates are ignored, yet their handling is
pretty simple. I could not find a single test where it would
actually change something, but it's only because isImpliedCondOperands
is not smart enough to prove it further on. Yet the situation when
we come there with `less` predicate is pretty common.

Differential Revision: https://reviews.llvm.org/D87890
Reviewed By: fhahn
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 0fb97fd6a4f2ec9267a1f4d039ec8895c2460ab7 by Abhina.Sreeskantharajan
[SystemZ][z/OS] Set default wchar_t type for zOS

Set the default wchar_t type on z/OS, and unsigned as the default.

Reviewed By: hubert.reinterpretcast, fanbo-meng

Differential Revision: https://reviews.llvm.org/D87624
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/CodeGen/wchar-size.c
The file was modifiedclang/test/Preprocessor/wchar_t.c
The file was modifiedclang/test/Sema/wchar.c
The file was modifiedclang/test/Lexer/wchar-signedness.c
The file was modifiedclang/lib/Basic/Targets/OSTargets.h
Commit 967e29ff8c8f572aceaa0f551b281a4d7c4a73bd by wei.huang
[LLD][PowerPC][test] Update thunk range error report for PPC64PCRelLongBranchThunk

Update the thunk range error report for PPC64PCRelLongBranchThunk and add a range
error test case for PPC64R12SetupStub.

Differential Revision: https://reviews.llvm.org/D87381
The file was modifiedlld/ELF/Thunks.cpp
The file was addedlld/test/ELF/ppc64-pcrel-call-to-toc-error.s
The file was modifiedlld/test/ELF/ppc64-pcrel-long-branch-error.s
Commit 94c799fecff06c614cb68976288fc7b8c9a11139 by sam.parker
[ARM] Trying to fix asan buildbot
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Commit 0451ed961993d4f52f4083192de0e57a1b246ac6 by Louis Dionne
[libc++] NFC: Remove trailing whitespace from the feature test macro table
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was modifiedlibcxx/docs/FeatureTestMacroTable.rst
Commit d682a36ef9dace4887c42d392110ea21eb9e31a6 by llvm-dev
[SLP] Merge null and dyn_cast<> checks into dyn_cast_or_null<>. NFCI.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit e952bb709ff70e45c80434fbb8e0b97b52afcf01 by frgossen
[MLIR][Standard] Add `atan` to standard dialect

Differential Revision: https://reviews.llvm.org/D88091
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
Commit 6dc06fa09d1a259df1f897dc821ba1544e2bcd24 by ecaldas
[SyntaxTree] Add tests for the assignment of the `canModify` tag.

Differential Revision: https://reviews.llvm.org/D88077
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit 062276c691099f977e69c101f21c1a9ac549f283 by spatel
[SLP] clean up code in gather(); NFC

1. Use range for-loop to avoid repeatedly accessing end index.
2. Better variable names.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit bbd49a0266921ce68a8581b8ae3d5c88eda8c679 by spatel
[SLP] move misplaced code comments; NFC
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 0c3bfbe4bc212c8e6b54ffd6d9f59ae513e31247 by spatel
[SLP] reduce code duplication for checking parent block; NFC
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 7e78d89052b15f32ea56f018698194c7c9627152 by stefanp
[PowerPC] Fix for compiler side issue in PCRelative Local Exec

Stop combining loads and stores with PPCISD::ADD_TLS before we can merge the
node with with TLS_LOCAL_EXEC_MAT_ADDR. The issue is that
TLS_LOCAL_EXEC_MAT_ADDR cannot be selected by itself and requires the previous
ADD_TLS node that goes with it. However, we sometimes try to combine ADD_TLS
with loads and stores that come after it. If this happens then the ADD_TLS is
removed and TLS_LOCAL_EXEC_MAT_ADDR cannot be selected.

While this bug fix will address the issue it my not be ideal from a performance
perspective as we may be able to add patterns to combine TLS_LOCAL_EXEC_MAT_ADDR
with ADD_TLS with the load and store that comes after it all in one. However,
this is beyond the scope of this patch.

Reviewed By: NeHuang

Differential Revision: https://reviews.llvm.org/D88030
The file was modifiedllvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll
Commit bf202b8ce77caaace45de87314d2263e53f81021 by david.truby
[NFC][mlir] Remove llvm:: prefix from SmallVector in parallel pretty printer.

This prefix is unnecessary as SmallVector is re-exported in the mlir namespace.

Differential Revision: https://reviews.llvm.org/D88025
The file was modifiedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Commit e8fb4eba4fb6cbda661080d76059f2b130df5020 by daltenty
[AIX][clang][driver] Make sure crti[_64].o is linked in C++ mode

since crti is required for functional static initialization.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D87927
The file was modifiedclang/test/Driver/aix-ld.c
The file was modifiedclang/lib/Driver/ToolChains/AIX.cpp
Commit af712986488f5f2d37a35224a04d1dc9d57f32d2 by llvm-dev
[X86] Cleanup/add namespace closure comments. NFCI.

Fixes some clang-tidy llvm-namespace-comment warnings.
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
Commit 0793b45660a9cfcc83a3f3ab326b8794782c461c by llvm-dev
[X86] Add missing namespace closure comments. NFCI.

Fixes some clang-tidy llvm-namespace-comment warnings.
The file was modifiedllvm/lib/Target/X86/X86WinEHState.cpp
The file was modifiedllvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
Commit 534f6e171808cfe9f3f9e3de7e754715d038c409 by michael.hliao
[PeepholeOptimizer] Enhance the redundant COPY elimination.

- Eliminate redundant COPYs from the same register & subregister pair.

Differential Revision: https://reviews.llvm.org/D87939
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcvt16.ll
The file was addedllvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
The file was modifiedllvm/lib/CodeGen/PeepholeOptimizer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
Commit c671e34bf2ae0eaa78d214b849ddd5de30b3b5be by flo
[VPlan] Add dump() helper to VPValue & VPRecipeBase.

This provides a convenient way to print VPValues and recipes in a
debugger. In particular it saves the user from instantiating
VPSlotTracker to print recipes or values.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanValue.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
Commit 7afbf3192dc5690285edbfb336c061a9d43e247e by gkm
[lld-macho] minimally handle option -dynamic

Stifle the warning for unimplemented option `-dyamic`, since it is already the default. Add `Config::staticLink` and skeletal support for altering the flag, but otherwise leave the option `-static` as hidden and its warning in place.

Differential Revision: https://reviews.llvm.org/D88045
The file was modifiedlld/MachO/Options.td
The file was modifiedlld/MachO/Driver.cpp
The file was modifiedlld/MachO/Config.h
Commit 89074bdc813a0e8bd9ff5e69e76b134dc7ae1bd9 by daltenty
[AIX][compiler-rt] Use the AR/ranlib mode flag for 32-bit and 64-bit mode

since we will be building both 32-bit and 64-bit compiler-rt builtins
from a single configuration.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D87113
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt
The file was modifiedcompiler-rt/CMakeLists.txt
Commit 0724f8bf47f8cb073d41e2750d45d5b05e66bf0b by Louis Dionne
[libc++] Implement C++20's P0784 (More constexpr containers)

This commit adds std::construct_at, and marks various members of
std::allocator_traits and std::allocator as constexpr. It also adds
tests and turns the existing tests into hybrid constexpr/runtime tests.

Thanks to Richard Smith for initial work on this, and to Michael Park
for D69803, D69132 and D69134, which are superseded by this patch.

Differential Revision: https://reviews.llvm.org/D68364
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/construct.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate.verify.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/deallocate.pass.cpp
The file was addedlibcxx/test/std/utilities/memory/default.allocator/allocator.dtor.pass.cpp
The file was addedlibcxx/test/std/utilities/memory/default.allocator/allocator.members/allocate.constexpr.size.verify.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate_hint.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/memory.version.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector/vector.cons/copy.move_only.verify.cpp
The file was modifiedlibcxx/include/new
The file was modifiedlibcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy_at.pass.cpp
The file was modifiedlibcxx/include/version
The file was modifiedlibcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy_n.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/default.allocator/allocator_types.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/default.allocator/allocator.globals/eq.pass.cpp
The file was addedlibcxx/test/std/utilities/memory/specialized.algorithms/specialized.construct/construct_at.pass.cpp
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was modifiedlibcxx/docs/FeatureTestMacroTable.rst
The file was modifiedlibcxx/test/std/utilities/memory/default.allocator/allocator.members/allocate.size.pass.cpp
The file was modifiedlibcxx/www/cxx2a_status.html
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/destroy.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/select_on_container_copy_construction.pass.cpp
The file was modifiedlibcxx/include/memory
The file was modifiedlibcxx/test/std/utilities/memory/default.allocator/allocator.members/allocate.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/max_size.pass.cpp
Commit a031ef6f3ab451d797763275ce4bc658aa940794 by aeubanks
[GVNSink][NewPM] Add GVNSinkPass to PassRegistry.def
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/test/Transforms/GVNSink/struct.ll
Commit 7b51961cd0748ed5bd3b6fdacbfe596c374c93bc by kostyak
[scudo][standalone] Remove the pthread key from the shared TSD

https://reviews.llvm.org/D87420 removed the uses of the pthread key,
but the key itself was left in the shared TSD registry. It is created
on registry initialization, and destroyed on registry teardown.

There is really no use for it now, so we can just remove it.

Differential Revision: https://reviews.llvm.org/D88046
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd_shared.h
Commit 6537004913f3009d896bc30856698e7d22199ba7 by alexandre.ganea
[ThinLTO] Re-order modules for optimal multi-threaded processing

Re-use an optimizition from the old LTO API (used by ld64).
This sorts modules in ascending order, based on bitcode size, so that larger modules are processed first. This allows for smaller modules to be process last, and better fill free threads 'slots', and thusly allow for better multi-thread load balancing.

In our case (on dual Intel Xeon Gold 6140, Windows 10 version 2004, two-stage build), this saves 15 sec when linking `clang.exe` with LLD & `-flto=thin`, `/opt:lldltojobs=all`, no ThinLTO cache, -DLLVM_INTEGRATED_CRT_ALLOC=d:\git\rpmalloc.

Before patch: 102 sec
After patch: 85 sec

Inspired by the work done by David Callahan in D60495.

Differential Revision: https://reviews.llvm.org/D87966
The file was modifiedllvm/include/llvm/LTO/LTO.h
The file was modifiedllvm/lib/LTO/ThinLTOCodeGenerator.cpp
The file was modifiedllvm/lib/LTO/LTO.cpp
Commit be2158bdccda5e7c3d9492654500293f8399b87c by aeubanks
[DI][ASan][NewPM] Fix some DebugInfo ASan tests under NPM
The file was modifiedllvm/test/DebugInfo/Generic/block-asan.ll
The file was modifiedllvm/test/DebugInfo/X86/asan_debug_info.ll
Commit 9bb5ecf1f760e1b1fe4697189e4db99100baffad by Saleem Abdulrasool
Sema: introduce `__attribute__((__swift_name__))`

This introduces the new `swift_name` attribute that allows annotating
APIs with an alternate spelling for Swift.  This is used as part of the
importing mechanism to allow interfaces to be imported with a new name
into Swift.  It takes a parameter which is the Swift function name.
This parameter is validated to check if it matches the possible
transformed signature in Swift.

This is based on the work of the original changes in
https://github.com/llvm/llvm-project-staging/commit/8afaf3aad2af43cfedca7a24cd817848c4e95c0c

Differential Revision: https://reviews.llvm.org/D87534
Reviewed By: Aaron Ballman, Dmitri Gribenko
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
The file was addedclang/test/SemaObjC/attr-swift_name.m
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
Commit bd31abc1d0f17536fcd85f4dfcc79d37834aac20 by htobonmm7
[OpenMPOpt] Refactored "issue" and "wait" declarations for data map runtime call.

Refactored __tgt_target_data_begin_mapper_<issue|wait> to receive the handle as an input/output argument.
This given the compiler warning of returning the handle as copy.

Differential Revision: https://reviews.llvm.org/D88029
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPKinds.def
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedllvm/test/Transforms/OpenMP/hide_mem_transfer_latency.ll
Commit 703d3f25976c98bcf0e4717087c5a51b92c5f51a by gkm
[lld-macho] Make lld::getInteger() tolerate leading "0x"/"0X" when base is 16

ld64 is cool with leading `0x` for hex command-line args, and we should be also.

Reviewed By: #lld-macho, int3

Differential Revision: https://reviews.llvm.org/D88065
The file was modifiedlld/test/MachO/headerpad.s
The file was modifiedlld/Common/Args.cpp
Commit 4c23cf3ca0e07482b7ab7989b4e480e1cc0d6091 by mascasa
[sanitizer_common] Add debug print to sysmsg.c
The file was modifiedcompiler-rt/test/sanitizer_common/TestCases/Linux/sysmsg.c
Commit 723fea23079f9c85800e5cdc90a75414af182bfd by alexandre.ganea
Silence 'warning: unused variable' when compiling with Clang 10.0
The file was modifiedllvm/lib/CodeGen/PeepholeOptimizer.cpp
Commit 4dada8d617d81cd00e4028e09f7093f5b10a8a41 by llvm-dev
[DAG] Remove DAGTypeLegalizer::GenWidenVectorTruncStores (PR42046)

Just scalarize trunc stores - GenWidenVectorTruncStores does the same thing but is flawed (PR42046) and unused.

Differential Revision: https://reviews.llvm.org/D87708
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Commit b3147058dec7d42ae0284d6e6edf25eb762c8b89 by amy.kwan1
[PowerPC] Implement the 128-bit Vector Divide Extended Builtins in Clang/LLVM

This patch implements the 128-bit vector divide extended builtins in Clang/LLVM.
These builtins map to the vdivesq and vdiveuq instructions respectively.

Differential Revision: https://reviews.llvm.org/D87729
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
The file was modifiedllvm/test/CodeGen/PowerPC/p10-vector-divide.ll
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
Commit 079757b551f3ab5218af7344a7ab3c79976ec478 by amy.kwan1
[PowerPC] Implement Vector String Isolate Builtins in Clang/LLVM

This patch implements the vector string isolate (predicate and non-predicate
versions) builtins. The predicate builtins are custom selected within PPCISelDAGToDAG.

Differential Revision: https://reviews.llvm.org/D87671
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedllvm/test/CodeGen/PowerPC/p10-string-ops.ll
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
Commit d7336ad5ff985dabbe26a728a5789c33b9167286 by ishizaki
[mlir] NFC: fix trivial typos under include directory

Reviewed By: mravishankar, jpienaar

Differential Revision: https://reviews.llvm.org/D88040
The file was modifiedmlir/include/mlir/Dialect/PDL/IR/PDLOps.td
The file was modifiedmlir/include/mlir-c/StandardTypes.h
The file was modifiedmlir/include/mlir/Reducer/ReductionNode.h
The file was modifiedmlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/include/mlir-c/IR.h
The file was modifiedmlir/include/mlir/IR/StorageUniquerSupport.h
The file was modifiedmlir/include/mlir/Interfaces/SideEffectInterfaces.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVAttributes.h
The file was modifiedmlir/include/mlir-c/StandardAttributes.h
The file was modifiedmlir/include/mlir/Pass/AnalysisManager.h
The file was modifiedmlir/include/mlir/Reducer/Passes/OpReducer.h
The file was modifiedmlir/include/mlir/Reducer/ReductionTreeUtils.h
The file was modifiedmlir/include/mlir/Reducer/Tester.h
The file was modifiedmlir/include/mlir/Analysis/Presburger/Simplex.h
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/AffineOps.td
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was modifiedmlir/include/mlir/Support/InterfaceSupport.h
Commit 2a6db92ca97da946307b559e63c6ac75caf4bbd6 by jpienaar
[mlir][ods] Make OpBuilder and OperationState optional

The OpBuilder is required to start with OpBuilder and OperationState, so remove
the need for the user to specify it. To make it simpler to update callers,
retain the legacy behavior for now and skip injecting OpBuilder/OperationState
when params start with OpBuilder.

Related to bug 47442.

Differential Revision: https://reviews.llvm.org/D88050
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/test/mlir-tblgen/op-decl.td
Commit c3c08bfdfd6244e0429753ee56df39c90187d772 by ecaldas
[SyntaxTree] Test the List API

Differential Revision: https://reviews.llvm.org/D87839
The file was modifiedclang/include/clang/Tooling/Syntax/Tree.h
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
Commit 625761825620f19a44c7a1482ce05d678a1b0deb by sam.mccall
[ASTMatchers] Avoid recursion in ancestor matching to save stack space.

A recent change increased the stack size of memoizedMatchesAncestorOfRecursively
leading to stack overflows on real code involving large fold expressions.
It's not totally unreasonable to choke on very deep ASTs, but as common
infrastructure it's be nice if ASTMatchFinder is more robust.
(It already uses data recursion for the regular "downward" traversal.)

Differential Revision: https://reviews.llvm.org/D86964
The file was modifiedclang/lib/ASTMatchers/ASTMatchFinder.cpp
Commit d1e0f9f3cf13e071d788149bde810c46cd14c74b by mtrofin
[NFC][regalloc] Simplify/conform to style guide indvars in Greedy

Differential Revision: https://reviews.llvm.org/D88055
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit 848d66fafd2ee4c15292fa5dd25ca752a3f65537 by Paul C. Anagnostopoulos
Version 0.5 of the new "TableGen Backend Developer's Guide."
Files modified to take comments into account.
MLIR documentation updated for new TableGen documentation files.
The file was addedllvm/lib/TableGen/TableGenBackendSkeleton.cpp
The file was modifiedllvm/docs/TableGen/BackEnds.rst
The file was modifiedmlir/docs/Tutorials/QuickstartRewrites.md
The file was modifiedllvm/lib/TableGen/CMakeLists.txt
The file was modifiedmlir/docs/OpDefinitions.md
The file was addedllvm/docs/TableGen/BackGuide.rst
The file was modifiedllvm/docs/TableGen/ProgRef.rst
Commit 8a64689e264ce039e4fb0a09c3e136a1c8451838 by Jan Korous
[Analyzer][WebKit] UncountedLocalVarsChecker

Differential Review: https://reviews.llvm.org/D83259
The file was addedclang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLocalVarsChecker.cpp
The file was addedclang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
The file was modifiedclang/docs/analyzer/checkers.rst
Commit a75f75415aaeee4159c1771d946bb4ae957d7a74 by llvmgnsyncbot
[gn build] Port 848d66fafd2
The file was modifiedllvm/utils/gn/secondary/llvm/lib/TableGen/BUILD.gn
Commit 5ae94047bff1e2c92f9507443bf97ff39ee8243b by llvmgnsyncbot
[gn build] Port 8a64689e264
The file was modifiedllvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Commit 16ca711803300bd966acf8759876a1ccd478c616 by hokein.wu
[clang] Fix a typo-correction crash

We leave a dangling TypoExpr when typo-correction is performed
successfully in `checkArgsForPlaceholders`, which leads a crash in the
later TypoCorrection.

This code was added in https://github.com/llvm/llvm-project/commit/1586782767938df3a20f7abc4d8335c48b100bc4,
and it didn't seem to have enough test coverage.
The fix is to remove this part, and no failuer tests.

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D87815
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/SemaCXX/typo-correction-crash.cpp
Commit a6f8aeb51c731ce01b995725cbda3f9be9059ab0 by hubert.reinterpretcast
[test][MC] Rehabilitate llvm/test/MC/COFF/bigobj.py

The subject test was not actually running. This patch adds the
relevant suffix to the list of lit case filename extensions for the
enclosing directory.

Minor adjustments are also made to deal with bit rot.

Reviewed By: daltenty

Differential Revision: https://reviews.llvm.org/D87122
The file was modifiedllvm/test/MC/COFF/bigobj.py
The file was modifiedllvm/test/MC/COFF/lit.local.cfg
Commit b0f58aa116a1ac2c2fa6b1667017bb29b3418411 by hubert.reinterpretcast
[NFC] Replace tabs with spaces in PPCInstrPrefix.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
Commit 6801950192ff4f6d60c822fc721354f34e609e7a by hubert.reinterpretcast
[InstCombine] For pow(x, +/-0.5), stop falling into pow(x, 1.5), etc. case

The current code for handling pow(x, y) where y is an integer plus 0.5
is not explicitly guarded against attempting to transform the case where
abs(y) is exactly 0.5.

The latter case is meant to be handled by `replacePowWithSqrt`. Indeed,
if the pow(x, integer+0.5) case proceeds past a certain point, it will
hit an assertion by attempting to form pow(x, 0) using `getPow`.

This patch adds an explicit check to prevent attempting the
pow(x, integer+0.5) transformation on pow(x, +/-0.5) as suggested during
the review of D87877. This has the effect of retaining the shrinking of
`pow` to `powf` when the `sqrt` libcall cannot be formed.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D88066
The file was modifiedllvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/pow-4.ll
Commit 8457ae0d9359590b2db1e8e090531197be4d62c6 by Jonas Devlieghere
[lldb] Skip test_common_completion_process_pid_and_name with reproducers

This test launches a subprocess which will have a different PID during
capture and replay.
The file was modifiedlldb/test/API/functionalities/completion/TestCompletion.py
Commit 783dc7dc7ed7487d0782c2feb8854df949b98e69 by Jonas Devlieghere
[lldb] Skip TestMiniDumpUUID with reproducers

The modules not getting orphaned is wreaking havoc when the UUIDs match
between tests.
The file was modifiedlldb/test/API/functionalities/postmortem/minidump-new/TestMiniDumpUUID.py
Commit a5141b83f1f1b94886d17c9091f09d4c63568dd2 by aeubanks
[LoopInfo][NewPM] Fix tests in Analysis/LoopInfo under NPM
The file was modifiedllvm/test/Analysis/LoopInfo/annotated-parallel-simple.ll
The file was modifiedllvm/test/Analysis/LoopInfo/annotated-parallel-complex.ll
The file was modifiedllvm/test/Analysis/LoopInfo/2003-05-15-NestingProblem.ll
Commit e16d10b7535ab2224e5bdc533860b7eadf596164 by aeubanks
[test][NewPM] Pin do-nothing-intrinsic.ll to legacy PM

It tests CallGraph infra around the legacy PM which isn't relevant in NPM.
The file was modifiedllvm/test/Analysis/CallGraph/do-nothing-intrinsic.ll
Commit 36ea18b06430e0a1094f9b0994e4abb5cc2175c9 by lebedev.ri
[NFC][CVP] Add tests for srem with potentially different sigdness domains
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/srem.ll
Commit 4eeeb356fc41babf46797b062f74f978b818622b by lebedev.ri
[CVP] Enhance SRem -> URem fold to work not just on non-negative operands

This is a continuation of 8d487668d09fb0e4e54f36207f07c1480ffabbfd,
the logic is pretty much identical for SRem:

Name: pos pos
Pre: C0 >= 0 && C1 >= 0
%r = srem i8 C0, C1
  =>
%r = urem i8 C0, C1

Name: pos neg
Pre: C0 >= 0 && C1 <= 0
%r = srem i8 C0, C1
  =>
%r = urem i8 C0, -C1

Name: neg pos
Pre: C0 <= 0 && C1 >= 0
%r = srem i8 C0, C1
  =>
%t0 = urem i8 -C0, C1
%r = sub i8 0, %t0

Name: neg neg
Pre: C0 <= 0 && C1 <= 0
%r = srem i8 C0, C1
  =>
%t0 = urem i8 -C0, -C1
%r = sub i8 0, %t0

https://rise4fun.com/Alive/Vd6

Now, this new logic does not result in any new catches
as of vanilla llvm test-suite + RawSpeed.
but it should be virtually compile-time free,
and it may be important to be consistent in their handling,
because if we had a pair of sdiv-srem, and only converted one of them,
-divrempairs will no longer see them as a pair,
and thus not "merge" them.
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/srem.ll
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
Commit b38d897e802664034c7e6e4654328256ed370a61 by lebedev.ri
[ConstantRange] binaryXor(): special-case binary complement case - the result is precise

Use the fact that `~X` is equivalent to `-1 - X`, which gives us
fully-precise answer, and we only need to special-handle the wrapped case.

This fires ~16k times for vanilla llvm test-suite + RawSpeed.
The file was modifiedllvm/lib/IR/ConstantRange.cpp
The file was modifiedllvm/include/llvm/IR/ConstantRange.h
The file was modifiedllvm/unittests/IR/ConstantRangeTest.cpp
Commit 2ed9c4c70bbb36fa12d48a73abc2d89c0af80060 by lebedev.ri
[ConstantRange] Introduce getActiveBits() method

Much like APInt::getActiveBits(), computes how many bits are needed
to be able to represent every value in this constant range,
treating the values as unsigned.
The file was modifiedllvm/lib/IR/ConstantRange.cpp
The file was modifiedllvm/unittests/IR/ConstantRangeTest.cpp
The file was modifiedllvm/include/llvm/IR/ConstantRange.h
Commit ba5afe5588ded61052c8727dbcb0407b5de4410c by lebedev.ri
[NFC][CVP] processUDivOrURem(): refactor to use ConstantRange::getActiveBits()

As an exhaustive test shows, this logic is fully identical to the old
implementation, with exception of the case where both of the operands
had empty ranges:

```
TEST_F(ConstantRangeTest, CVP_UDiv) {
  unsigned Bits = 4;
  EnumerateConstantRanges(Bits, [&](const ConstantRange &CR0) {
    if(CR0.isEmptySet())
      return;
    EnumerateConstantRanges(Bits, [&](const ConstantRange &CR1) {
      if(CR0.isEmptySet())
        return;

      unsigned MaxActiveBits = 0;
      for (const ConstantRange &CR : {CR0, CR1})
        MaxActiveBits = std::max(MaxActiveBits, CR.getActiveBits());

      ConstantRange OperandRange(Bits, /*isFullSet=*/false);
      for (const ConstantRange &CR : {CR0, CR1})
        OperandRange = OperandRange.unionWith(CR);
      unsigned NewWidth = OperandRange.getUnsignedMax().getActiveBits();

      EXPECT_EQ(MaxActiveBits, NewWidth) << CR0 << " " << CR1;
    });
  });
}
```
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
Commit b85395f309890bac5f2d3296ce08dc46c24ef77f by lebedev.ri
[NFC][APInt] Refactor getMinSignedBits() in terms of getNumSignBits()

This is fully identical to the old implementation, just easier to read.
The file was modifiedllvm/include/llvm/ADT/APInt.h
Commit 7465da2077c2b8def7440094e15ac1199226bc25 by lebedev.ri
[ConstantRange] Introduce getMinSignedBits() method

Similar to the ConstantRange::getActiveBits(), and to similarly-named
methods in APInt, returns the bitwidth needed to represent
the given signed constant range
The file was modifiedllvm/unittests/IR/ConstantRangeTest.cpp
The file was modifiedllvm/lib/IR/ConstantRange.cpp
The file was modifiedllvm/include/llvm/IR/ConstantRange.h
Commit 4977eadee56f81377049fb8763350a66cfd2d078 by lebedev.ri
[NFC][CVP] Give a better name STATISTIC() counting udiv i16 -> udiv i8 xforms
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
Commit cb10d5d714e9ae83cfd392dd127e13c51f4d299d by lebedev.ri
[NFC][CVP] Add tests for SDiv/SRem narrowing
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/sdiv.ll
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/srem.ll
Commit b289dc530632613edb3eb067895c1981cb77ccd0 by lebedev.ri
[CVP] Narrow SDiv/SRem to the smallest power-of-2 that's sufficient to contain its operands

This is practically identical to what we already do for UDiv/URem:
  https://rise4fun.com/Alive/04K

Name: narrow udiv
Pre: C0 u<= 255 && C1 u<= 255
%r = udiv i16 C0, C1
  =>
%t0 = trunc i16 C0 to i8
%t1 = trunc i16 C1 to i8
%t2 = udiv i8 %t0, %t1
%r = zext i8 %t2 to i16

Name: narrow exact udiv
Pre: C0 u<= 255 && C1 u<= 255
%r = udiv exact i16 C0, C1
  =>
%t0 = trunc i16 C0 to i8
%t1 = trunc i16 C1 to i8
%t2 = udiv exact i8 %t0, %t1
%r = zext i8 %t2 to i16

Name: narrow urem
Pre: C0 u<= 255 && C1 u<= 255
%r = urem i16 C0, C1
  =>
%t0 = trunc i16 C0 to i8
%t1 = trunc i16 C1 to i8
%t2 = urem i8 %t0, %t1
%r = zext i8 %t2 to i16

... only here we need to look for 'min signed bits', not 'active bits',
and there's an UB to be aware of:
  https://rise4fun.com/Alive/KG86
  https://rise4fun.com/Alive/LwR

Name: narrow sdiv
Pre: C0 <= 127 && C1 <= 127 && C0 >= -128 && C1 >= -128
%r = sdiv i16 C0, C1
  =>
%t0 = trunc i16 C0 to i9
%t1 = trunc i16 C1 to i9
%t2 = sdiv i9 %t0, %t1
%r = sext i9 %t2 to i16

Name: narrow exact sdiv
Pre: C0 <= 127 && C1 <= 127 && C0 >= -128 && C1 >= -128
%r = sdiv exact i16 C0, C1
  =>
%t0 = trunc i16 C0 to i9
%t1 = trunc i16 C1 to i9
%t2 = sdiv exact i9 %t0, %t1
%r = sext i9 %t2 to i16

Name: narrow srem
Pre: C0 <= 127 && C1 <= 127 && C0 >= -128 && C1 >= -128
%r = srem i16 C0, C1
  =>
%t0 = trunc i16 C0 to i9
%t1 = trunc i16 C1 to i9
%t2 = srem i9 %t0, %t1
%r = sext i9 %t2 to i16


Name: narrow sdiv
Pre: C0 <= 127 && C1 <= 127 && C0 >= -128 && C1 >= -128 && !(C0 == -128 && C1 == -1)
%r = sdiv i16 C0, C1
  =>
%t0 = trunc i16 C0 to i8
%t1 = trunc i16 C1 to i8
%t2 = sdiv i8 %t0, %t1
%r = sext i8 %t2 to i16

Name: narrow exact sdiv
Pre: C0 <= 127 && C1 <= 127 && C0 >= -128 && C1 >= -128 && !(C0 == -128 && C1 == -1)
%r = sdiv exact i16 C0, C1
  =>
%t0 = trunc i16 C0 to i8
%t1 = trunc i16 C1 to i8
%t2 = sdiv exact i8 %t0, %t1
%r = sext i8 %t2 to i16

Name: narrow srem
Pre: C0 <= 127 && C1 <= 127 && C0 >= -128 && C1 >= -128 && !(C0 == -128 && C1 == -1)
%r = srem i16 C0, C1
  =>
%t0 = trunc i16 C0 to i8
%t1 = trunc i16 C1 to i8
%t2 = srem i8 %t0, %t1
%r = sext i8 %t2 to i16


The ConstantRangeTest.losslessSignedTruncationSignext test sanity-checks
the logic, that we can losslessly truncate ConstantRange to
`getMinSignedBits()` and signext it back, and it will be identical
to the original CR.

On vanilla llvm test-suite + RawSpeed, this fires 1262 times,
while the same fold for UDiv/URem only fires 384 times. Sic!

Additionally, this causes +606.18% (+1079) extra cases of
aggressive-instcombine.NumDAGsReduced, and +473.14% (+1145)
of aggressive-instcombine.NumInstrsReduced folds.
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/sdiv.ll
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/srem.ll
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
Commit fb1de7ed921c3c1531c0cb28b9603af22ecd0529 by joker.eph
Implement a new kind of Pass: dynamic pass pipeline

Instead of performing a transformation, such pass yields a new pass pipeline
to run on the currently visited operation.
This feature can be used for example to implement a sub-pipeline that
would run only on an operation with specific attributes. Another example
would be to compute a cost model and dynamic schedule a pipeline based
on the result of this analysis.

Discussion: https://llvm.discourse.group/t/rfc-dynamic-pass-pipeline/1637

Recommit after fixing an ASAN issue: the callback lambda needs to be
allocated to a temporary to have its lifetime extended to the end of the
current block instead of just the current call expression.

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D86392
The file was modifiedmlir/include/mlir/Pass/Pass.h
The file was addedmlir/test/Pass/dynamic-pipeline-nested.mlir
The file was modifiedmlir/lib/Pass/Pass.cpp
The file was addedmlir/test/Pass/dynamic-pipeline-fail-on-parent.mlir
The file was addedmlir/test/Pass/dynamic-pipeline.mlir
The file was modifiedmlir/include/mlir/Pass/PassManager.h
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
The file was addedmlir/test/lib/Transforms/TestDynamicPipeline.cpp
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
Commit ef7d22a98683ce98b6a2c4d0818d2d9978d42861 by Raphael Isemann
Revert "[lldb] XFAIL TestMemoryHistory on Linux"

This reverts commit 7518006d75accd21325747430d6bced66b2c5ada.

This test apparently works on the Swift CI ubuntu bot, so it shouldn't be
XFAIL'd on Linux.
The file was modifiedlldb/test/API/functionalities/asan/TestMemoryHistory.py
Commit 2bc589bbb8d7d00f5939e9cd33cbe57e47d61f7e by llvm-project
[flang][msvc] Add explicit function template argument to applyFunction. NFC.

Msvc has difficulties deducing the template argument here. The error message is:
```
basic-parsers.h(790,12): error C2672: 'applyFunction': no matching overloaded function found
```
Explicitly pass the first template argument to help it.

This patch is part of the series to make flang compilable with MS Visual Studio <http://lists.llvm.org/pipermail/flang-dev/2020-July/000448.html>.

Reviewed By: DavidTruby

Differential Revision: https://reviews.llvm.org/D87961
The file was modifiedflang/lib/Parser/basic-parsers.h
Commit 97ca41e1ddfbb6812e2042dcbd2db6e0e7d0bc33 by llvm-project
[flang][msvc] Add explicit function template argument to applyLamda. NFC.

Like in D87961, msvc has difficulties deducing the template argument. The error message is:
```
expr-parsers.cpp(383): error C2672: 'applyLambda': no matching overloaded function found
```
Explicitly pass the first template argument to help it.

This patch is part of the series to make flang compilable with MS Visual Studio <http://lists.llvm.org/pipermail/flang-dev/2020-July/000448.html>.

Reviewed By: DavidTruby

Differential Revision: https://reviews.llvm.org/D88001
The file was modifiedflang/lib/Parser/expr-parsers.cpp
Commit 62afc3129dc28638d950c17117347b4e001a613d by llvm-project
[flang][msvc] Explicitly reference "this" inside closure. NFC.

The Microsoft compiler seems to have difficulties to decide between a const/non-const method of a captured object context in a closure. The error message is:
```
symbol.cpp(261): error C2668: 'Fortran::semantics::Symbol::detailsIf': ambiguous call to overloaded function
symbol.h(535): note: could be 'const D *Fortran::semantics::Symbol::detailsIf<Fortran::semantics::DerivedTypeDetails>(void) const'
symbol.h(534): note: or       'D *Fortran::semantics::Symbol::detailsIf<Fortran::semantics::DerivedTypeDetails>(void)'
symbol.cpp(261): note: while trying to match the argument list '()'
```
Explicitly using the this-pointer resolves this problem.

This patch is part of the series to make flang compilable with MS Visual Studio <http://lists.llvm.org/pipermail/flang-dev/2020-July/000448.html>.

Reviewed By: DavidTruby

Differential Revision: https://reviews.llvm.org/D88052
The file was modifiedflang/lib/Semantics/symbol.cpp
Commit b89059a31347dd09b55a96b99b3dbe38d7749908 by tmsriram
Revert "The wrong placement of add pass with optimizations led to -funique-internal-linkage-names being disabled."

This reverts commit 6950db36d33d85d18e3241ab6c87494c05ebe0fb.
The file was modifiedclang/test/CodeGen/unique-internal-linkage-names.cpp
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
Commit 21f5f509c8a066a9647a3f5b86f6931db40b7fc7 by Paul C. Anagnostopoulos
Two patches to fix the broken build.
One to fix a C++ compiler warning.
One to allow Sphinx to find a new document.
The file was modifiedllvm/lib/TableGen/TableGenBackendSkeleton.cpp
The file was modifiedllvm/docs/TableGen/index.rst
Commit f21212215031e5871c389999daf3b06b1a6250fd by i
[lldb][test] Remove accidental import pdb in 783dc7dc7ed7487d0782c2feb8854df949b98e69
The file was modifiedlldb/test/API/functionalities/postmortem/minidump-new/TestMiniDumpUUID.py
Commit c45596147938191b0ffde91ee8d506e315bf4c8f by daltenty
[compiler-rt][AIX] Add CMake support for 32-bit Power builds

This patch enables support for building compiler-rt builtins for 32-bit
Power arch on AIX. For now, we leave out the specialized ppc builtin
implementations for 128-bit long double and friends since those will
need some special handling for AIX.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D87383
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt
The file was modifiedcompiler-rt/cmake/Modules/CompilerRTUtils.cmake
The file was modifiedcompiler-rt/cmake/builtin-config-ix.cmake
The file was modifiedcompiler-rt/cmake/base-config-ix.cmake
Commit cf112382ddd0d717edf0b8a3e5b061de925258e9 by mtrofin
[ThinLTO] Option to bypass function importing.

This completes the circle, complementing -lto-embed-bitcode
(specifically, post-merge-pre-opt). Using -thinlto-assume-merged skips
function importing. The index file is still needed for the other data it
contains.

Differential Revision: https://reviews.llvm.org/D87949
The file was modifiedclang/test/CodeGen/thinlto_embed_bitcode.ll
The file was modifiedclang/include/clang/CodeGen/BackendUtil.h
The file was modifiedllvm/include/llvm/LTO/LTOBackend.h
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedclang/lib/CodeGen/CodeGenAction.cpp
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
Commit 4edb3d3646c46f15ca93bf19ed96a9169143ed6d by dancgr
[AArch64] Avoid pairing loads with same result reg

When pairing ldr instructions to an ldp instruction, we cannot pair two ldr
destination registers where one is a sub or super register of the other.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D86906
The file was addedllvm/test/CodeGen/AArch64/aarch64-ldst-subsuperReg-no-ldp.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
Commit 89c1e35f3c5060c23f9eed409f89c2c9908b87ed by sdi1600105
[LoopInfo] empty() -> isInnermost(), add isOutermost()

Differential Revision: https://reviews.llvm.org/D82895
The file was modifiedllvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopVersioning.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopDistribute.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was modifiedllvm/lib/Analysis/LoopCacheAnalysis.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Analysis/LoopInfo.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopInterchange.cpp
The file was modifiedllvm/lib/Analysis/LoopNestAnalysis.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopFuse.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LICM.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
The file was modifiedllvm/lib/CodeGen/HardwareLoops.cpp
The file was modifiedllvm/include/llvm/Analysis/LoopInfoImpl.h
The file was modifiedllvm/lib/Transforms/Utils/LoopPeel.cpp
The file was modifiedllvm/lib/Analysis/LoopPass.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modifiedllvm/include/llvm/Analysis/LoopInfo.h
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Commit 90242caca2074dab5a9b76e5bc36d9fafd2179a7 by rnk
Revert "[CodeGen] emit CG profile for COFF object file"

This reverts commit 91aed9bf975f1e4346cc8f4bdefc98436386ced2, it is
causing link errors.
The file was modifiedllvm/include/llvm/Target/TargetLoweringObjectFile.h
The file was modifiedllvm/lib/Target/TargetLoweringObjectFile.cpp
The file was removedllvm/test/MC/COFF/cgprofile.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Commit a7873e5abc65125087f2ce7ab3a720a113d8ffa5 by sdi1600105
Small fixes for "[LoopInfo] empty() -> isInnermost(), add isOutermost()"
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
Commit 49f2744931762323dfa5ef96e1baa12bb79d5b9a by i
Change LoopInfo::empty to isInnermost after D82895
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
Commit fdc41e11f9687a50c97e2a59663bf2d541ff5489 by Louis Dionne
[libc++] Implement LWG1203

Libc++ had an issue where nonsensical code like

  decltype(std::stringstream{} << std::vector<int>{});

would compile, as long as you kept the expression inside decltype in
an unevaluated operand. This turned out to be that we didn't implement
LWG1203, which clarifies what we should do in that case.

rdar://58769296
The file was modifiedlibcxx/www/cxx2a_status.html
The file was addedlibcxx/test/std/input.output/iostream.format/output.streams/ostream.rvalue/not_ostreamable.verify.cpp
The file was addedlibcxx/test/std/input.output/iostream.format/output.streams/ostream.rvalue/rvalue.pass.cpp
The file was removedlibcxx/test/std/input.output/iostream.format/output.streams/ostream.rvalue/CharT_pointer.pass.cpp
The file was modifiedlibcxx/include/istream
The file was modifiedlibcxx/include/ostream
The file was addedlibcxx/test/std/input.output/iostream.format/input.streams/istream.rvalue/not_istreamable.verify.cpp
The file was modifiedlibcxx/test/std/input.output/iostream.format/input.streams/istream.rvalue/rvalue.pass.cpp
Commit d4e3e1e548793c6686e19f8ba50bf62f3fde7545 by michael.hliao
Fix build due to renaming in LoopInfo.
The file was modifiedllvm/unittests/Transforms/Scalar/LoopPassManagerTest.cpp
Commit e1a3271ebb8756150fb78824b65fe0a752f6ec3d by listmail
[AArch64] Teach analyzeBranch to remove branch equivelent to fallthrough

The motivation here is that MachineBlockPlacement relies on analyzeBranch to remove branches to fallthrough blocks when the branch is not fully analyzeable. With the introduction of the FAULTING_OP psuedo for implicit null checking (see D87861), this case becomes important. Note that it's hard to otherwise exercise this path as BranchFolding handle's any fully analyzeable branch sequence without using this interface.

p.s. For anyone who saw my comment in the original review, what I thought was an issue in BranchFolding originally turned out to simply be a bug in my patch. (Now fixed.)

Differential Revision: https://reviews.llvm.org/D88035
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/implicit-null-check.ll
Commit 2404ed02025c210c707a856f69604ef20083dcbb by Louis Dionne
[libc++] NFC: Collocate C++20 removed members of std::allocator
The file was modifiedlibcxx/include/memory
Commit 7656dd33d9326df0b86f08676474dbf8055866b8 by Louis Dionne
[libc++] NFC: Reindent the feature test macro generation script

Each feature-test macro is now a clear block indentation-wise.
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
Commit d6ac649ccda289ecc2d2c0cb51892d57e8ec328c by a.bataev
[SLP]Fix coding style, NFC.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Summary

  1. Update recipe for flang-aarch64 slaves (details)
  2. clang-x86-ninja-win10 - replacing backslashes (details)
Commit 965bd9eb785ee6929a9dd71b741c6e81745357fb by caroline.concatto
Update recipe for flang-aarch64 slaves

- Update compiler location for flang-aarch64-ubuntu-{clang and gcc10}
- Add another email to the extra recipient for flang-aarch64
- Make flang-aarch64 slaves build new flang driver by default
- Add a missing coma to flang-aarch64-ubuntu-gcc10 recipe

Differential Revision: https://reviews.llvm.org/D87125
The file was modifiedbuildbot/osuosl/master/config/status.py
The file was modifiedbuildbot/osuosl/master/config/builders.py
Commit bc6f110d29f33b97e734d3d9a15ec7dbc63733e3 by kuhnel
clang-x86-ninja-win10 - replacing backslashes

in buildbot.tac with forward slashes to address re-configuration
cycles in cmake
The file was modifiedbuildbot/google/terraform/main.tf
The file was modifiedbuildbot/google/docker/buildbot-windows10-vs2019/VERSION
The file was modifiedbuildbot/google/docker/buildbot-windows10-vs2019/run.ps1