Started 1 yr 6 mo ago
Took 6 hr 50 min

Build #3827 (Mar 28, 2021 11:10:38 PM)

  1. [libc builder] Enable linting on full build builders. (details / githubweb)
  1. Revert "OpaquePtr: Turn inalloca into a type attribute" (details / githubweb)
  2. [InstCombine] add tests for select of min/max intrinsics; NFC (details / githubweb)
  3. [InstCombine] sink min/max intrinsics with common op after select (details / githubweb)
  4. Reapply "OpaquePtr: Turn inalloca into a type attribute" (details / githubweb)
  5. [RISCV] Add test case for mulhsu. (details / githubweb)
  6. [X86] Don't define vpclmulqdq or vaes intrinsics in the headers unless avx512fintrin.h has been included. (details / githubweb)
  7. [Driver] Suppress libstdc++/libc++ path with -nostdinc (details / githubweb)
  8. [ARM] MVE vector lane interleaving (details / githubweb)
  9. [gn build] Port 7b6f760fcd19 (details / githubweb)
  10. [X86][update_llc_test_checks] Use a less greedy regular expression for replacing constant pool labels in tests. (details / githubweb)
  11. [X86] Optimize vXi8 MULHS on targets where we can't sign_extend to the next register size. (details / githubweb)
  12. [X86] Add phase ordering test for the problem D99427 is trying to solve. NFC (details / githubweb)
  13. [BasicAA] Make sure types match in constant offset heuristic (details / githubweb)
  14. [Driver] Linux.cpp: move resource directory before /usr/local/include for non-musl (details / githubweb)
  15. [ARM] Fix the Changed value in the MVE lane interleaving pass. (details / githubweb)

Started by upstream project clang-stage2-Rthinlto_relay build number 5666
originally caused by:

This run spent:

  • 6 hr 48 min waiting;
  • 6 hr 50 min build duration;
  • 13 hr total from scheduled to completion.
Revision: cab3f5ac84b679161e9b70f17c948b6fac9fd0e3
  • refs/remotes/origin/main
Revision: 6c88ffeda31a78d3682c218564fc80d213d09181
  • detached
Test Result (no failures)