Changes

Summary

  1. [TTI] NFC: Change getGatherScatterOpCost to return InstructionCost (details)
  2. [TTI] NFC: Change getArithmeticReductionCost to return InstructionCost (details)
  3. [TTI] NFC: Change getMinMaxReductionCost to return InstructionCost (details)
  4. [TTI] NFC: Change getCmpSelInstrCost to return InstructionCost (details)
  5. [TTI] NFC: Change getMaskedMemoryOpCost to return InstructionCost (details)
  6. [TTI] NFC: Change get[Interleaved]MemoryOpCost to return InstructionCost (details)
  7. [lldb] Remote @debugserver_test from TestAppleSimulatorOSType (details)
  8. StackProtector: ensure protection does not interfere with tail call frame. (details)
  9. [lldb] Remove self-skipping code from lldb-server tests (details)
  10. [mlir][linalg] update tiling to support linalg index operations. (details)
  11. [lldb][AArch64] Only run MTE memory region test if we have MTE (details)
  12. [lld-macho] Add support for arm64_32 (details)
  13. [lld-macho] Add 32-bit compact unwind support (details)
  14. [lld-macho] Have toString() emit full path to archive files (details)
  15. [lld-macho] Make load relaxation work for arm64_32 (details)
  16. [analyzer] Replace StoreManager::CastRetrievedVal with SValBuilder::evalCast (details)
  17. [lldb/test] s/add_no_ack_remote_stream/do_handshake (details)
  18. [AsmParser][SystemZ][z/OS] Add in support to allow use of additional comment strings. (details)
  19. [libc++] [P0458] Add map::contains and set::contains for heterogenous lookup missed in a17b1aed. (details)
  20. [docs][scudo] Update Scudo documentation (details)
  21. [mlir] X86Vector: Add AVX Rsqrt (details)
  22. [clangd] Enable modules to contribute tweaks. (details)
  23. [clangd] Introduce ASTHooks to FeatureModules (details)
  24. [clangd] Propagate data in diagnostics (details)
  25. BPF: generate proper BTF for globals with WeakODRLinkage (details)
  26. [lld-macho] arm64_32 executables are always PIE (details)
  27. [analyzer] [NFC] Eliminate dispatchCast, evalCastFromNonLoc and evalCastFromLoc functions from SValBuilder (details)
  28. [OpenMP] Fix incompatible attributes in OpenMPIRBuilder test. (details)
  29. Fix the const overload of IgnoreExprNodes (details)
  30. [gn build] Port 8914902b01a3 (details)
  31. [gn build] Port bb6d96ced80f (details)
  32. [GlobalOpt] Revert valgrind hacks (details)
  33. [SystemZ][z/OS] Introduce dialect querying helper functions (details)
  34. Remove empty test case (details)
  35. [libc] Make FPBits a union. (details)
  36. Implement WG21 P2156R1/WG14 N2557 on duplicate attributes (details)
  37. [X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits in CMP(MOVMSK(PACKSS())) -> CMP(MOVMSK()) fold (details)
  38. Revert "[lld-macho] Add support for arm64_32" and other stacked diffs (details)
  39. [mlgo] Skip AOT-compiling a model if a header/object pair is provided (details)
  40. [debugserver] Fix unintialized member variable (details)
  41. [lldb] [gdb-remote server] Abstract away getting current process (details)
  42. [Clang][OpenMP][NVPTX] Fixed failure in openmp-offload-gpu.c if the system has CUDA (details)
  43. Remove a -O2 usage from a CSE specific test file (details)
  44. [debugserver] Use class member initialization for RNBContext (details)
  45. [libFuzzer] Fix MSan false positives with custom mutators. (details)
  46. [flang] Handle instantiation of procedure pointer components (details)
  47. [MemorySSA] Add test for PR49859. (details)
  48. [flang][OpenMP] Modify semantic check for nesting of `ordered` regions to include `close` nesting check. (details)
  49. [AArch64][GlobalISel] Mark G_CTPOP as legal for v16s8 and v8s8 (details)
  50. [RISCV] Rename RISCVISD::GREVI(W)/GORCI(W) to RISCVISD::GREV(W)/GORC(W). Don't require second operand to be a constant. (details)
  51. String Literal and Wide String Literal Encoding from the Preprocessor (details)
  52. [SCEV] Don't walk uses of phis without SCEV expression when forgetting (details)
  53. [lli] Honor the --entry-function flag in orc and orc-lazy modes. (details)
  54. [libFuzzer] Fix fuzzer-oom.test. (details)
  55. BPF: remove default .extern data section (details)
  56. [libc][Obvious] Fix nextafter* implementation. (details)
  57. [clang-tidy] Add check for implicit widening of multiplication result (details)
  58. [mlir] Convert async dialect passes from function passes to op agnostic passes (details)
  59. [lld-macho] rm old test directory for segments.s (details)
  60. [gn build] Port 46b8ea2fff90 (details)
  61. [gn build] Port 8ca366935b05 (details)
  62. Ship `llvm-cxxfilt` in the toolchain. (details)
  63. [RISCV] Make use of PatGprGpr and PatGpr in RISCVInstrInfoB.td. NFC (details)
  64. [RISCV] Add a generic PatGprImm class and use it to simplify patterns in RISCVInstrInfoB.td. NFC (details)
  65. Correct the tablegen for checking mutually exclusive stmt attrs (details)
  66. [AsmParser][SystemZ][z/OS] Add support to AsmLexer to accept HLASM style integers (details)
  67. [mlir][spirv] Only attach struct offset for required storage classes (details)
  68. Remove warning "suggest braces" for aggregate initialization of an empty class with an aggregate base class. (details)
  69. [AArch64][SVE] Always use overloaded methods instead of preprocessor macro. (details)
  70. [mlir][tosa] Add conv2d lowering to linalg.conv2d operator for FP (details)
  71. [Driver] Make the findVCToolChainViaEnvironment case-insensitive (details)
  72. [TableGen] Resolve concrete but not complete field access initializers (details)
  73. [mlir] Prevent operations with users from being hoisted (details)
  74. Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115 (details)
  75. Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115 (details)
  76. Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115 (details)
  77. [flang] More precise enforcement of runtime constraint (details)
  78. [Sema] Move 'char-expression-as-unsigned < 0' into a separate diagnostic (details)
  79. Fix resolution-err.ll (details)
  80. [CSSPGO] Fix a test issue due to portablity of std::hash (details)
  81. [MLIR] PresburgerSet subtraction: add documentation and assertion saying we don't support divisions yet (details)
  82. [mlir] Fix return values of AMX tests (details)
  83. Revert "[GlobalOpt] Revert valgrind hacks" (details)
  84. [PowerPC] Use correct node to get a super register from a subreg (details)
  85. [libc++][docs] Add status docs for ranges. (details)
  86. [scudo] Make MTE inline asm compatible with GNU assembler (details)
  87. [RISCV] Implement COPY for Zvlsseg registers (details)
  88. [lldb] Pretend host architecture is arm64 on AS (details)
  89. fix whitespace type (details)
  90. Expose parseXInDimensionList() to the `DialectAsmParser` (details)
  91. [X86][AMX] Refactor for PostRA ldtilecfg pass. (details)
  92. [lldb] Build debugserver 2-way fat on AS (details)
  93. [lldb] Disable TestClangModulesUpdate.py because it's flaky (details)
  94. [Live Intervals] Factor-out unionBitMask. NFC. (details)
  95. [M68k] Put M68kInfo as the direct library dependency for AsmParser (details)
  96. [mlir][StandardToSPIRV] Add support for lowering math.powf to SPIR-V. (details)
  97. [Live Intervals] Teach Greedy RA to recognize special case live-through (details)
  98. [clangd] Add support for inline parameter hints (details)
  99. [gn build] Port cbc9c4ea90e1 (details)
  100. Revert "Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115" (details)
  101. [LLD] Implement /guard:[no]ehcont (details)
  102. [NFC] Fix unused warning. (details)
  103. [clang] Fix copy constructor of CompilerInvocation (details)
  104. [clang-tidy] Add new check 'bugprone-unhandled-exception-at-new'. (details)
  105. [GreedyRA ORE] Separate Folder Reloads and Zero Cost Folder Reloads (details)
  106. [gn build] Port 530456caf908 (details)
  107. [mlir] Change verification order to prevent null dereference (details)
  108. [NFC] Fix unused variable warning. (details)
  109. [clang-tidy] Add exception flag to bugprone-unhandled-exception-at-new test. (details)
  110. [i386] Modify the alignment of __m128/__m256/__m512 vector type according i386 abi. (details)
  111. [lldb] Silence GCC warnings about control reaching the end of non-void functions. NFC. (details)
  112. [AArch64] [COFF] Properly produce cross-section relative relocations (details)
  113. [ARM] [COFF] Properly produce cross-section relative relocations (details)
  114. [lit] Always quote arguments containing '[' on windows (details)
  115. [PowerPC] Fix incorrect subreg typo from 0148bf53f0a0 (details)
  116. [X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits in MOVMSK(SHUFFLE(X,u)) -> MOVMSK(X) fold (details)
  117. [X86] Regenerate PR32284.ll test case prefixes. NFC. (details)
  118. [X86] Fold cmpeq/ne(trunc(x),0) --> cmpeq/ne(x,0) (details)
  119. [InstCombine] tmp alloca bypass: ensure that the replacement dominates all alloca uses (details)
  120. [Passes] Enable the relative lookup table converter pass on aarch64 (details)
  121. SDAG: constant fold bf16 -> i16 casts (details)
  122. [lldb][AArch64] Simplify MTE memory region test (details)
  123. [clang] [AArch64] Fix Windows va_arg handling for larger structs (details)
  124. [ValueTracking] add unit test for isKnownNonZero(); NFC (details)
  125. [lit] Remove unnecessary testcases from lit-quoting.txt that fail on macOS (details)
  126. [AIX] Allow safe for 32bit P8 VSX pattern matching (details)
  127. [Test] Account for possibility to free memory in loop load PRE test (details)
  128. [ValueTracking] reduce code duplication; NFC (details)
  129. [AMDGPU] Mark scavenged SGPR as used (details)
  130. [OpenMP] Fix printing routine for OMP_TOOL_VERBOSE_INIT (details)
  131. [OpenCL][Docs] Update OpenCL 3.0 implementation status (details)
  132. [ValueTracking] match negative-stepping non-zero recurrence (details)
  133. [InstSimplify] improve efficiency for detecting non-zero value (details)
  134. CPUDispatch- allow out of line member definitions (details)
  135. [llvm-symbolizer] remove unused variable (details)
  136. [SCCP] Create SCCP Solver (details)
  137. [gn build] Port bbab9f986c6d (details)
  138. [mlir][StandardToSPIRV] Add support for lowering memref<?xi1> to SPIR-V (details)
  139. [AArch64][v8.5A] Add BTI to all function starts (details)
  140. [SLP] createOp - fix null dereference warning. NFCI. (details)
  141. [X86][SSE] canonicalizeShuffleWithBinOps - check for more combos of merge-able binary shuffles. (details)
  142. [AMDGPU] Rename "LDS lowering" pass name. (details)
  143. [Instcombine] Disable memcpy of alloca bypass for instruction sources (details)
  144. [X86] Add PR49028 test case (details)
  145. Add flag for showing skipped headers in -H / --show-includes output (details)
  146. clang-format: [JS] merge import lines. (details)
  147. review comments (details)
  148. [mlir][linalg] update fusion to support linalg index operations. (details)
  149. [arm][compiler-rt] add armv8m.main and arv8.1m.main targets (details)
  150. [SCCP] Follow up of rGbbab9f986c6d. NFC. (details)
  151. [libc++] Make chars_format a bitmask type. (details)
  152. [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops (details)
  153. [TTI] NFC: Change getCallInstrCost to return InstructionCost (details)
  154. [TTI] NFC: Change getCFInstrCost to return InstructionCost (details)
  155. [TTI] NFC: Change getShuffleCost to return InstructionCost (details)
  156. [TTI] NFC: Change getVectorInstrCost to return InstructionCost (details)
  157. [TTI] NFC: Change getFPOpCost to return InstructionCost (details)
  158. [TTI] NFC: Change getArithmeticInstrCost to return InstructionCost (details)
  159. [flang] Handle END= situations better in runtime input (details)
  160. [AMDGPU] Factor out SelectSAddrFI() (details)
  161. [ValueTracking] Add additional non-zero add recurrence test (NFC) (details)
  162. [ValueTracking] Don't require non-zero step for add nuw (details)
  163. Remove deprecated member functions (NFC) (details)
  164. [SLP]Added a tests for shuffled matched tree entries, NFC. (details)
  165. Refactor the architecture of mlir-reduce (details)
  166. [flang] Fix Boolean flag arguments (details)
  167. [NFC][libc++] Fixes a documentation typo. (details)
  168. [ValueTracking] Don't require strictly positive for mul nsw recurrence (details)
  169. [COFF] Simplify ICF associated comdat handling (details)
  170. clang-format: fix undefined behavior. (details)
  171. [WebAssembly] Codegen for f64x2.convert_low_i32x4_{s,u} (details)
  172. [libTooling] Add smart pointer support to the `access` Stencil (details)
  173. [libc++] Split up __memory/base.h into meaningful headers (details)
  174. [libc++] Move __memory/utilities.h to __memory/allocation_guard.h (details)
  175. [libc++] Move guards against std::auto_ptr outside of auto_ptr.h (details)
  176. [clang][FileManager] Support empty file name in getVirtualFileRef for serialized diagnostics (details)
  177. [flang] Correct the interpretation of BIND(C,NAME='') (details)
  178. [SROA][TBAA] Handle shift of regular TBAA nodes (details)
  179. [gn build] try to make sync_source_lists_from_cmake.py py3-compatible (details)
  180. [gn build] Port e98060fa72cc (details)
  181. [gn build] Port f992cfba7173 (details)
  182. fix typo to cycle bots (details)
  183. [InstCombine] Conditionally emit nowrap flags when combining two adds (details)
  184. fix typo to cycle bots (details)
  185. [lldb] Move QThreadSuffixSupported and QListThreadsInStopReply into llgs (details)
  186. [lldb/test] Remove the "expect_captures" feature of lldb-server tests (details)
  187. [lldb] Only override target arch if it is compatible (details)
  188. Update OpBase.td AttrDef class to define default value for returnType and convertFromStorage (NFC) (details)
  189. Revert "Refactor the architecture of mlir-reduce" (details)
  190. Simplify BitVector code (details)
  191. [mlir] Use default lli JIT in Integration tests (details)
  192. [lldb-vscode] Reduce chattiness of progress events (details)
  193. [AST] Replace asserts with a condition (details)
  194. Make test runnable on read-only file systems. (details)
  195. [AST] Add introspection support for more base nodes (details)
  196. Refactor the architecture of mlir-reduce (details)
  197. [WebAssembly] Codegen for i64x2.extend_{low,high}_i32x4_{s,u} (details)
  198. [lldb] Add addressing_bits to KNOWN_HOST_INFO_KEYS and sort the list (details)
  199. Use PassPipelineCLParser in mlir-reduce (details)
  200. [mlir] Fix passArg of ViewOpGraphPass (details)
  201. [InferAttributes] Materialize all infered attributes for declaration (details)
  202. [NFC] Move a recently added utility into a location to enable reuse (details)
  203. [flang] Fix typo caught by clang build (details)
  204. Fix buildbots after 61a85da (details)
  205. NFC: Remove condition to simplify code (details)
  206. Revert "[InferAttributes] Materialize all infered attributes for declaration" (details)
  207. Revert "Fix buildbots after 61a85da" (details)
  208. [libcxx][nfc] Assign [ranges.primitives] in "RangesStatus." (details)
  209. [AST] Use IntrusiveRefCntPtr for Introspection LocationCall. (details)
  210. [AST][NFC] Remove temporary ASTTU file from Introspection generation. (details)
  211. [AST][Introspection] Fix args not being set. (details)
  212. [LLLDB] Adding additional check LibCppStdFunctionCallableInfo based on crash reports (details)
  213. Reapply "[InferAttributes] Materialize all infered attributes for declaration"" and follow on patches. (details)
  214. [Sema] Fold VLA types in compound literals to constant arrays. (details)
  215. [llvm-objdump] Switch command-line parsing from llvm::cl to OptTable (details)
  216. [hwasan] Fix lock contention on thread creation. (details)
  217. [llvm-objdump] try to fix hexagon and riscv tests after 1035123ac50db (details)
  218. [llvm-objdump] try to fix hexagon tests more after 51aa61e74bdb (details)
  219. [llvm-objdump] try to fix section-filter.test in full builds after 51aa61e74bdb (details)
  220. Revert "Simplify BitVector code" (details)
  221. [DWARF] Fix crash for DWARFDie::dump. (details)
  222. [lldb] Simplify output for skipped categories in dotest.py (details)
  223. [gn build] Port b7459a10dad1 (details)
  224. fix comment typos to cycle bots (details)
  225. [libcxx][NFC] adjusts formatting rules (details)
  226. Change add_mlir_doc CMake macro to take the tablegen command as last argument to allow extra flags (details)
  227. [AMDGPU] Disable forceful inline of non-kernel functions which use LDS. (details)
  228. Fix Interface doc generation after recent change to add_mlir_doc() API (details)
  229. [Test] Propagate nofree attribute from function to calls (details)
  230. Fix the build of `mlir-doc` (again) (details)
  231. [scudo] Restore zxtest compatibility (details)
  232. [RISCV][Clang] Add vmv and vfmv series intrinsic functions. (details)
  233. [RISCV] Add a PatFrag to shorten repeated (XLenVT (VLOp GPR:$vl)) in V extension patterns. (details)
  234. [NewGVN] Add phi-of-ops operands if no real PHI is created. (details)
  235. Revert "[SCEV] Don't walk uses of phis without SCEV expression when forgetting" (details)
  236. Reland "[lit] Handle plain negations directly in the internal shell" (details)
  237. [clang] [test] Share patterns in CodeGen/ms_abi_aarch64.c between cases. NFC. (details)
  238. [AArch64] Fix windows vararg functions with floats in the fixed args (details)
  239. Add convenient composed tsan constants (details)
  240. Mark armv6m compat with armv7em; match armv7em being compat with armv6m (details)
  241. [clang][deps] NFC: Improve documentation (details)
  242. [NFC][LoopVectorize] Remove unnecessary VF.isScalable asserts (details)
  243. [flang] Update the regression tests to use the new driver when enabled (details)
  244. NFC put the armv6m entry with the other Cortex-M entries (details)
  245. [AArch64] Use type-legalization cost for code size memop cost. (details)
  246. [AA] Updates for D95543. (details)
  247. [RISCV] Pre-commit vector shuffle test cases (details)
  248. [SVE][LoopVectorize] Fix crash in InnerLoopVectorizer::widenPHIInstruction (details)
  249. [DAGCombiner] Fold step_vector with add/mul/shl (details)
  250. add test case for ignoring -flto=auto and -flto=jobserver (details)
  251. [lldb] Fix incorrect test data in FileSpecTest.IsRelative (details)
  252. [VPlan] Add VPRecipeBase::mayHaveSideEffects. (details)
  253. Fix bug in .eh_frame/.debug_frame PC offset calculation for DW_EH_PE_pcrel (details)
  254. [clangd] Only allow remote index to be enabled from user config. (details)
  255. [AArch64][NEON] Match (or (and -a b) (and (a+1) b)) => bit select (details)
  256. [X86] combineCMP - fold cmpEQ/NE(TRUNC(X),0) -> cmpEQ/NE(X,0) (details)
  257. [AMDGPU] Fix large return values with amdgpu_gfx (details)
  258. [TableGen] [docs] Correct a reference in the TableGen Overview document (details)
  259. [yaml2obj/obj2yaml/llvm-readobj] Support printing and parsing AVR-specific e_flags (details)
  260. [NFC] Remove the -instcombine flag from strict-fadd.ll (details)
  261. Fix potential infinite loop with malformed attribute syntax (details)
  262. [InstCombine] update RUN lines in assume test; NFC (details)
  263. [Clang][Docs] Claim the atomic compare (details)
  264. [DebugInfo] Replace debug uses in replaceUsesOutsideBlock (details)
  265. [libcxx][NFC] removes BreakBeforeConceptDeclarations from .clang-format (details)
  266. Revert "[DebugInfo] Replace debug uses in replaceUsesOutsideBlock" (details)
  267. [LSR] Fix for pre-indexed generated constant offset (details)
  268. [libc] Add index operator[] to StringView (details)
  269. [flang] Add list input test to GTest suite (details)
  270. [PowerPC] Add ROP Protection Instructions for PowerPC (details)
  271. [Driver] Enable kernel address and memory sanitizers on FreeBSD (details)
  272. [asan] Add an offset for the kernel address sanitizer on FreeBSD (details)
  273. [NewPM] Cleanup IR printing instrumentation (details)
  274. [LoopUnrollAndJam] Avoid repeated instructions for UAJ analysis (details)
  275. [libc++] Remove test suite workarounds on Apple with old Clangs (details)
  276. [libc++] NFC: Use ASSERT_SAME_TYPE consistently in string.h and wchar.h tests (details)
  277. [clang][patch] Modify diagnostic level from err to warn: anyx86_interrupt_regsave (details)
  278. [mlir][sparse] remove restriction on vectorization of index type (details)
  279. [OpenMP] Added codegen for masked directive (details)
  280. [RISCV] Share RVInstIShift and RVInstIShiftW instruction format classes with the B extension. (details)
  281. [flang][OpenMP] Remove `OmpEndLoopDirective` handles from code. (details)
  282. [Hexagon] Avoid infinite loops in type legalization when lowering SETCC (details)
  283. [mlir] Add support for adding attribute+type traits/interfaces to tablegen defs (details)
  284. [mlir] Add helpers to set lbs, ubs, steps for linalg.tiled_loop. (details)
  285. [AMDGPU] Move LDS lowering related utility functions to a separate utils file. (details)
  286. [mlir] Expose `updateBoundsForCyclicDistribution` in Linalg/Utils.h. (details)
  287. [mlir] Add verification for `linalg.tiled_loop` op. (details)
  288. [gn build] Port 82787eb2285d (details)
  289. [clang-format] Option for empty lines after an access modifier. (details)
  290. [AMDGPU] Add new EmitDstSel field to VOPPofile. NFC. (details)
  291. [VPlan] Replace a few unnecessary includes with forward decls. (details)
  292. [clang] [AArch64] Fix handling of HFAs passed to Windows variadic functions (details)
  293. [mlir][AsmPrinter] Fix multi-threaded segfault by using explicit null stream per thread (details)
  294. [libcxx][NFC] removes IndentRequires from .clang-format (details)
  295. [AMDGPU] Factor out predicate FmaakFmamkF32Insts (details)
  296. [TableGen] Reduce the number of map lookups in TypeSetByHwMode::getOrCreate. NFCI (details)
  297. [scudo][standalone] Fuchsia related fixes (details)
  298. [AST] Add a print method to Introspection LocationCall (details)
  299. [AST][Introspection] Add a check to detect if introspection is supported. (details)
  300. [LLDB] Use path relative to binary for finding .dwo files. (details)
  301. [mlir][scf] NFC - Add a getIterOpOperands helper to scf::ForOp (details)
  302. [clang][AArch64] Correctly align HFA arguments when passed on the stack (details)
  303. [InferAttrs] Do not mark first argument of str(n)cat as writeonly. (details)
  304. [mlir][vector][avx] add AVX dot product to X86Vector dialect with lowering (details)
  305. [AST] Fix location call storage with common last-invocation (details)
  306. [OpenMP5][DOCS] Update status of masked construct and correct the color (details)
  307. NFC: Add missing matcher for test method (details)
  308. [lldb] Raise a CrashLogParseException when failing to parse JSON crashlog (details)
  309. [sanitizer] Simplify GetTls with dl_iterate_phdr on Linux and use it on musl/FreeBSD (details)
  310. [OpenMP] Add info for device table changes (details)
  311. NFC: Add a simple test for introspection call formatting (details)
  312. s/setGenerator/addGenerator/ in the JIT docs. NFC (details)
  313. [mlir][NFC] Add a using directive for llvm::SetVector (details)
  314. [mlir] Add support for walking locations similarly to Operations (details)
  315. [dfsan] Add test for origin tracking stack traces (details)
  316. Add support for numpy arrays to memref conversions. (details)
  317. [NFC][NewPM] Remove some AnalysisManager invalidate methods (details)
  318. [libcxx] adds `std::indirectly_readable_traits` to <iterator> (details)
  319. Implemented [[clang::musttail]] attribute for guaranteed tail calls. (details)
  320. Revert "[LLDB] Use path relative to binary for finding .dwo files." (details)
  321. [dfsan] Remove hard-coded constant in release_shadow_space.c (details)
  322. [LangRef] clarify the semantics of nocapture (details)
  323. [LangRef] fix unexepcted unindent errror (details)
  324. Add triple to fix test failure. (details)
  325. [lld-macho] LTO: Unset VisibleToRegularObj where possible (details)
  326. [lld-macho] Re-root absolute input file paths if -syslibroot is specified (details)
  327. [lld-macho] Add support for arm64_32 (details)
  328. [lld-macho] Add 32-bit compact unwind support (details)
  329. [lld-macho] Make load relaxation work for arm64_32 (details)
  330. [lld-macho] Don't use arrays as template parameters (details)
  331. [gn build] Port 3bc88eb3924f (details)
  332. [Polly] Fix PM invalidate usage after D100519 (details)
  333. [LangRef] formatting (details)
  334. [LICM][NFC] Fix typo (details)
  335. [MLGO] Fix use of AM.invalidate post D100519 (details)
  336. [AMDGPU] Refactor ds_read/ds_write related select code for better readability. (details)
  337. [libcxx] adds `cpp17-.*iterator` concepts for iterator_traits (details)
  338. Don't refer to allocation map entry after deallocating it (details)
  339. Fix tile-and-pad when padding doesn't span all dimension (details)
  340. [RISCV] Don't emit save-restore call if function is a interrupt handler (details)
  341. [AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed (details)
  342. [Polly][Ast] Partial refactoring of IslAst and IslAstInfo to use isl++. NFC. (details)
  343. [libcxx] Make the GDB pretty printer test less strict (details)
  344. [Aarch64] handle "o" inline asm memory constraints (details)
  345. [libc] Add slice/take/drop methods to ArrayRef (details)
  346. [libc] Fix typo (details)
  347. [mlir][linalg] Add support for WAW fusion on tensors. (details)
  348. [clang-format] Inconsistent behavior regarding line break before access modifier (details)
  349. [LLD][ELF][AVR] Propagate ELF flags to the linked image (details)
  350. [mlir][Python][Linalg] Add support for captures in body builder. (details)
  351. [docs] Add vector predication call (details)
  352. [lld] Fix test crashing when AVR target is missing (details)
  353. Revert "[AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed" (details)
  354. [CostModel][X86] Add fully aligned load/store tests (details)
  355. [RISCV] Rerun stack test through update_llc_test_checks.py (details)
  356. [ARM] Combine sub 0, csinc X, Y, CC -> csinv -X, Y, CC (details)
  357. [NFC][AArch64][SVE] Move select-sve.ll tests to sve-select.ll (details)
  358. [SimplifyCFG] Regenerate CHECK lines and add test for PR49982. (details)
  359. [llvm-objcopy] clang-format a line (details)
  360. [MLIR][Shape] Expose `getShapeVec` and add support for extent tensors (details)
  361. Restore lit feature object-emission. Omit DebugInfo/Generic on XCore. (details)
  362. [SystemZ][z/OS][Windows] Add new functions that set Text/Binary mode for Stdin and Stdout based on OpenFlags (details)
  363. [X86][CostModel] Fix cost model for non-power-of-two vector load/stores (details)
  364. [ValueTracking] don't recursively compute known bits using multiple llvm.assumes (details)
  365. [OpenMP] Add omp_target_is_accessible() to header files (details)
  366. [MLIR] Fix `isValidIndex` (details)
  367. [docs] Add Pointer Authentication call info (details)
  368. [OPENMP]Fix PR49115: Incorrect results for scan directive. (details)
  369. [PhaseOrdering] add test to track PR49785; NFC (details)
  370. [mlir][python] Add simple debugging and printing helpers (details)
  371. [libc++] Fix LWG 2874: Constructor shared_ptr::shared_ptr(Y*) should be constrained. (details)
  372. [mlir][ArmSVE] Cleanup dialect registration (details)
  373. [TableGen] Allow mnemonics aliases with uppercase (details)
  374. [SystemZ][z/OS] Add IsText Argument to GetFile and GetFileOrSTDIN (details)
  375. [PhaseOrdering] add test for loop-invariant fdiv; NFC (details)
  376. [Driver] Allow both lib64 and lib in rocm-detect test. (details)
  377. [OpenMP IRBuilder, MLIR] Add support for OpenMP do schedule dynamic (details)
  378. [mlir][vector] Move transferOp on tensor opt to folder/canonicalization (details)
  379. [ARM] Prevent phi-node-elimination from generating copy above t2WhileLoopStartLR (details)
  380. [Support] Don't include <algorithm> in MathExtras.h (details)
  381. [Support] Don't include <algorithm> in Hashing.h (details)
  382. Revert "[Support] Don't include <algorithm> in Hashing.h" (details)
  383. [ADT] Don't include <algorithm> in iterator.h (details)
  384. [sanitizer] Mark g_use_dlpi_tls_data as unused (details)
  385. [RISCV][Clang] Drop the assembly tests for RVV intrinsics. (details)
  386. Ignore assume like calls by default in hasAddressTaken() (details)
  387. [RISCV][Clang] Add RVV miscellaneous intrinsic functions. (details)
  388. Verify the LLVMContext that an Attribute belongs to. (details)
  389. [mlir][scf] Add scf.for + tensor.cast canonicalization pattern (details)
  390. [fuzzer] Print reloaded file paths (details)
  391. [AMDGPU] Refactor VOP3P Profile and AsmParser, NFC (details)
  392. Revert "[Support] Don't include <algorithm> in MathExtras.h" (details)
  393. [DAG] SelectionDAG::isSplatValue - early out if binop is not splat. NFCI. (details)
  394. [TableGen] CodeGenDAGPatterns - (style) remove if-else chain when if block always returns. NFCI. (details)
  395. [libc][NFC] Add template tests for a bunch of math functions. (details)
  396. [AMDGPU] Remove dead dcode (NFC). (details)
  397. [TableGen] CodeGenMapTable - use for-range loop. NFCI. (details)
  398. [TableGen] CodeGenDAGPatterns - use const references on for-range loops to avoid unnecessary copies. NFCI. (details)
  399. Reland "[Support] Don't include <algorithm> in MathExtras.h" (details)
  400. [M68k] Fix empty builtin va_list kind (details)
  401. [LLDB] Re-land: Use path relative to binary for finding .dwo files. (details)
  402. Sanitizer built against glibc 2.34 doesn't work (details)
  403. Address D100645 comment (details)
  404. [CUDA, FDO] Filter out profiling options from GPU-side compilations. (details)
  405. [Builtins] Add memory allocation builtins (PR12543) (details)
  406. [nofree] Restrict semantics to memory visible to caller (details)
  407. [tblgen] Fold loop into assert to avoid unused variable warnings. NFCI. (details)
  408. DeclContext: Fix iterator category (details)
  409. [WebAssembly] Remove saturating fp-to-int target intrinsics (details)
  410. [ELF] Default to -z start-stop-gc with a glibc "__libc_" special case (details)
  411. [lldb] Add code and data address mask to Process (details)
  412. [AMDGPU] Enforce that gfx802/803/805 do not support XNACK (details)
  413. [TableGen] Predicate::operator== needs to compare the HwMode feature name in addition to the HwMode flag. (details)
  414. [AMDGPU] NFC, Comment in disassembler for dpp8 (details)
  415. [AMDGPU] Remove redundant field from DPP8 def (details)
  416. [TableGen] Fix -Wparentheses (details)
  417. [lld-macho] Initial groundwork for -bitcode_bundle (details)
  418. Simplify BitVector code (details)
  419. [lldb] Implement ABI::Fix{Code,Data}Address for AArch64 (details)
  420. [lldb] Set addressable bits from qHostInfo (details)
  421. [lld-macho] Add separator to error message (details)
  422. [sanitizer] GetTls: work around ppc64 with glibc<2.25(?) or GNU ld 2.30 (details)
  423. [lld] Canonicalize HAVE_LIBXAR (details)
  424. [libc] Extends the testing framework to support typed test (details)
  425. [funcattrs] Add the maximal set of implied attributes to definitions (details)
  426. [OpenMP] Allow affinity to re-detect for child processes (details)
  427. [libc] Add endianness support (details)
  428. [OpenMP] Implement GOMP task reductions (details)
  429. [libc] Fix wrongly deduced type (details)
  430. [gn build] (manually) port ca6751043d88 (details)
  431. [TableGen] Run GenerateVariants before ExpandHwModeBasedTypes. (details)
  432. [gn build] (manually) port ca6751043d88 better (details)
  433. [inferattrs] Don't infer lib func attributes for nobuiltin functions (details)
  434. Target::ReadMemory read from read-only binary file Section, not memory (details)
  435. [clang][NFC] Fix a potential assert failure (details)
  436. [PowerPC] Minor improvement for insert_vector_elt codegen (details)
  437. [ASTReader] Only mark module out of date if not already compiled (details)
  438. [TableGen] Replace two SmallDenseSets with SmallSets. (details)
  439. [ELF] Simplify R_386_TLS_GD computation. NFC (details)
  440. [libc][NFC] Add common template test class for sqrt, sqrtf and sqrtl. (details)
  441. [libc][NFC] Make conversion from FPBits to the float point type explicit. (details)
  442. [libc][NFC] Use explicit conversion in modfl_test. (details)
  443. [libc]NFC] Use explicit conversion on frexpl_test and logbl_test. (details)
  444. [libc][NFC] Use explicit conversion in aarch64 FEnv. (details)
  445. Normalize interaction with boolean attributes (details)
  446. [ELF] --wrap: don't clear sym->isUsedInRegularObj if real->isUsedInRegularObj; set wrap's initial binding to sym's (details)
  447. [Sanitizers] Undefined Behavior Sanitizer support for DragonFlyBSD (details)
  448. [Sanitizers] DragonFlyBSD adding support for builtins (details)
  449. [Sanitizers] Fix build (details)
  450. [Support] AbsoluteDifference - add brackets to appease static analyzer warning. NFCI. (details)
  451. [Inline] Don't add noalias metadata to inaccessiblememonly calls (details)
  452. [SimplifyCFG] Skip dbg intrinsics when checking for branch-only BBs. (details)
  453. [LICM] Add more tests for promotion and capture (NFC) (details)
  454. [AMDGPU] Add GlobalDCE before internalization pass (details)
  455. [CUDA][HIP] Mark device var used by host only (details)
  456. [Pragma] Added support for GCC unroll/nounroll (details)
  457. [HIP] Support hipRTC in header (details)
  458. [libcxx][doc] Fixes typos. (details)
  459. [ADT] Take graph as const & in some post-order iterators (NFC). (details)
  460. [AST] Remove args from LocationCall (details)
  461. [NFC] Fixed Typos (details)
  462. [TableGen] Remove local SmallSet from TypeSetByHwMode::insert. (details)
  463. [AST] Enable AST node introspection on WIN32 (details)
  464. [Support] ThreadPool tests: silence warning unused variable 'It' (details)
  465. [clang-scan-deps] Support double-dashes in clang command lines (details)
  466. [clang-scan-deps] Add support for clang-cl (details)
  467. [JITLink] Add testcase that was accidentally left out of 19e402d2b34. (details)
  468. [LoopUnroll] Make some tests more robust (NFC) (details)
  469. [LoopUnroll] Regenerate test checks (NFC) (details)
  470. [ADT] Update RPOT to work with specializations of different types. (details)
  471. [libc++] Remove hard tabs, U+00AD, and U+200B from all libc++ headers. NFCI. (details)
  472. [AST] Add TypeLoc support to node introspection (details)
  473. Update m_Undef to match vectors/aggrs with undefs and poisons mixed (details)
  474. Update InstCombine to use undef matcher instead (details)
  475. [NFC][LoopVectorize] Autogenerate check lines in X86/gather_scatter.ll test (details)
  476. [NFC][X86][CostModel] Rewrite load_store.ll (details)
  477. [AST][Introspection][NFC] Remove unnecessary temporary strings. (details)
  478. [IndVarSimplify] Add test requiring ashr expansion. (details)
  479. [libc++] Implements ranges::enable_borrowed_range (details)
  480. [gn build] Port 01ace074fcb6 (details)
  481. [Docs] Correct Boehm collector weblink in GarbageCollection.rst (details)
  482. [lldb] Remove a superfluous trailing semicolon, fixing warnings. NFC. (details)
  483. [clang] Fix cross compiling clang for windows after 141945f950e2f3f (details)
  484. Revert "[SCEV] Model `ashr exact x, C` as `(abs(x) EXACT/u (1<<C)) * signum(x)`" (details)
  485. [libc++] [CI] Fail if the headers contain cyclic dependencies. (details)
  486. [sanitizer] Don't call __tls_get_addr on s390x after D98926 (details)
  487. [Introspection] Dont emit json if unchanged. (details)
  488. [TableGen] Use range-based for loop. NFC (details)
  489. [LoopDeletion] Add test for PR49967 (NFC) (details)
  490. [TableGen] Use MachineValueTypeSet in place of SmallSet. (details)
  491. [lit] Fix the return code for "not not" after evaluating "not" internally (details)
  492. [Coroutines] Move CoroEarly pass to before AlwaysInliner (details)
  493. Revert "[Coroutines] Move CoroEarly pass to before AlwaysInliner" (details)
  494. [Coroutines] Set presplit attribute in Clang instead of CoroEarly pass (details)
  495. [TableGen] Pass SmallVector to union_modes instead of returning a std::vector. (details)
  496. Add a missing debug assertion in <list>. (details)
  497. Revert "[Coroutines] Set presplit attribute in Clang instead of CoroEarly pass" (details)
  498. [clangd][test] Fix build error of FeatureModulesTests (details)
  499. [RISCV][Driver] Make the ordering of CmdArgs consistent between RISCV::Linker and baremetal::Linker (details)
  500. [CVP] processCallSite returns wrong status (details)
  501. [Greedy RA] Add a check to MachineVerifier (details)
  502. [GreedyRA ORE] Add stats for copy of virtual registers. (details)
  503. [CodeGen] Improve code generation for clamping of constant indices with scalable vectors (details)
  504. [clang] Rename CompilerInvocationBase to RefBase, split out ValueBase (details)
  505. [llvm-exegesis] Honor -mcpu in analysis mode. (details)
  506. [clang] Implement CompilerInvocation copy assignment (details)
  507. [clang][cli] NFC: Use Diags to report parsing success/failure (details)
  508. [OpenCL] Change OpenCL builtin version encoding (details)
  509. [clang][cli] NFC: Move conditional LangOptions parsing/generation (details)
  510. [DebugInfo] Move the findDbg* functions into DebugInfo.cpp (details)
  511. Add default DataLayout support for complex numbers (details)
  512. [DebugInfo] Replace debug uses in replaceUsesOutsideBlock (details)
  513. [clang][deps] Simplify function discovering .pcm and .modulemap files (details)
  514. [NFC] Add tests for scalable vectorization of loops with in-order reductions (details)
  515. [RISCV] Lower vector shuffles to vrgather operations (details)
  516. [X86][CostModel] X86TTIImpl::getShuffleCost(): subvector insertions are cheap (details)
  517. [clang][deps] Remove the -full-command-line flag (details)
  518. [AMDGPU][MC] Corrected parsing of carry in/out operands in VOP3 (details)
  519. [clang][parser] Unify rejecting (non) decl stmts with gnu attributes (details)
  520. [TTI] NFC: Remove unused 'OptSize' parameter from shouldMaximizeVectorBandwidth (details)
  521. [AMDGPU] SIFoldOperands: eagerly erase dead REG_SEQUENCEs (details)
  522. [AMDGPU] Remove MachineDCE after SIFoldOperands (details)
  523. Try to unbreak the compiler-rt build on s390x (details)
  524. [MCA] CodeEmitter.h - remove unused <string> include. NFCI. (details)
  525. [llvm-exegesis] Analysis.cpp - use for-range loop. NFCI. (details)
  526. [IR] GlobalObject.h - remove unused <string> include. NFCI. (details)
  527. [SystemZ][z/OS] Set files in FileRemapper.cpp are text (details)
  528. [mlir][linalg] adding pass to run the interchange pattern. (details)
  529. [IR] GlobalObject.h - remove unused <utility> include. NFCI. (details)
  530. [clang][deps] Generate the full command-line for modules (details)
  531. [mlir] Improve debug flag management in Python bindings (details)
  532. [mlir][linalg] enable library call rewrites for linalg operations with index semantics. (details)
  533. [TableGen] Add support for the 'assert' statement in multiclasses (details)
  534. [clang][deps] NFC: Remove unused FullDependencies member (details)
  535. [AMDGPU] GCNDPPCombine: simplify API of isShrinkable. NFC. (details)
  536. Rename -show-skipped-includes to -fshow-skipped-includes and make it a driver option (details)
  537. [SystemZ][z/OS] Set more text files as text (details)
  538. [Support] Memory.h - remove unnecessary <string> include. NFCI. (details)
  539. Fix test/Frontend/print-header-includes.c (details)
  540. [gn build] Add missing dependencies to clang/lib/Basic (details)
  541. [gn build] (manually) merge 5f87ab336e9f4 (details)
  542. [Analysis] ImportedFunctionsInliningStatistics.h - add <memory> and remove unused <string> include. NFCI. (details)
  543. [NFC][SCEV] Assert that we don't try to create SCEVPtrToIntExpr of a non-integral pointer (details)
  544. [NFC][SCEVExpander][LoopDistribute] Regenerate scev-inserted-runtime-check.ll check lines (details)
  545. [NFC][SCEVExpander][LoopDistribute] Add test for SCEVPtrToIntExpr in SCEVExpander::generateOverflowCheck() (details)
  546. [SCEVExpander] generateOverflowCheck(): explicitly PtrToInt the Start (details)
  547. [NFCI][SCEVExpander] Extract GetOptimalInsertionPointForCastOf() helper (details)
  548. [SCEVExpander] GetOptimalInsertionPointForCastOf(): gracefully handle Constant's (details)
  549. [SCEVExpander] Expand explicit PtrToInt casts just like we would implicit ones (details)
  550. [SCEVExpander] ReuseOrCreateCast(): use IRBuilder to actually create the cast (details)
  551. [polly] Fix check-polly after SCEVExpander PtrToInt fixes (details)
  552. [clang] NFC: Fix range-based for loop warnings related to decl lookup (details)
  553. [AIX] Diagnose thinLTO usage in clang on AIX. (details)
  554. fix comment typo to cycle bots (details)
  555. [LowerConstantIntrinsics] avoid crashing on alloca with unexpected operand type (details)
  556. [lldb] Support "absolute memory address" images in crashlog.py (details)
  557. [AArch64][GlobalISel] Regbankselect + select @llvm.aarch64.neon.uaddlv (details)
  558. [TargetLowering] move "o" and "X" constraint handling to base class (details)
  559. [AArch64][GlobalISel] Implement custom legalization for s32 and s64 G_CTPOP (details)
  560. [lld] Delete unused includes. NFC (details)
  561. [test] Make global in split-gep-and-gvn.ll not constant (details)
  562. [RISCV] Pad v4i1/v2i1/v1i1 stores with 0s to make a full byte. (details)
  563. Update a test for auto-update format change (details)
  564. [RISCV] Fix mistake in comment. NFC (details)
  565. [libc++][NFC] Move incrementable_traits and indirectly_readable_traits into separate headers. (details)
  566. [LICM] Make capture check more precise (details)
  567. [gn build] Port e0adf7e06a9e (details)
  568. [flang] Define missing & needed IEEE_ARITHMETIC symbols (details)
  569. [CUDA][HIP] Allow non-ODR use of host var in device (details)
  570. [AArch64] Peephole rule to remove redundant cmp after cset. (details)
  571. [AMDGPU] Remove error check for indirect calls and add missing queue-ptr (details)
  572. [compiler-rt][asan] use full vm range on apple silicon macs (details)
  573. [lldb] Print the fixed address if symbolication fails in DumpDataExtractor (details)
  574. [lldb] Update breakpoint_function_callback.test for different error message (details)
  575. [PowerPC] Disable relative lookup table converter pass for AIX (details)
  576. [lldb] Stop unsetting LLDB_DEBUGSERVER_PATH from TestLaunchProcessPosixSpawn (details)
  577. [mlir][python] ExecutionEngine can dump to object file (details)
  578. [libcxx] Base MSVC autolinking on _LIBCPP_DISABLE_VISIBILITY_ANNOTATIONS (details)
  579. [WebAssembly] Use v128.const instead of splats for constants (details)
  580. [libcxx] [test] Ifdef out tests that rely on perms::none on directories for triggering errors (details)
  581. [AST] Update introspection API to use const-ref for copyable types (details)
  582. [InstCombine] Add tests for multiuse shr eq zero (NFC) (details)
  583. [InstCombine] Fold multiuse shr eq zero (details)
  584. [rs4gc] Fix a latent bug around attribute stripping for intrinsics (details)
  585. [AST] Fix comparison to of SourceRanges in container (details)
  586. [funcattrs] Consistently check call site attributes (details)
  587. [ARM] Use ProcResGroup in Cortex-M7 scheduling model (details)
  588. [CodeGen] Use ProcResGroup information in SchedBoundary (details)
  589. [SLP]Add detection of shuffled/perfect matching of tree entries. (details)
  590. [compiler-rt] assert max virtual address is <= mmap range size (details)
  591. [ThinLTO] Copy UnnamedAddr when spliting module. (details)
  592. Revert "[SLP]Add detection of shuffled/perfect matching of tree entries." (details)
  593. [M68k] Change printing of absolute memory references (details)
  594. [M68k] Implement Disassembler (details)
  595. [PhaseOrdering] add test to show unintended code sinking; NFC (details)
  596. Revert "[clang-scan-deps] Add support for clang-cl" (details)
  597. [libc++][gardening] Replace instances of `\x{AD}`. (details)
  598. Reset NextFnNum in MachineModuleInfo::initialize (details)
  599. [M68k] Put M68kDesc as the direct library dependency for disassembler (details)
  600. Add a cache of checked AttributeLists. (details)
  601. [libc++] [C++20] [P0586] Implement safe integral comparisons (details)
  602. [lldb] Fix demangler leaks in the DWARF AST parser (details)
  603. [InstCombine] Enhance deduction of alignment for aligned_alloc (details)
  604. Fix android-x86 library name in asan_device_setup. (details)
  605. [CSSPGO] Flip SkipPseudoOp to true for MIR APIs. (details)
  606. [CSSPGO] Exclude pseudo probes from slot index (details)
  607. [mlir][llvm] Add UnnamedAddr attribute to GlobalOp (details)
  608. [lldb] Fix one leak in reproducer (details)
  609. [AArch64][SVE] Combine add and index_vector (details)
  610. [GreedyRA ORE] Add Cost of spill locations into remark (details)
  611. [Docs] Mention LLVM_EXPERIMENTAL_TARGETS_TO_BUILD variable in CMake.rst (details)
  612. Revert "[GreedyRA ORE] Add Cost of spill locations into remark" (details)
  613. [RISCV][test] Add a new test of addition (details)
  614. [Test] Add loop load PRE test with GC pointers (details)
  615. [mlir][linalg] update drop unit dims to support linalg index operations. (details)
  616. [RISCV] Handle PseudoVRELOAD and PseudoVSPILL in getInstSizeInBytes. (details)
  617. [mlir][linalg] update fusion on tensors to support linalg index operations. (details)
  618. [llvm-rc] Simplify Opts.td to avoid repetition. NFC. (details)
  619. [llvm-rc] Fix handling of the /X option to match its documentation and rc.exe (details)
  620. [Test] Add -lcssa run to force LI in GVN (details)
  621. [X86][AMX] Add description of x86_amx to LangRef. (details)
  622. [MLIR][LinAlg] Detensoring CF cost-model: look forward. (details)
  623. [NFC] Restructure code to make it possible to insert other GCs (details)
  624. [CSKY 4/n] Add basic CSKYAsmParser and CSKYInstPrinter (details)
  625. [CSKY 5/n] Add support for all CSKY basic integer instructions except for branch series (details)
  626. [CSKY 6/n] Add support branch and symbol series instruction (details)
  627. [SelectionDAG] Relax constraints on STEP_VECTOR step operand (details)
  628. [PowerPC] Support f128 under VSX (details)
  629. Explicitly pass type to cast load constant folding result (details)
  630. [X86][AMX] Verify illegal types or instructions for x86_amx. (details)
  631. [AMDGPU] GCNDPPCombine: don't shrink V_ADD_CO_U32 if carry out is used (details)
  632. [DAGCombiner] Support fold zero scalar vector. (details)
  633. [PowerPC] Use mtvsrdd to put callee-saved GPR into VSR (details)
  634. [LV] Let selectVectorizationFactor reason directly on VectorizationFactor. (details)
  635. [RISCV] Fix missing emergency slots for scalable stack offsets (details)
  636. Re-land [GreedyRA ORE] Add Cost of spill locations into remark (details)
  637. [Support] BinaryStreamReader.h - remove unnecessary <string> include. NFCI. (details)
  638. [mlir] Add patterns to lower Math operations to LLVM based libm calls. (details)
  639. [mlir] Progressively lower vector to SCF (details)
  640. [ARM] Regenerate a couple of tests. NFC (details)
  641. [libcxx][test] Split off debug mode tests (details)
  642. [AArch64][SVE][InstCombine] Replace last{a,b} intrinsics with extracts... (details)
  643. [AArch64] Constant fold sve_convert_from_svbool(zero) to zero (details)
  644. [RISCV] Refactor an optimization of addition with immediate (details)
  645. [CodeGen] CodeGenPassBuilder.h - remove unnecessary <string> include. NFCI. (details)
  646. [Support] APInt.h - remove <algorithm> include. NFCI. (details)
  647. [MemoryBuiltins] Added support for memalign (details)
  648. [AMDGPU] Re-arrange ds_read/ds_write ISel pattern for better readability. (details)
  649. [C++, test] Fix typo in NSS* vars (details)
  650. clang-format: [JS] do not merge imports and exports. (details)
  651. [lit, test] Fix test cancellation feature detection (details)
  652. [mlir] test gather/scatter index vector of type index. (details)
  653. Fix Wdocumentation warning by consistently using '///' comment blocks. NFCI. (details)
  654. [DAG] SelectionDAG.cpp - breakup if-else chains where each block returns. NFCI. (details)
  655. [mlir][linalg] lower index operations during linalg to vector lowering. (details)
  656. [AMDGPU] Use simpler alternatives to !foldl. NFC. (details)
  657. [ValueTypes] Fix sizes of v256i32 and v256f32 (8182 -> 8192) (details)
  658. [llvm-objdump] Add an llvm-otool tool (details)
  659. [PowerPC] Canonicalize shuffles on big endian targets as well (details)
  660. [MCA][LSUnit] Fix a potential use after free in the logic that updates memory groups. (details)
  661. [libc++][ci] Re-split the CI pipeline to try and reduce load on more builders (details)
  662. [flang][nfc] Port 2 tests to use the new driver when enabled (details)
  663. [AMDGPU] Use if instead of foreach in a few places. NFC. (details)
  664. [RISCV][NFC] Add tests for scalable-vector DAGCombiner improvements (details)
  665. [AMDGPU] Add TransVALU to gfx10 (details)
  666. Fix PR46880: Fail CHECK-NOT with undefined variable (details)
  667. [AArch64][AsmParser] NFC: Remove unused ExtendOp struct (details)
  668. [SLP] Add detection of shuffled/perfect matching of tree entries. (details)
  669. [flang][driver] Refactor methods for parsing options (nfc) (details)
  670. [ARM] Create VMOVRRD from adjacent vector extracts (details)
  671. Revert "[SLP] Add detection of shuffled/perfect matching of tree entries." (details)
  672. [AArch64][SVE] Lower MULHU/MULHS nodes to umulh/smulh instructions (details)
  673. [gn build] reformat all gn files (details)
  674. [mlir][StandardToSPIRV] Add support for lowering std.xor on bool to SPIR-V (details)
  675. [SLP] Add detection of shuffled/perfect matching of tree entries. (details)
  676. MachineVerifier: Continue reporting errors for copies (details)
  677. GlobalISel: Restrict narrow scalar for fptoui/fptosi results (details)
  678. Ensure target-multiversioning emits deferred declarations (details)
  679. AMDGPU/GlobalISel: Fix uitofp/sitofp with non-power-of-2 integers (details)
  680. [ARM] Limit PerformExtractEltToVMOVRRD to when f64 is legal. (details)
  681. Revert "[SLP] Add detection of shuffled/perfect matching of tree entries." (details)
  682. [libcxx] makes `iterator_traits` C++20-aware (details)
  683. GlobalISel: Check for powers of 2 for inverse funnel shift lowering (details)
  684. [libc++][nfc] Move iterator_traits and related into __iterator/iterator_traits.h. (details)
  685. [gn build] Port 120fa8293e22 (details)
  686. [AArch64] Add apple-m1 CPU, and default to it for macOS. (details)
  687. [AArch64] Don't always override CPU for arm64e. (details)
  688. [AArch64] Bump apple-latest CPU alias to apple-a14. (details)
  689. [AMDGPU] Allow multiple uses of the same literal (details)
  690. GlobalISel: Defer register creation in handleAssignments (details)
  691. [libc++] NFC: Normalize `#endif //` comment indentation (details)
  692. free(nullptr) does not violate the nofree specification (details)
  693. [SLP] Add detection of shuffled/perfect matching of tree entries. (details)
  694. [X86][SSE] combineX86ShuffleChain - check if we're blending with zero into already zero elements (details)
  695. [PhaseOrdering] Add test case for PR36760 (details)
  696. [mlir][spirv] Support conversion of extract op from vector<1xT> type (details)
  697. [clangd] Use dirty filesystem when performing cross file tweaks (details)
  698. [mlir] Pass AnalysisManager as optional parameter to analysis ctor, so it can request any other analysis as dependency (details)
  699. Silence MSVC signed/unsigned comparison warning. NFCI. (details)
  700. [PhaseOrdering] Add second test case for PR36760 (details)
  701. [OpenMP] Add OpenMPOpt as a Module pass (details)
  702. [libcxx][doc] Use Phabricator links. (details)
  703. [tests] Update per review comment on D99912 (details)
  704. Tolerate missing debug info in the shared_ptr pretty printer. (details)
  705. [test] Add a couple more tests for D99912 (details)
  706. [COST]Add a test for reverse shuffles cost on AArch64, NFC. (details)
  707. [test] Add a couple extra tests for recurrence matching in unreachable code (details)
  708. [llvm-objdump] Prefer positive boolean Verbose instead of negative NonVerbose. NFC (details)
  709. Update tests checks, NFC. (details)
  710. [docs] Use make_unique in FrontendAction example (details)
  711. [mlir][Standard][NFC] Fix op documentation (details)
  712. [docs] Fix doxygen comments wrongly attached to the clang namespace (details)
  713. [libcxx][test] Construct non-empty containers in iterator's debug mode tests (details)
  714. Look through invertible recurrences in isKnownNonEqual (details)
  715. [mlir] Make some functions public to use custom TypeIDs (details)
  716. Fix clang Visual Studio build instructions (details)
  717. [ELF] Don't set versionId on undefined weak lazy symbols (details)
  718. [NFC][LoopVectorize] Autogenerate check lines in pr45259.ll (details)
  719. [NFC][SCEV] Split getLosslessPtrToIntExpr out of getPtrToIntExpr() (details)
  720. [NFC][InstCombine] Add tests for signed mul overflow check via mul-sdiv pattern (PR48769) (details)
  721. [InstCombine] Recognize `((x * y) s/ x) !=/== y` as an signed multiplication overflow check (PR48769) (details)
  722. [tests] Expand coverage for D99687 (details)
  723. clang: Update libstdc++ issue workaround (details)
  724. Rearrange code to reduce diff for D99687 [nfc] (details)
  725. Revert "Look through invertible recurrences in isKnownNonEqual" (details)
  726. [Compiler-rt] Fix bug when considering CMake path returned by llvm-config. (details)
  727. [libcxx] adds `iter_difference_t` and `iter_value_t` (details)
  728. Get Section from resolved_addr in Target::ReadMemory (details)
  729. [flang] Implement IPARITY, PARITY, and FINDLOC reductions (details)
  730. [llvm-objdump] Remove "No" prefixes on variables (details)
  731. [Driver] Support default libc++ library location on Darwin (details)
  732. [WebAssembly] More codegen for f64x2.convert_low_i32x4_{s,u} (details)
  733. [AArch64][GlobalISel] Clarify fallback debug print (details)
  734. [flang] Fix assignment of parameterized derived types (details)
  735. Reapply "Look through invertible recurrences in isKnownNonEqual" (details)
  736. [Driver] Support both slashes (details)
  737. [Driver] Don't use capture for InstalledDir (details)
  738. [COST][AARCH64] Improve cost of reverse shuffles for AArch64. (details)
  739. [lld-macho] Support subtractor relocations that reference sections (details)
  740. [lld-macho] Ensure segments are laid out contiguously (details)
  741. [lld-link] Warn on exported deleting dtor (details)
  742. [WebAssembly] Remove unused known_gcc_test_failures.txt. NFC (details)
  743. [InstCombine] add tests for srem-by-2; NFC (details)
  744. [InstCombine] fold shift-of-srem-by-2 to mask+shift (details)
  745. [NFC][InstCombine] Add test for sign-extending NSW trunc (PR49543) (details)
  746. [InstCombine] `sext(trunc(x)) --> sext(x)` iff trunc is NSW (PR49543) (details)
  747. [NFC][InstSimplify] Add one more test for unneeded 'and' (details)
  748. [InstSimplify] Bypass no-op `and`-mask, using known bits (PR49543) (details)
  749. [NFC][InstCombine] Add tests for sext-of-trunc-nuw-of-lshr (PR49543) (details)
  750. [InstCombine] "Bypass" NUW trunc of lshr if we are going to sext the result (PR49543) (details)
  751. [flang][msvc] Fix compilation of RuntimeGtest (details)
  752. Allow invokable sub-classes of IntrinsicInst (details)
  753. Revert "[InstCombine] "Bypass" NUW trunc of lshr if we are going to sext the result (PR49543)" (details)
  754. Revert "[InstCombine] `sext(trunc(x)) --> sext(x)` iff trunc is NSW (PR49543)" (details)
  755. [Clang, builtins] Added aligned_alloc, memalign support (details)
  756. Revert "Allow invokable sub-classes of IntrinsicInst" (details)
  757. [mlir] Disallow broadcast dimensions on TransferWriteOp. (details)
  758. Revert "[InstCombine] Recognize `((x * y) s/ x) !=/== y` as an signed multiplication overflow check (PR48769)" (details)
  759. [CMake][llvm] avoid changing global flags (may be used outside of llvm) (details)
  760. [FuncAttrs] Always preserve FunctionAnalysisManagerCGSCCProxy (details)
  761. [lld-macho] Skip platform checks for a few libSystem re-exports (details)
  762. [WebAssembly] Update README. NFC. (details)
  763. Make sure PHIElimination doesn't copy debug locations across basic blocks. (details)
  764. [sanitizer] Fix glibc sparc build and add GetTls support (details)
  765. [dfsan] Enable origin tracking with fast8 mode (details)
  766. [mlir] Support hoisting whole affine for loops in LICM (details)
  767. [RISCV] Add missing SEW=64 tests to vmslt-rv32.ll. NFC (details)
  768. [X86] Support some missing intrinsics (details)
  769. Revert "[Driver] Support default libc++ library location on Darwin" (details)
  770. [libc] Add hardware implementations of fma and fmaf for x86_64 and aarch64. (details)
  771. [NFC][CSKY] Resort the instruction description in td (details)
  772. [lldb] Simplify check for nill value in breakpoint_function_callback.test (details)
  773. [lsan] Test to show lsan dependency on globals (details)
  774. [libc] Disable fma and fmaf for x86_64. (details)
  775. [AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed (details)
  776. [Test] Add a negative unit test (details)
  777. [NFC] Remove redundant InstCombinePass name (details)
  778. Use SmallVector instead of std::vector to manage storage of llvm::BitVector (details)
  779. [RISCV] Introduce floating point control and state registers (details)
  780. [libc] Add fma to the C standard spec. (details)
  781. [PollyACC] Fix implicit function definitions. NFC. (details)
  782. [PollyACC] Configure PollyPPCG only if needed. (details)
  783. [mlir][linalg] adapt named op generalization to work with captures. (details)
  784. [RISCV][MC] Mask load should not have VMConstraint. (details)
  785. [Docs] Fix formatting issue for llvm.experimental.stepvector in LangRef (details)
  786. Revert "[InstSimplify] Bypass no-op `and`-mask, using known bits (PR49543)" (details)
  787. added section on CI system (details)
  788. [SCEV] Fix -Wunused-variable warning (NFC) (details)
  789. [lld][ELF] Fix "enumeral and non-enumeral type in conditional expression" warning (NFC) (details)
  790. Revert "[AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed" (details)
  791. [NFC] fixed link in documentation (details)
  792. [AArch64] Add instruction costs for FP_TO_UINT and FP_TO_SINT with half types (details)
  793. [RISCV][Clang] Add RVV AMO builtins (details)
  794. [llvm-cvtres] Reduce the set of dependencies of llvm-cvtres. NFC. (details)
  795. [llvm-rc] Run clang to preprocess input files (details)
  796. [mlir] Assume terminators in nested regions are always legal in FuncBufferizePass (details)
  797. [lldb/ELF] Fix IDs of synthetic eh_frame symbols (details)
  798. [flang][driver] Add support for `-fget-definition` (details)
  799. [llvm-rc] Try to fix the Preprocessor/llvm-rc.rc test on non arm/x86 architectures (details)
  800. [RISCV] Further fixes for RVV stack offset computation (details)
  801. [DAGCombiner] Support all-ones/all-zeros SPLAT_VECTOR in more combines (details)
  802. [DAG] TargetLowering.cpp - breakup if-else chains where each block returns. NFCI. (details)
  803. [lldb] [MainLoop] Support multiple callbacks per signal (details)
  804. [ARM][Driver][Windows] Allow command-line upgrade to Armv8. (details)
  805. [llvm-rc] Fix a new test to disambiguate macOS paths like /Users/... from options starting with a slash (details)
  806. [OpenCL] Refactor shuffle builtin decls (details)
  807. [OpenCL] Do not add builtins with unavailable types (details)
  808. [AArch64] Add and update reverse mask tests. NFC (details)
  809. Reland "[clang-scan-deps] Add support for clang-cl" (details)
  810. [lld][MachO] Add support for LC_VERSION_MIN_* load commands (details)
  811. Fix clang/test/Frontend/plugin-annotate-functions.c (details)
  812. [clang] Recognize ppc32 as valid mcpu value (details)
  813. Some FormatEntity.cpp cleanup and unit testing (details)
  814. AMDGPU: Fix indirect tail calls (details)
  815. [AArch64][SVE] Fix crash with icmp+select (details)
  816. [libc] Enhance ArrayRef + unittests (details)
  817. Do not pass null attributes to BuildAttributedStmt during instantiation (details)
  818. [SelectionDAG] Fix minor typo in ISDOpcodes.h. NFC (details)
  819. [Clang][ARM] Define __VFP_FP__ macro unconditionally (details)
  820. [MC] MCInstrDesc.h - remove unnecessary <string> include. NFCI. (details)
  821. [PhaseOrdering] Add test case for PR45682 (details)
  822. [Support] Don't include VirtualFileSystem.h in CommandLine.h (details)
  823. [mlir][NFC] Refactor linalg substituteMin and AffineMinSCF canonizalizations (details)
  824. [AsmParser][ms][X86] Fix possible misbehaviour in parsing of special tokens at start of string. (details)
  825. [TTI] NFC: Change getVectorSplitCost to return InstructionCost (details)
  826. clang-format: [JS] do not wrap after `asserts` (details)
  827. [mlir] some iwyu fixes after ba7a92c01e8 (details)
  828. [mlir] more iwyu fixes after ba7a92c01e8 (details)
  829. [mlir] yet more iwyu fixes after ba7a92c01e8 (details)
  830. [lldb/test] Modernize lldb-server test inferior (details)
  831. [mlir] hopefully final round of iwyu fixes after ba7a92c01e8 (details)
  832. [flang] iwyu fixes after ba7a92c01e8 (details)
  833. [libc++] Add std::ranges::iter_move and std::iter_rvalue_reference_t (details)
  834. [AMDGPU] Lower regbanks reassign threshold to 15000 (details)
  835. [lldb/test] Clean up TestThreadSpecificBpPlusCondition inferior (details)
  836. [lld][MachO] Refactor findCommand (details)
  837. [gn build] Port 97e383aa061b (details)
  838. [gn build] add llvm-profgen to gn build (details)
  839. [CSSPGO] Exclude pseudo probe from slotindex verification. (details)
  840. [libc++] [test] Remove epicyclic workarounds for vector/span; use T[] or std::array. (details)
  841. [libc++] s/_LIBCPP_NO_HAS_CHAR8_T/_LIBCPP_HAS_NO_CHAR8_T/g (details)
  842. [PollyACC] Fix declaration/stub definition mismatch. NFC. (details)
  843. [libcxx][iterator] adds `std::indirectly_readable` and `std::indirectly_writable` (details)
  844. [lsan][docs] Clarify supported platforms (details)
  845. [OPENMP]Fix PR49698: OpenMP declare mapper causes segmentation fault. (details)
  846. [lld-macho] Support LC_ENCRYPTION_INFO (details)
  847. [lldb] [test/Register] Initial tests for regsets in core dumps (details)
  848. [X86][SSE] getFauxShuffleMask - don't decode OR(SHUFFLE,SHUFFLE) containing UNDEFs. (PR50049) (details)
  849. [Polly] Explicitly include all std headers (details)
  850. [libc++][doc] Improve Phabricator links. (details)
  851. [lld/mac] add aarch64 to requirements of encryption-info.s test (details)
  852. [InstSimplify] add tests for ctlz-of-shift-constant; NFC (details)
  853. [InstSimplify] generalize ctlz-of-shifted-constant (details)
  854. Fix FoldReshapeOpWithUnitExtent generating illegal reshape (details)
  855. [SimplifyLibCalls] Don't change alignment when creating memset (details)
  856. [compiler-rt] check max address from kernel is <= mmap range size (details)
  857. [FuncAttrs] Don't infer willreturn for nonexact definitions (details)
  858. [lldb] Fix RichManglingContext::FromCxxMethodName() leak (details)
  859. [scudo] Avoid empty statement warnings (details)
  860. Revert "[InstCombine] Fold multiuse shr eq zero" (details)
  861. [lld-macho][nfc] Add accessors for commonly-used PlatformInfo fields (details)
  862. [LoopIdiom] Added testcase from PR44378; NFC (details)
  863. [LLParser] Print mismatched types in error message (details)
  864. [SLP]Add a test with broadcast shuffle kind in SLP, NFC. (details)
  865. [flang][msvc] Fix compilation of external-hello-world test with MSVC. (details)
  866. [lldb] Use the compiler from the SDK in simulator tests (details)
  867. [Evaluator] Bitcast result of pointer stripping (details)
  868. [lldb-vscode] Add postRunCommands (details)
  869. scudo: Use DC GZVA instruction in storeTags(). (details)
  870. scudo: Make prepareTaggedChunk() and resizeTaggedChunk() generic. (details)
  871. [libc++] Move macOS testing out of the 2nd CI stage (details)
  872. [HIP] Add option -fgpu-inline-threshold (details)
  873. Re-land "[Driver] Support default libc++ library location on Darwin" (details)
  874. [MemCpyOpt] Allow variable lengths in memcpy optimizer (details)
  875. Fix TestVSCode_launch test (details)
  876. [MC] Use COMDAT for LSDA only if IR comdat type is any (details)
  877. Add a new AsmParserState class to capture detailed source information for .mlir files (details)
  878. [mlir][mlir-lsp] Add a new C++ LSP server for MLIR named mlir-lsp-server (details)
  879. [mlir] Add a vscode language extension for MLIR (details)
  880. [mlir][mlir-lsp-server] Add some initial documentation on the MLIR LSP server (details)
  881. [lldb-vscode] redirect stderr/stdout to the IDE's console (details)
  882. [RISCV] Temporary in vmsge(u).vx pseudo instructions can't be V0. (details)
  883. [RISCV] Cleanup up the spec version references around fmaxnum/fminnum. (details)
  884. [libc++] Move the debug_level feature to the DSL (details)
  885. [lldb-vscode] Distinguish shadowed variables in the scopes request (details)
  886. Fix TestVSCode_runInTerminal (details)
  887. [CodeView] Add CodeView support for PGO debug information (details)
  888. [libcxx] Stop using use c++ subdirectory for libc++ library (details)
  889. Fix VSCode/TestOptions.test (details)
  890. [IR][sanitizer] Set nounwind on module ctor/dtor, additionally set uwtable if -fasynchronous-unwind-tables (details)
  891. [IR] Add doc about Function::createWithDefaultAttr. NFC (details)
  892. [mlir] Linalg : do not forward memrefs to outputs when do bufferization (details)
  893. [HWASan] Untag argument to __hwasan_tag_memory. (details)
  894. [CSSPGO][llvm-profgen] Always report dangling probes for frames with real samples. (details)
  895. [AArch64][GlobalISel] Mark some vector G_ABS cases as legal (details)
  896. [AArch64][GlobalISel] Fix regbankselect for G_FCMP with vector destinations (details)
  897. Delete le32/le64 targets (details)
  898. [OpenMP] Simplify offloading parallel call codegen (details)
  899. AMDGPU: Fix assert when trying to fold reg_sequence of physreg copies (details)
  900. [mlir][tosa] Add tosa.avg_pool2d lowering (details)
  901. [lldb] Disable TestSimulatorPlatform.py because it's causing a SIGHUP (details)
  902. Wordsmith the semantics of invariant.load (details)
  903. [Coroutine] Collect CoroBegin if all of terminators are dominated by one coro.destroy (details)
  904. [RISCV] Teach lowerSPLAT_VECTOR_PARTS to detect cases where Hi is sign extended from Lo. (details)
  905. [mlir][linalg] Add pattern to push reshape after elementwise operation (details)
  906. [RISCV] Custom lowering of FLT_ROUNDS_ (details)
  907. [Debug-Info] implement -gstrict-dwarf (details)
  908. scudo: Obtain tag from pointer instead of loading it from memory. NFCI. (details)
  909. [CodeGen] Do not split functions with attr "implicit-section-name". (details)
  910. [AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed (details)
  911. [GVN] Introduce loop load PRE (details)
  912. [RISCV] Use TargetConstant for condition code of RISCVISD::SELECT_CC. (details)
  913. [NewPM] Mark some more wrapper passes as ignored (details)
  914. [clang-tidy] Avoid bugprone-macro-parentheses warnings after goto argument (details)
  915. [libcxx] [test] Fix testing on windows with c++experimental enabled (details)
  916. [CSSPGO][llvm-profdata] Support trimming cold context when merging profiles (details)
  917. [LoopVectorize] Don't create unnecessary vscale intrinsic calls (details)
  918. [RISCV] Custom lowering of SET_ROUNDING (details)
  919. [AMDGPU] SIWholeQuadMode: don't add duplicate implicit $exec operands (details)
  920. clang-format: [JS] do not merge side-effect imports. (details)
  921. [mlir][linalg] remove interchange option on linalg to loop lowering. (details)
  922. [clang][deps] Include "-cc1" in the arguments (details)
  923. [AArch64] Fix calling windows varargs with floats in fixed args from non-windows functions (details)
  924. [mlir] Move memref-tests from standard to memref folder. (details)
  925. [PowerPC] Improve codegen for vector fp to int widening conversions (details)
  926. [lldb] Add support for evaluating expressions in static member functions (details)
  927. [lldb][NFC] Fix unsigned/signed cmp warning in MainLoopTest (details)
  928. [AST] Add NestedNameSpecifierLoc accessors to node introspection (details)
  929. [PowerPC] Add vec_roundc as alias for vec_rint in altivec.h (details)
  930. [X86][AVX] Add PR49971 test case (details)
  931. MipsSEFrameLowering.h - remove unused headers. NFCI. (details)
  932. [Matrix] Support #pragma clang fp (details)
  933. [Bitcode] Ensure DIArgList in bitcode has no null or forward metadata refs (details)
  934. [lldb-vscode] Use a DenseMap to pacify overly aggressive linters (details)
  935. [AST] De-duplicate empty node introspection (details)
  936. Fix typo "beneficiates" in comments (details)
  937. [lldb] XFAIL TestStoppedInStaticMemberFunction on Windows (details)
  938. [AST] Add clarification comment (details)
  939. [clang][deps] Check extra args in tests (details)
  940. [lldb] Don't leak LineSequence in PDB parsers (details)
  941. [MLIR][Shape] Add canonicalizations for `shape.broadcast` (details)
  942. [-Wcalled-once] Do not run analysis on Obj-C++ (details)
  943. [AArch64][SVE] Regression test all ACLE tests with C++ (details)
  944. clang: libstdc++ LWM is 4.8.3 (details)
  945. [lldb/elf] Avoid side effects in function calls ParseUnwindSymbols (details)
  946. [gn build] (manually) port aee6c86c4d (details)
  947. [AST] Make comment a bit more specific (details)
  948. [gn build] (manually) port aee6c86c4d better (details)
  949. [X86][AMX][NFC] Remove assert for comparison between different BBs. (details)
  950. [mlir] Add `tensor.reshape`. (details)
  951. [DAGCombiner] Allow operand of step_vector to be negative. (details)
  952. [SimplifyLibCalls][NFC] Use StringRef::back instead explicit indexing. (details)
  953. [InstCombine][NFC] Use --check-globals flag in tests. (details)
  954. [LTO] Caching.h - remove unused <string> include. NFCI. (details)
  955. [X86] Regenerate atomic-eflags-reuse.ll (details)
  956. [lld/mac] add a comment pointing to a test that took me a while to find (details)
  957. [Hexagon] Masked and unmasked load to same base -> load and two selects (details)
  958. Update shebang for clang-format-diff script to python3. (details)
  959. Revert "[libcxx][iterator] adds `std::indirectly_readable` and `std::indirectly_writable`" (details)
  960. AArch64: expand G_DIVREM operations in GlobalISel (details)
  961. AArch64: support mixed-size fp <-> int conversions in GlobalISel. (details)
  962. Revert "[Hexagon] Masked and unmasked load to same base -> load and two selects" (details)
  963. [OpenCL] Add missing C++ legacy atomics with generic (details)
  964. [mlir] Move PyConcreteAttribute to header. NFC. (details)
  965. [C++4OpenCL] Add extra diagnostics for kernel argument types (details)
  966. [LoopIdiom] Added testcase for double memset (fixed in LLVM 12); NFC (details)
  967. [SLP]Improve cost model for the vectorized extractelements. (details)
  968. [lld/mac] make a few "named parameter comments" more consistent (details)
  969. [SLP]Added explicit ref to TargetTransformInfo to try to pacify MSVC (details)
  970. [SLP]Replace more `TTI` with `TTIRef`, NFC. (details)
  971. [LoopVectorize] Fix bug where predicated loads/stores were dropped (details)
  972. [OPENMP]Mark test as unsupported to avoid possible unexpected passes, (details)
  973. [AArch64] Block tryCombineToBSL combines for vectors wider than NEON (details)
  974. [lld/mac] tweak comment in a test (details)
  975. [Hexagon] Unmasked and masked load pair to dame bae -? one load and selects (details)
  976. [libc++] Re-apply `std::indirectly_readable` and `std::indirectly_writable` (details)
  977. [PowerPC] Add vec_roundm as alias for vec_floor in altivec.h (details)
  978. [PowerPC] Add missing VSX guard for vec_roundm with vector double (details)
  979. [PowerPC] Add vec_roundp as alias for vec_ceil (details)
  980. [PowerPC] Add vec_roundz as alias for vec_trunc in altivec.h (details)
  981. [PowerPC] Add vec_xlds to altivec.h (details)
  982. [PowerPC] Add vec_load_splats to altivec.h (details)
  983. [PowerPC] Add vec_vclz as an alias for vec_cntlz in altivec.h (details)
  984. [PowerPC] Add missing casts for vec_xlds and vec_load_splats (details)
  985. [flang][driver][Revert] Reverts f18 to allow options passed to -W (details)
  986. [flang] Fix checking of argument passing for parameterized derived types (details)
  987. [llvm-profgen] A couple tweaks to the testing harness. (details)
  988. [SLP]Skip undefs trying to find perfect/shuffled tree entries matching. (details)
  989. [libc++] Fix some typos and remove unused macros. NFCI. (details)
  990. [libc++] Eliminate macro _LIBCPP_UNUSED_VAR. NFCI. (details)
  991. [x86] remove stale comment from test file; NFC (details)
  992. [flang][openmp] Add General Semantic Checks for Allocate Directive (details)
  993. [libc++] [test] Fix nodiscard_extensions.pass.cpp in _LIBCPP_DEBUG mode. (details)
  994. [dfsan] Track origin at loads (details)
  995. [flang] Fix spurious errors from runtime derived type table construction (details)
  996. Fix memory leak in MicrosoftDemangleNodes's Node::toString (details)
  997. [OpenMP] Add function for setting LIBOMPTARGET_INFO at runtime (details)
  998. [Hexagon] Add HVX intrinsics for conditional vector loads/stores (details)
  999. [RISCV] Use stack temporary to splat two GPRs into SEW=64 vector on RV32. (details)
  1000. [lldb] Fix that the expression commands --top-level flag overwrites --allow-jit false (details)
  1001. [RISCV] Turn splat shuffles of vector loads into strided load with stride of x0. (details)
  1002. [lsan] Temporarily disable new check broken on arm7 (details)
  1003. Temporarily revert the code part of D100981 "Delete le32/le64 targets" (details)
  1004. [flang] Update recently added OpenMP tests to use the new driver (details)
  1005. [sanitizer] Use COMPILER_RT_EMULATOR with gtests (details)
  1006. [scudo] Check if MADV_DONTNEED zeroes memory (details)
  1007. [NFC] Remove reference to file deleted by D100981. (details)
  1008. [RISCV] Support vector type for second operand of vmfge and vmfgt IR intrinsics. (details)
  1009. [RISCV] Add missing tests for vector type for second operand of vmsgt and vmsgtu IR intrinsics. (details)
  1010. [RISCV] Add IR intrinsics for vmsge(u).vv/vx/vi. (details)
  1011. Revert "[instcombine] Exploit UB implied by nofree attributes" (details)
  1012. [Driver] Specify -ccc-install-dir for linux-cross test (details)
  1013. [SCEV] Compute ranges for lshr recurrences (details)
  1014. Revert "[sanitizer] Use COMPILER_RT_EMULATOR with gtests" (details)
  1015. scudo: Use a table to look up the LSB for computing the odd/even mask. NFCI. (details)
  1016. [flang] (NFC) Document Fortran feature history (details)
  1017. Fix the triple used in llvm-mca. (details)
  1018. Coverage: Document how to collect a profile without a filesystem (details)
  1019. [Diagnostics] Restore -Wdeprecated warning when user-declared copy assignment operator is defined as deleted (PR45634) (details)
  1020. Add support of the next Ubuntu (Ubuntu 21.10 - Impish Idri) (details)
  1021. [lldb] Include thread name in crashlog.py output (details)
  1022. Revert "[AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed" (details)
  1023. [M68k][AsmParser][NFC] Remove redundant default cases (details)
  1024. Skip unreliable LLDB tests when running under asan (details)
Commit fd1f8a54628a4952c836c52171dfb18683ac8574 by sander.desmalen
[TTI] NFC: Change getGatherScatterOpCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100200
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)
Commit bd86824d9865bea90770abd94076f7ba44a33473 by sander.desmalen
[TTI] NFC: Change getArithmeticReductionCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

This patch is practically NFC, with the exception of an AArch64 SVE related
cost-model change, where we can now return an Invalid cost instead of some
bogus number.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100201
The file was modifiedllvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (diff)
Commit 2285dfb73fc680c53c4292f39925545ded8afed5 by sander.desmalen
[TTI] NFC: Change getMinMaxReductionCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100202
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
Commit db134e2428c9c1bbc04e30bd645d067a0e7d3d75 by sander.desmalen
[TTI] NFC: Change getCmpSelInstrCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100203
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/BPF/BPFTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp (diff)
Commit d676b5749d01a3589bb5495bf9a402c30fea6f58 by sander.desmalen
[TTI] NFC: Change getMaskedMemoryOpCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100204
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
Commit 03f47bdcb1a90e229181148180fae2eea35c9d6d by sander.desmalen
[TTI] NFC: Change get[Interleaved]MemoryOpCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100205
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
Commit 14b9f320fef9888ab63ff0e791060437a0e1dcc8 by pavel
[lldb] Remote @debugserver_test from TestAppleSimulatorOSType

The annotation is now (since the introduction of @apple_simulator_test)
redundant, and the test could theoretically run on lldb-server too (if
it supported darwin hosts).
The file was modifiedlldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py (diff)
Commit 5e3d9fcc3a8802cea5b850a3ca40c515d916bf82 by Tim Northover
StackProtector: ensure protection does not interfere with tail call frame.

The IR stack protector pass must insert stack checks before the call instead of
between it and the return.

Similarly, SDAG one should recognize that ADJCALLFRAME instructions could be
part of the terminal sequence of a tail call. In this case because such call
frames cannot be nested in LLVM the stack protection code must skip over the
whole sequence (or risk clobbering argument registers).
The file was addedllvm/test/CodeGen/AArch64/stack-protector-musttail.ll
The file was addedllvm/test/CodeGen/X86/tailcc-ssp.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (diff)
The file was addedllvm/test/CodeGen/ARM/Windows/stack-protector-musttail.ll
The file was modifiedllvm/lib/CodeGen/StackProtector.cpp (diff)
Commit d7ce89c769d2a518efef5cc4eda152ded33b7ddf by pavel
[lldb] Remove self-skipping code from lldb-server tests

We already do category based skipping in checkDebugServerSupport in
dotest.py.
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py (diff)
Commit 8ea5d190ecc701e5a2df7661f21d4b0ad0fbdc29 by gysit
[mlir][linalg] update tiling to support linalg index operations.

The patch updates the tiling pass to add the tile offsets to the indices returned by the linalg operations.

Differential Revision: https://reviews.llvm.org/D100379
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp (diff)
The file was addedmlir/test/Dialect/Linalg/tile-indexed.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile.mlir (diff)
Commit 29a4d7813c75c1fbbd7afef33d32dde92598d1ad by david.spickett
[lldb][AArch64] Only run MTE memory region test if we have MTE

This test is flakey because it tries to read the proc/smaps
file of the first lldb-server process it finds. This process
can finish before we finish doing that.

http://lab.llvm.org:8011/#/builders/96/builds/6634/steps/6/logs/stdio

For now limit this to MTE targets which basically means
QEMU via lldb-dotest, which doesn't have this issue.

I'll fix the race condition shortly.
The file was modifiedlldb/test/API/linux/aarch64/mte_memory_region/TestAArch64LinuxMTEMemoryRegion.py (diff)
Commit 8914902b01a3f8bdea9c71a0d9d23e4ee0ae80e4 by jezng
[lld-macho] Add support for arm64_32

From what I can tell, it's pretty similar to arm64. The two main differences
are:

1. No 64-bit relocations
2. Stub code writes to 32-bit registers instead of 64-bit

Plus of course the various on-disk structures like `segment_command` are using
the 32-bit instead of the 64-bit variants.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D99822
The file was addedlld/test/MachO/arm64-32-stubs.s
The file was addedlld/MachO/Arch/ARM64_32.cpp
The file was modifiedlld/MachO/Writer.cpp (diff)
The file was modifiedlld/test/MachO/segments.s (diff)
The file was addedlld/test/MachO/Inputs/WatchOS.sdk/usr/lib/libc++abi.tbd
The file was modifiedlld/MachO/CMakeLists.txt (diff)
The file was addedlld/MachO/Arch/ARM64Common.cpp
The file was addedlld/test/MachO/Inputs/WatchOS.sdk/usr/lib/libc++.tbd
The file was modifiedlld/MachO/MachOStructs.h (diff)
The file was modifiedlld/test/MachO/header.s (diff)
The file was addedlld/MachO/Arch/ARM64Common.h
The file was modifiedlld/MachO/Driver.cpp (diff)
The file was modifiedlld/test/MachO/lit.local.cfg (diff)
The file was addedlld/test/MachO/Inputs/WatchOS.sdk/usr/lib/libSystem.tbd
The file was modifiedlld/MachO/Arch/ARM64.cpp (diff)
The file was modifiedlld/MachO/Target.h (diff)
Commit 35a745d814e1cde3de25d0d959fddc31e1061a41 by jezng
[lld-macho] Add 32-bit compact unwind support

This could probably have been part of D99633, but I split it up to make
things a bit more reviewable. I also fixed some bugs in the implementation that
were masked through integer underflows when operating in 64-bit mode.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D99823
The file was modifiedlld/MachO/UnwindInfoSection.h (diff)
The file was modifiedlld/MachO/Writer.cpp (diff)
The file was modifiedlld/MachO/Relocations.h (diff)
The file was modifiedlld/MachO/UnwindInfoSection.cpp (diff)
The file was modifiedlld/test/MachO/compact-unwind.s (diff)
The file was modifiedlld/MachO/SyntheticSections.h (diff)
Commit 3142fc3b5bba78663b7579a401683b0cda90243f by jezng
[lld-macho] Have toString() emit full path to archive files

It doesn't make sense to take just the base filename for archives when we emit
the full path for object files. (LLD-ELF emits the full path too.)

This will also make it easier to write a proper test for {D100147}.

Reviewed By: #lld-macho, oontvoo

Differential Revision: https://reviews.llvm.org/D100357
The file was modifiedlld/test/MachO/invalid/undefined-symbol.s (diff)
The file was modifiedlld/test/MachO/why-load.s (diff)
The file was modifiedlld/MachO/InputFiles.cpp (diff)
The file was modifiedlld/test/MachO/u.s (diff)
Commit 682d1dfe09436857aa3b64365b5cc6fcbf1f043b by jezng
[lld-macho] Make load relaxation work for arm64_32

arm64_32 uses 32-bit GOT loads, so we should accept those
instructions in `ARM64Common::relaxGotLoad()` too.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D100229
The file was addedlld/test/MachO/arm64-32-reloc-got-load.s
The file was modifiedlld/MachO/Arch/ARM64Common.cpp (diff)
Commit 7736b08c287274361f2cdf13512015708af4d335 by dpetrov
[analyzer] Replace StoreManager::CastRetrievedVal with SValBuilder::evalCast

Summary: Move logic from CastRetrievedVal to evalCast and replace CastRetrievedVal with evalCast. Also move guts from SimpleSValBuilder::dispatchCast inside evalCast.
evalCast intends to substitute dispatchCast, evalCastFromNonLoc and evalCastFromLoc in the future. OriginalTy provides additional information for casting, which is useful for some cases and useless for others.  If `OriginalTy.isNull()` is true, then cast performs based on CastTy only. Now evalCast operates in two ways. It retains all previous behavior and take over dispatchCast behavior. dispatchCast, evalCastFromNonLoc and evalCastFromLoc is considered as buggy since it doesn't take into account OriginalTy of the SVal and should be improved.

From this patch use evalCast instead of dispatchCast, evalCastFromNonLoc and evalCastFromLoc functions. dispatchCast redirects to evalCast.

This patch shall not change any behavior.

Differential Revision: https://reviews.llvm.org/D96090
The file was modifiedclang/lib/StaticAnalyzer/Core/RegionStore.cpp (diff)
The file was modifiedclang/lib/StaticAnalyzer/Core/SValBuilder.cpp (diff)
The file was modifiedclang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp (diff)
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/Store.h (diff)
The file was modifiedclang/lib/StaticAnalyzer/Core/Store.cpp (diff)
Commit 872b1da6ad276515ccfb1481009d23b129c72cac by pavel
[lldb/test] s/add_no_ack_remote_stream/do_handshake

These two functions are doing the same thing, only one of them is
sending the packets immediately and the other "queues" them to be sent
later. The first one is better as in case of errors, the backtrace will
point straight to the place that caused them.

Modify the first method to avoid duplication, and ten standardize on it.
The file was modifiedlldb/test/API/tools/lldb-server/TestGdbRemoteAttachOrWait.py (diff)
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py (diff)
The file was modifiedlldb/test/API/tools/lldb-server/commandline/TestGdbRemoteConnection.py (diff)
The file was modifiedlldb/test/API/tools/lldb-server/TestGdbRemoteCompletion.py (diff)
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py (diff)
The file was modifiedlldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py (diff)
The file was modifiedlldb/test/API/tools/lldb-server/TestGdbRemoteHostInfo.py (diff)
The file was modifiedlldb/test/API/tools/lldb-server/TestLldbGdbServer.py (diff)
The file was modifiedlldb/test/API/tools/lldb-server/TestGdbRemoteAttachWait.py (diff)
Commit f7eec83932b541f6db295284d7c23731d8db9ce3 by anirudh_prasad
[AsmParser][SystemZ][z/OS] Add in support to allow use of additional comment strings.

- Currently, MCAsmInfo provides a CommentString attribute, that various targets can set, so that the AsmLexer can appropriately lex a string as a comment based on the set value of the attribute.
- However, AsmLexer also supports a few additional comment syntaxes, in addition to what's specified as a CommentString attribute. This includes regular C-style block comments (/* ... */), regular C-style line comments (// .... ) and #. While I'm not sure as to why this behaviour exists, I am assuming it does to maintain backward compatibility with GNU AS (see https://sourceware.org/binutils/docs/as/Comments.html#Comments for reference)
For example:
Consider a target which sets the CommentString attribute to '*'.
The following strings are all lexed as comments.

```
"# abc" -> comment
"// abc" -> comment
"/* abc */ -> comment
"* abc" -> comment
```

- In HLASM however, only "*" is accepted as a comment string, and nothing else.
- To achieve this, an additional attribute (`AllowAdditionalComments`) has been added to MCAsmInfo. If this attribute is set to false, then only the string specified by the CommentString attribute is used as a possible comment string to be lexed by the AsmLexer. The regular C-style block comments, line comments and "#" are disabled. As a final note, "#" will still be treated as a comment, if the CommentString attribute is set to "#".

Depends on https://reviews.llvm.org/D99277

Reviewed By: abhina.sreeskantharajan, myiwanch

Differential Revision: https://reviews.llvm.org/D99286
The file was modifiedllvm/include/llvm/MC/MCAsmInfo.h (diff)
The file was modifiedllvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp (diff)
The file was modifiedllvm/lib/MC/MCParser/AsmLexer.cpp (diff)
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp (diff)
Commit 3fca07d7b9a29fe829c8f04642d35a3bbb94d4d1 by marek.kurdej+llvm.org
[libc++] [P0458] Add map::contains and set::contains for heterogenous lookup missed in a17b1aed.

Commit rGa17b1aed added `bool contains(const key_type& x) const;` methods to associative containers, but didn't add `template<class K> bool contains(const K& x) const;` for heterogenous lookup.

Reviewed By: #libc, Quuxplusone, ldionne

Differential Revision: https://reviews.llvm.org/D100369
The file was modifiedlibcxx/docs/Cxx2aStatusPaperStatus.csv (diff)
The file was addedlibcxx/test/std/containers/associative/map/map.ops/contains_transparent.pass.cpp
The file was modifiedlibcxx/include/set (diff)
The file was addedlibcxx/test/std/containers/associative/map/map.ops/contains.pass.cpp
The file was removedlibcxx/test/std/containers/associative/map/contains.pass.cpp
The file was modifiedlibcxx/include/map (diff)
The file was addedlibcxx/test/std/containers/associative/set/contains_transparent.pass.cpp
Commit 4acdac081de0360e6dda2e4bbf8aea76dee4b1ed by kostyak
[docs][scudo] Update Scudo documentation

Update the Scudo document to align with the standalone version.
Add some more verbiage about the various component of the
allocator, rework a bit everything.
The build instructions have been updated.
The options and their default values have been updated, and
the `mallopt` ones have been added.

Differential Revision: https://reviews.llvm.org/D100230
The file was modifiedllvm/docs/ScudoHardenedAllocator.rst (diff)
Commit 0b63e3222b2de3ec24aade18c99513a5ae3f30d2 by ajcbik
[mlir] X86Vector: Add AVX Rsqrt

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D99818
The file was modifiedmlir/test/Dialect/X86Vector/roundtrip.mlir (diff)
The file was modifiedmlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp (diff)
The file was modifiedmlir/test/Dialect/X86Vector/legalize-for-llvm.mlir (diff)
The file was modifiedmlir/test/Target/LLVMIR/x86vector.mlir (diff)
The file was addedmlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-rsqrt.mlir
The file was modifiedmlir/include/mlir/Dialect/X86Vector/X86Vector.td (diff)
Commit bb6d96ced80f288475cd374c3c7a25ee8cad2bb2 by kadircet
[clangd] Enable modules to contribute tweaks.

First patch to enable diagnostic fix generation through modules. The
workflow will look like:
- ASTWorker letting modules know about diagnostics while building AST,
modules can read clang::Diagnostic and mutate clangd::Diagnostic through
that hook.
- Modules can implement and expose tweaks to fix diagnostics or act as
general refactorings.
- Tweak::Selection will contain information about the diagnostic
associated with the codeAction request to enable modules to fail their
diagnostic fixing tweakson prepare if need be.

Differential Revision: https://reviews.llvm.org/D98498
The file was modifiedclang-tools-extra/clangd/FeatureModule.h (diff)
The file was modifiedclang-tools-extra/clangd/unittests/tweaks/TweakTesting.cpp (diff)
The file was modifiedclang-tools-extra/clangd/refactor/Tweak.h (diff)
The file was modifiedclang-tools-extra/clangd/tool/Check.cpp (diff)
The file was addedclang-tools-extra/clangd/unittests/FeatureModulesTests.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp (diff)
The file was modifiedclang-tools-extra/clangd/refactor/Tweak.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/CMakeLists.txt (diff)
Commit bce3ac4f224aa7da0b253852ce8a28ad5a39c31f by kadircet
[clangd] Introduce ASTHooks to FeatureModules

These can be invoked at different stages while building an AST to let
FeatureModules implement features on top of it. The patch also
introduces a sawDiagnostic hook, which can mutate the final clangd::Diag
while reading a clang::Diagnostic.

Differential Revision: https://reviews.llvm.org/D98499
The file was modifiedclang-tools-extra/clangd/unittests/TestTU.cpp (diff)
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/TestTU.h (diff)
The file was modifiedclang-tools-extra/clangd/FeatureModule.h (diff)
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/DiagnosticsTests.cpp (diff)
The file was modifiedclang-tools-extra/clangd/Preamble.cpp (diff)
The file was modifiedclang-tools-extra/clangd/ClangdServer.h (diff)
The file was modifiedclang-tools-extra/clangd/Diagnostics.cpp (diff)
The file was modifiedclang-tools-extra/clangd/Diagnostics.h (diff)
The file was modifiedclang-tools-extra/clangd/Compiler.h (diff)
The file was modifiedclang-tools-extra/clangd/unittests/ClangdLSPServerTests.cpp (diff)
Commit b5b2c81055cfd0cc6a2a1d1ff2c8017d422586dc by kadircet
[clangd] Propagate data in diagnostics

Differential Revision: https://reviews.llvm.org/D98505
The file was modifiedclang-tools-extra/clangd/Diagnostics.h (diff)
The file was modifiedclang-tools-extra/clangd/refactor/Tweak.h (diff)
The file was modifiedclang-tools-extra/clangd/Protocol.h (diff)
The file was modifiedclang-tools-extra/clangd/Diagnostics.cpp (diff)
The file was modifiedclang-tools-extra/clangd/Protocol.cpp (diff)
Commit 968292cb93198442138128d850fd54dc7edc0035 by yhs
BPF: generate proper BTF for globals with WeakODRLinkage

For a global weak symbol defined as below:
  char g __attribute__((weak)) = 2;
LLVM generates an allocated global with WeakAnyLinkage,
for which BPF backend generates proper BTF info.

For the above example, if a modifier "const" is added like
  const char g __attribute__((weak)) = 2;
LLVM generates an allocated global with WeakODRLinkage,
for which BPF backend didn't generate any BTF as it
didn't handle WeakODRLinkage.

This patch addes support for WeakODRLinkage and proper
BTF info can be generated for weak symbol defined with
"const" modifier.

Differential Revision: https://reviews.llvm.org/D100362
The file was modifiedllvm/lib/Target/BPF/BTFDebug.cpp (diff)
The file was addedllvm/test/CodeGen/BPF/BTF/weak-global-3.ll
Commit 84c52f3a19cb9a822c4a073dede1be1642453a65 by jezng
[lld-macho] arm64_32 executables are always PIE

This should fix the assert that's currently breaking the build.
The file was modifiedlld/MachO/Driver.cpp (diff)
Commit 01ddfa95bd14b35c5706cc5d69fe64b4b60526e3 by dpetrov
[analyzer] [NFC] Eliminate dispatchCast, evalCastFromNonLoc and evalCastFromLoc functions from SValBuilder

Summary: Remove dispatchCast, evalCastFromNonLoc and evalCastFromLoc functions since their functionality has been moved to common evalCast function. Use evalCast instead.

Post-clean up patch for https://reviews.llvm.org/D96090 patch. The patch shall not change any behavior.

Differential Revision: https://reviews.llvm.org/D97277
The file was modifiedclang/lib/StaticAnalyzer/Core/SValBuilder.cpp (diff)
The file was modifiedclang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp (diff)
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h (diff)
Commit f047cb45bd3837d39b0a1bb4262c805ddd4cf1cb by huberjn
[OpenMP] Fix incompatible attributes in OpenMPIRBuilder test.

Summary:
After D98740 the function attributes were changes to append rather than
overwrite when using the values defined in OMPKinds.def. One of the
OpenMPIRBuilder tests erroenously used `readnone` instead of `readonly` which
would cause a conflict and result in a broken module once `readonly` was
appended to it. This patch fixes the test to use the correct attributes.
The file was modifiedllvm/test/Transforms/OpenMP/gpu_state_machine_function_ptr_replacement.ll (diff)
Commit 595c3758e47042c876e7390d09642ea050ba6dbf by gribozavr
Fix the const overload of IgnoreExprNodes

The existing code causes an infinite recursion. This is likely an
oversight of commit c0e5e3fbfa504c37 [1] where the intent must have been
to call the non-const overload.

[1] https://reviews.llvm.org/D87278

Reviewed By: gribozavr2

Differential Revision: https://reviews.llvm.org/D100347
The file was modifiedclang/include/clang/AST/IgnoreExpr.h (diff)
Commit 7ec5907a6c99ae82c795ad5362e12aa48c75bca7 by llvmgnsyncbot
[gn build] Port 8914902b01a3
The file was modifiedllvm/utils/gn/secondary/lld/MachO/BUILD.gn (diff)
Commit 0f24c0118d8c495cbc22a300ea8c29b1a2a84c9f by llvmgnsyncbot
[gn build] Port bb6d96ced80f
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn (diff)
Commit dbc16ed199dce2598f0e49943bf8354ef92a0ecc by eleviant
[GlobalOpt] Revert valgrind hacks

Differential revision: https://reviews.llvm.org/D69428
The file was modifiedllvm/test/ThinLTO/X86/import-constant.ll (diff)
The file was modifiedllvm/test/Transforms/GlobalOpt/2009-11-16-BrokenPerformHeapAllocSRoA.ll (diff)
The file was modifiedllvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users.ll (diff)
The file was modifiedllvm/test/Transforms/GlobalOpt/dead-store-status.ll (diff)
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp (diff)
Commit 7da22dfcd06a2df056f10913dccae8f6b28f79ef by anirudh_prasad
[SystemZ][z/OS] Introduce dialect querying helper functions

- In the SystemZAsmParser, there will be a few queries to the type of dialect it is (AD_ATT, AD_HLASM) in future patches.
- It would be nice to have two small helper functions `isParsingATT()` and `isParsingHLASM()`
- Putting this as a separate smaller patch allows us to remove its definitions from other dependent patches.

Reviewed By: uweigand, abhina.sreeskantharajan

Differential Revision: https://reviews.llvm.org/D99891
The file was modifiedllvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp (diff)
Commit f1a4df542dfbd7479af3b2acf94a36c6cd109fae by eleviant
Remove empty test case
The file was removedllvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users.ll
Commit 6666e0d7a29c639df7a1652b6d3bf16f28edd45a by sivachandra
[libc] Make FPBits a union.

This helps us avoid the uncomfortable reinterpret-casts. Avoiding the
reinterpret casts prevents us from tripping the sanitizers as well.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D100360
The file was modifiedlibc/utils/FPUtil/DivisionAndRemainderOperations.h (diff)
The file was modifiedlibc/utils/FPUtil/TestHelpers.cpp (diff)
The file was modifiedlibc/src/math/generic/fmaf.cpp (diff)
The file was modifiedlibc/utils/FPUtil/TestHelpers.h (diff)
The file was modifiedlibc/test/src/math/sqrt_test.cpp (diff)
The file was modifiedlibc/utils/FPUtil/ManipulationFunctions.h (diff)
The file was modifiedlibc/test/src/math/RoundToIntegerTest.h (diff)
The file was modifiedlibc/utils/FPUtil/BasicOperations.h (diff)
The file was modifiedlibc/utils/MPFRWrapper/MPFRUtils.cpp (diff)
The file was modifiedlibc/test/src/math/LdExpTest.h (diff)
The file was modifiedlibc/fuzzing/math/Compare.h (diff)
The file was modifiedlibc/test/src/math/sqrtf_test.cpp (diff)
The file was modifiedlibc/fuzzing/math/RemQuoDiff.h (diff)
The file was modifiedlibc/utils/FPUtil/NormalFloat.h (diff)
The file was modifiedlibc/utils/FPUtil/NearestIntegerOperations.h (diff)
The file was modifiedlibc/utils/FPUtil/FPBits.h (diff)
The file was modifiedlibc/test/src/math/NextAfterTest.h (diff)
The file was modifiedlibc/utils/FPUtil/NextAfterLongDoubleX86.h (diff)
The file was modifiedlibc/test/src/math/sqrtl_test.cpp (diff)
The file was modifiedlibc/utils/FPUtil/Hypot.h (diff)
The file was modifiedlibc/utils/FPUtil/Sqrt.h (diff)
The file was modifiedlibc/utils/FPUtil/LongDoubleBitsX86.h (diff)
The file was modifiedlibc/utils/FPUtil/SqrtLongDoubleX86.h (diff)
Commit 62328f2f29b432dadbd327ff91ba3914c478e3fc by aaron
Implement WG21 P2156R1/WG14 N2557 on duplicate attributes

These proposals make the same changes to both C++ and C and remove a
restriction on standard attributes appearing multiple times in the same
attribute list.

We could warn on the duplicate attributes, but do not. This is for
consistency as we do not warn on attributes duplicated within the
attribute specifier sequence. If we want to warn on duplicated
standard attributes, we should do so both for both situations:
[[foo, foo]] and [[foo]][[foo]].
The file was modifiedclang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.fallthrough/p1.cpp (diff)
The file was modifiedclang/lib/Parse/ParseDeclCXX.cpp (diff)
The file was modifiedclang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.depend/p1.cpp (diff)
The file was modifiedclang/test/Sema/c2x-nodiscard.c (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td (diff)
The file was modifiedclang/test/SemaCXX/cxx2a-no-unique-address.cpp (diff)
The file was modifiedclang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.noreturn/p1.cpp (diff)
The file was modifiedclang/test/Sema/c2x-fallthrough.c (diff)
The file was modifiedclang/test/Sema/c2x-maybe_unused-errors.c (diff)
The file was modifiedclang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.unused/p1.cpp (diff)
The file was modifiedclang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p1.cpp (diff)
Commit 74f98391a7a42eccd7aa96546892cb9b65a39edb by llvm-dev
[X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits in CMP(MOVMSK(PACKSS())) -> CMP(MOVMSK()) fold

We already allow the comparison of the upper bits of 'IsAllOf' (allbits) patterns, but we can safely compare the known zero bits for 'IsAnyOf' (zerobits) patterns as well.

This fixes an issues where we are comparing a type wide than the number of vector elements, which avoids a regression mentioned in rGbaadbe04bf75.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-compare-all_of.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-compare-any_of.ll (diff)
Commit 8ca366935b055283b571ba0893f53a7a18ac59bb by jezng
Revert "[lld-macho] Add support for arm64_32" and other stacked diffs

This reverts commits:
* 8914902b01a3f8bdea9c71a0d9d23e4ee0ae80e4
* 35a745d814e1cde3de25d0d959fddc31e1061a41
* 682d1dfe09436857aa3b64365b5cc6fcbf1f043b
The file was modifiedlld/MachO/Target.h (diff)
The file was modifiedlld/MachO/UnwindInfoSection.h (diff)
The file was modifiedlld/MachO/UnwindInfoSection.cpp (diff)
The file was modifiedlld/MachO/Driver.cpp (diff)
The file was modifiedlld/test/MachO/lit.local.cfg (diff)
The file was modifiedlld/test/MachO/segments.s (diff)
The file was modifiedlld/MachO/Relocations.h (diff)
The file was removedlld/test/MachO/arm64-32-stubs.s
The file was modifiedlld/MachO/Arch/ARM64.cpp (diff)
The file was modifiedlld/MachO/CMakeLists.txt (diff)
The file was modifiedlld/MachO/Writer.cpp (diff)
The file was removedlld/MachO/Arch/ARM64Common.h
The file was removedlld/MachO/Arch/ARM64_32.cpp
The file was removedlld/test/MachO/Inputs/WatchOS.sdk/usr/lib/libc++abi.tbd
The file was removedlld/test/MachO/Inputs/WatchOS.sdk/usr/lib/libSystem.tbd
The file was removedlld/MachO/Arch/ARM64Common.cpp
The file was removedlld/test/MachO/Inputs/WatchOS.sdk/usr/lib/libc++.tbd
The file was modifiedlld/MachO/SyntheticSections.h (diff)
The file was modifiedlld/test/MachO/header.s (diff)
The file was modifiedlld/test/MachO/compact-unwind.s (diff)
The file was removedlld/test/MachO/arm64-32-reloc-got-load.s
The file was modifiedlld/MachO/MachOStructs.h (diff)
Commit f34ef248d37456b9978d88eee4b349076e2798a1 by mtrofin
[mlgo] Skip AOT-compiling a model if a header/object pair is provided

This allows one to cross-compile the header/object for a model in a
setup where the compiler is built on a system that cannot host the AOT
compiler. For example, if arm-hostable clang is desired, while the AOT
Tensorflow compiler can cross-compile to arm, it can't currently run on
arm.

The only alternative in that scenario would be to cross-compile clang
itself, but that gets complicated when trying to run tests after that.

Differential Revision: https://reviews.llvm.org/D99992
The file was modifiedllvm/cmake/modules/TensorFlowCompile.cmake (diff)
Commit 8a5af9e28443ce8290388439f9e36cf2727d7761 by Jonas Devlieghere
[debugserver] Fix unintialized member variable

Caught by ubsan (__ubsan_handle_load_invalid_value_abort) when running
the unit tests.
The file was modifiedlldb/tools/debugserver/source/RNBContext.h (diff)
Commit f1812a284f28e5b142e63d5deeb340be3ca5d4b3 by mgorny
[lldb] [gdb-remote server] Abstract away getting current process

Introduce new m_current_process and m_continue_process variables that
keep the pointers to currently selected process.  At this moment, this
is equivalent to m_debugged_process_up but it lays foundations for
the future multiprocess support.

Differential Revision: https://reviews.llvm.org/D100256
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h (diff)
Commit 53d474abc92c42bed5d0cab5c79ee9ea5666aad1 by tianshilei1992
[Clang][OpenMP][NVPTX] Fixed failure in openmp-offload-gpu.c if the system has CUDA

https://lists.llvm.org/pipermail/openmp-dev/2021-March/003940.html reports
test failure in `openmp-offload-gpu.c`. The failure is, when using `-S` in the
clang driver, it still reports bitcode library doesn't exist. However, it is not
exposed in my local run and Phabiractor test. The reason it escaped from Phabricator
test is, the test machine doesn't have CUDA, so `LibDeviceFile` is empty. In this
case, the check of `OPT_S` will be hit, and we get "expected" result. However, if
the test machine has CUDA, `LibDeviceFile` will not be empty, then the check will
not be done, and it just proceeds, trying to add the bitcode library. The reason
it escaped from my local run is, I didn't build ALL targets, so this case was
marked UNSUPPORTED.

Reviewed By: kkwli0

Differential Revision: https://reviews.llvm.org/D98902
The file was modifiedclang/lib/Driver/ToolChains/Cuda.cpp (diff)
Commit 6bdaf5e3413f74b88898d9524fede3b0573ba083 by listmail
Remove a -O2 usage from a CSE specific test file

Given this is checking attributes, there are a bunch of valid ways that O2 can infer attributes that CSE will not.
The file was modifiedllvm/test/Other/invariant.group.ll (diff)
Commit ae8a5c68523c1d23dec721e28f89084d6561522a by Jonas Devlieghere
[debugserver] Use class member initialization for RNBContext

Address Shafik Yaghmour's post commit code review feedback.
The file was modifiedlldb/tools/debugserver/source/RNBContext.h (diff)
Commit 423024904825d147c69e8999537b6b813bc24999 by mascasa
[libFuzzer] Fix MSan false positives with custom mutators.

We need to unpoison parameters before calling into MSan-instrumented
user-defined mutators.

Addresses https://github.com/google/oss-fuzz/issues/4605.

Reviewed By: metzman

Differential Revision: https://reviews.llvm.org/D100355
The file was modifiedcompiler-rt/lib/fuzzer/FuzzerMutate.cpp (diff)
The file was addedcompiler-rt/test/fuzzer/msan-custom-mutator.test
The file was addedcompiler-rt/test/fuzzer/MsanCustomMutator.cpp
Commit bef63dc88a0a8e9294519140279de941996c96c8 by psteinfeld
[flang] Handle instantiation of procedure pointer components

We were not instantiating procedure pointer components.  If the instantiation
contained errors, we were not reporting them.  This resulted in internal errors
in later processing.

I fixed this by adding code in .../lib/Semantics/type.cpp in
InstantiateComponent() to handle a component with ProcEntityDetails.  I also
added several tests for various good and bad instantiations of procedure
pointer components.

Differential Revision: https://reviews.llvm.org/D100341
The file was modifiedflang/lib/Semantics/type.cpp (diff)
The file was addedflang/test/Semantics/resolve105.f90
Commit 1e0b813fc0825b5ca0d70376be83a660a242c51b by asbirlea
[MemorySSA] Add test for PR49859.
The file was addedllvm/test/Analysis/MemorySSA/pr49859.ll
Commit 162b463d85d3b6d253479b2b3b87fca786e61258 by arnamoy10
[flang][OpenMP] Modify semantic check for nesting of `ordered` regions to include `close` nesting check.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D100222
The file was modifiedflang/test/Semantics/omp-ordered-simd.f90 (diff)
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp (diff)
Commit 516d09387bede5369b2811f56020ed2d316403dd by Jessica Paquette
[AArch64][GlobalISel] Mark G_CTPOP as legal for v16s8 and v8s8

G_CTPOP can be directly selected to CNT in these cases.

Differential Revision: https://reviews.llvm.org/D100349
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir (diff)
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-ctpop.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
Commit 1afdfc6169bead84f9cbc5dc732b0afa3297f5df by craig.topper
[RISCV] Rename RISCVISD::GREVI(W)/GORCI(W) to RISCVISD::GREV(W)/GORC(W). Don't require second operand to be a constant.

Prep work for adding intrinsics for these instructions in the
future.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h (diff)
Commit 701d70d4c25c4e02b303ba6dee1495708496f615 by aaron
String Literal and Wide String Literal Encoding from the Preprocessor

Adds the __clang_literal_encoding__ and __clang_wide_literal_encoding__
predefined macros to expose the encoding used for string literals to
the preprocessor.
The file was modifiedclang/test/Preprocessor/init-x86.c (diff)
The file was modifiedclang/docs/LanguageExtensions.rst (diff)
The file was modifiedclang/lib/Frontend/InitPreprocessor.cpp (diff)
The file was modifiedclang/test/Preprocessor/init.c (diff)
Commit faf9f11589ce892b31d271917cf840f8ca903221 by nikita.ppv
[SCEV] Don't walk uses of phis without SCEV expression when forgetting

I've run into some cases where a large fraction of compile-time is
spent invalidating SCEV. One of the causes is forgetLoop(), which
walks all values that are def-use reachable from the loop header
phis. When invalidating a topmost loop, that might be close to all
values in a function. Additionally, it's fairly common for there to
not actually be anything to invalidate, but we'll still be performing
this walk again and again.

My first thought was that we don't need to continue walking the uses
if the current value doesn't have a SCEV expression. However, this
isn't quite right, because SCEV construction can skip over values
(e.g. for a chain of adds, we might only create a SCEV expression
for the final value).

What this patch does instead is to only walk the (full) def-use chain
of loop phis that have a SCEV expression. If there's no expression
for a phi, then we also don't have any dependent expressions to
invalidate.

Differential Revision: https://reviews.llvm.org/D100264
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h (diff)
Commit 9b8e7a9d7dc7e3d2ae584b57ee9485fd94bda0c9 by Lang Hames
[lli] Honor the --entry-function flag in orc and orc-lazy modes.

Fixes https://llvm.org/PR49906.
The file was modifiedllvm/tools/lli/lli.cpp (diff)
Commit b351590baed5472a0def984d9bb0b035cc1ae93c by mascasa
[libFuzzer] Fix fuzzer-oom.test.

SinkPtr was not correctly marked as volatile, causing the malloc to get
optimized out.  This was causing 20-minute timeouts for the test and no
OOM.
The file was modifiedcompiler-rt/test/fuzzer/OutOfMemoryTest.cpp (diff)
The file was modifiedcompiler-rt/test/fuzzer/OutOfMemorySingleLargeMallocTest.cpp (diff)
Commit a285bdb56fb47a05281afdcb84d96c1fa3da63c1 by yhs
BPF: remove default .extern data section

Currently, for any extern variable, if it doesn't have
section attribution, it will be put into a default ".extern"
btf DataSec. The initial design is to put every extern
variable in a DataSec so libbpf can use it.

But later on, libbpf actually requires extern variables
to put into special sections, e.g., ".kconfig", ".ksyms", etc.
so they can be used properly based on section name.

Andrii mentioned since ".extern" variables are
not actually used, it makes sense to remove it from
the compiler so libbpf does not need to deal with it,
esp. for static linking. The BTF for these extern variables
is still generated.

With this patch, I tested kernel selftests/bpf and all tests
passed. Indeed, removing ".extern" DataSec seems having no
impact.

Differential Revision: https://reviews.llvm.org/D100392
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-struct.ll (diff)
The file was modifiedllvm/lib/Target/BPF/BTFDebug.cpp (diff)
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-struct-weak.ll (diff)
Commit 31ed45d9cfd5da2bf4f1d7ddba54122df6fc91fa by sivachandra
[libc][Obvious] Fix nextafter* implementation.

It broke when FPBits was converted to a union.
The file was modifiedlibc/utils/FPUtil/ManipulationFunctions.h (diff)
Commit 46b8ea2fff90b44b7ae558999721cf30f9b83aa9 by lebedev.ri
[clang-tidy] Add check for implicit widening of multiplication result

Overflows are never fun.
In most cases (in most of the code), they are rare,
because usually you e.g. don't have as many elements.

However, it's exceptionally easy to fall into this pitfail
in code that deals with images, because, assuming 4-channel 32-bit FP data,
you need *just* ~269 megapixel image to case an overflow
when computing at least the total byte count.

In [[ https://github.com/darktable-org/darktable | darktable ]], there is a *long*, painful history of dealing with such bugs:
* https://github.com/darktable-org/darktable/pull/7740
* https://github.com/darktable-org/darktable/pull/7419
* https://github.com/darktable-org/darktable/commit/eea1989f2c9fa76710db07baaec4c19c1e40e81c
* https://github.com/darktable-org/darktable/commit/70626dd95bf0fab36f2d011dab075e3ebbf7aa28
* https://github.com/darktable-org/darktable/pull/670
* https://github.com/darktable-org/darktable/commit/38c69fb1b2bc90057c569242cb9945a10be0b583

and yet they clearly keep resurfacing still.

It would be immensely helpful to have a diagnostic for those patterns,
which is what this change proposes.

Currently, i only diagnose the most obvious case, where multiplication
is directly widened with no other expressions inbetween,
(i.e. `long r = (int)a * (int)b` but not even e.g. `long r = ((int)a * (int)b)`)
however that might be worth relaxing later.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D93822
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-implicit-widening-of-multiplication-result-pointer-offset.cpp
The file was addedclang-tools-extra/clang-tidy/bugprone/ImplicitWideningOfMultiplicationResultCheck.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-implicit-widening-of-multiplication-result-char.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-implicit-widening-of-multiplication-result-int.cpp
The file was addedclang-tools-extra/clang-tidy/bugprone/ImplicitWideningOfMultiplicationResultCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp (diff)
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-implicit-widening-of-multiplication-result-short.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst (diff)
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst (diff)
The file was addedclang-tools-extra/docs/clang-tidy/checks/bugprone-implicit-widening-of-multiplication-result.rst
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-implicit-widening-of-multiplication-result-array-subscript-expression.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp (diff)
The file was modifiedclang/include/clang/AST/ASTContext.h (diff)
The file was modifiedclang-tools-extra/clang-tidy/bugprone/CMakeLists.txt (diff)
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-implicit-widening-of-multiplication-result-extint.cpp
Commit 8a316b00d63d5370e4f75d482e12d62b54c64308 by ezhulenev
[mlir] Convert async dialect passes from function passes to op agnostic passes

Differential Revision: https://reviews.llvm.org/D100401
The file was modifiedmlir/lib/Dialect/Async/Transforms/AsyncRuntimeRefCounting.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/Async/Passes.td (diff)
The file was modifiedmlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp (diff)
The file was modifiedmlir/lib/Dialect/Async/Transforms/AsyncRuntimeRefCountingOpt.cpp (diff)
The file was modifiedmlir/test/Integration/GPU/CUDA/async.mlir (diff)
The file was modifiedmlir/include/mlir/Dialect/Async/Passes.h (diff)
Commit 84cf9a7a4af6f74909216259681d301b7641635c by jezng
[lld-macho] rm old test directory for segments.s

This should unbreak incremental builds after https://github.com/llvm/llvm-project/commit/8ca366935b055283b571ba0893f53a7a18ac59bb
The file was modifiedlld/test/MachO/segments.s (diff)
Commit d13c6ce5dbd73ed8fa93316b012426c201a04283 by llvmgnsyncbot
[gn build] Port 46b8ea2fff90
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn (diff)
Commit 961967453a6d7e92bf7d6a32b3409f6a326c22ca by llvmgnsyncbot
[gn build] Port 8ca366935b05
The file was modifiedllvm/utils/gn/secondary/lld/MachO/BUILD.gn (diff)
Commit 4c0bc69490a57f2f8f9ede948e6d66cc0900879a by Dan Liew
Ship `llvm-cxxfilt` in the toolchain.

Originally done for rdar://problem/57155465.

rdar://76602859

Differential Revision: https://reviews.llvm.org/D100405
The file was modifiedclang/cmake/caches/Apple-stage2.cmake (diff)
Commit cb073f1bc0b96f5fb1f9532b737a990aa351d1c4 by craig.topper
[RISCV] Make use of PatGprGpr and PatGpr in RISCVInstrInfoB.td. NFC
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td (diff)
Commit 6aa6f748ae9dbddeaf4d06e65f84fe933eb15ac4 by craig.topper
[RISCV] Add a generic PatGprImm class and use it to simplify patterns in RISCVInstrInfoB.td. NFC
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td (diff)
Commit c058a7122787c8e503cf6306b8da03c0e56a41a5 by aaron
Correct the tablegen for checking mutually exclusive stmt attrs

The previous implementation was insufficient for checking statement
attribute mutual exclusion because attributed statements do not collect
their attributes one-at-a-time in the same way that declarations do. So
the design that was attempting to check for mutual exclusion as each
attribute was processed would not ever catch a mutual exclusion in a
statement. This was missed due to insufficient test coverage, which has
now been added for the [[likely]] and [[unlikely]] attributes.

The new approach is to check all of attributes that are to be applied
to the attributed statement in a group. This required generating
another DiagnoseMutualExclusions() function into AttrParsedAttrImpl.inc.
The file was modifiedclang/include/clang/Sema/ParsedAttr.h (diff)
The file was modifiedclang/lib/Sema/ParsedAttr.cpp (diff)
The file was modifiedclang/test/SemaCXX/attr-likelihood.cpp (diff)
The file was modifiedclang/lib/Sema/SemaStmtAttr.cpp (diff)
The file was modifiedclang/utils/TableGen/ClangAttrEmitter.cpp (diff)
The file was modifiedclang/lib/Sema/SemaDecl.cpp (diff)
Commit 6ddd8c28b787b50a37df84890563d46dbfc3a81c by anirudh_prasad
[AsmParser][SystemZ][z/OS] Add support to AsmLexer to accept HLASM style integers

- Add support for HLASM style integers. These are the decimal integers [0-9].
- HLASM does not support the additional prefixed integers like, `0b`, `0x`, octal integers and Masm style integers.
- To achieve this, a field `LexHLASMStyleIntegers` (similar to the `LexMasmStyleIntegers` field) is introduced in `MCAsmLexer.h` as well as a corresponding setter.

Note: This field could also go into MCAsmInfo.h. I used the previous precedent set by the `LexMasmIntegers` field.

Depends on https://reviews.llvm.org/D99286

Reviewed By: epastor

Differential Revision: https://reviews.llvm.org/D99374
The file was modifiedllvm/lib/MC/MCParser/AsmLexer.cpp (diff)
The file was modifiedllvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp (diff)
The file was modifiedllvm/include/llvm/MC/MCParser/MCAsmLexer.h (diff)
Commit 5b15fe9334b802b928f2f6cfedde31bb8cba72ee by antiagainst
[mlir][spirv] Only attach struct offset for required storage classes

Per the SPIR-V spec "2.16.2. Validation Rules for Shader Capabilities":

  Composite objects in the StorageBuffer, PhysicalStorageBuffer,
  Uniform, and PushConstant Storage Classes must be explicitly
  laid out.

For other cases we don't need to attach the struct offsets.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D100386
The file was modifiedmlir/test/Conversion/GPUToSPIRV/module-structure-opencl.mlir (diff)
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp (diff)
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-types-to-spirv.mlir (diff)
Commit 64c24f493e5f4637ee193f10f469cdd2695b4ba6 by aaron
Remove warning "suggest braces" for aggregate initialization of an empty class with an aggregate base class.

I recently ran into issues with aggregates and inheritance, I'm using
it for creating a type-safe library where most of the types are build
over "tagged" std::array. After bit of cleaning and enabling -Wall
-Wextra -pedantic I noticed clang only in my pipeline gives me warning.
After a bit of focusing on it I found it's not helpful, and contemplate
disabling the warning all together. After a discussion with other
library authors I found it's bothering more people and decided to fix
it.

Removes this warning:

template<typename T, int N> struct StdArray {
    T contents[N];
  };

template<typename T, int N> struct AggregateAndEmpty : StdArray<T,N> { };

AggregateAndEmpty<int, 3> p = {1, 2, 3}; // <-- warning here about omitted braces
The file was modifiedclang/lib/Sema/SemaInit.cpp (diff)
The file was modifiedclang/test/SemaCXX/aggregate-initialization.cpp (diff)
Commit 204aaf879548616df407f662bc03d28b8d08d1fb by sander.desmalen
[AArch64][SVE] Always use overloaded methods instead of preprocessor macro.

This fixes a subtle issue where:

  svprf(pg, ptr, SV_ALL /*is sv_pattern instead of sv_prfop*/)

would be quietly accepted. With this change, the function declaration
guards that the third parameter is a `enum sv_prfop`. Previously `svprf`
would map directly to `__builtin_sve_svprfb`, which accepts the enum
operand as a signed integer and only checks that the incoming range is
valid, meaning that SV_ALL would be discarded as being outside the valid
immediate range, but would have allowed SV_VL1 without issuing a warning
(C) or error (C++).

Reviewed By: c-rhodes

Differential Revision: https://reviews.llvm.org/D100297
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfh.c (diff)
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfw.c (diff)
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfb.c (diff)
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfd.c (diff)
The file was modifiedclang/utils/TableGen/SveEmitter.cpp (diff)
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecb.c (diff)
Commit 7e1fb9a0d2d731e21f845bf9c14db6df1047f991 by rob.suderman
[mlir][tosa] Add conv2d lowering to linalg.conv2d operator for FP

Handles lowering conv2d to linalg's convolution operator. This implementation
only supports floating point values but handles all strides, dilations, and
padding values.

Differential Revision: https://reviews.llvm.org/D100061
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp (diff)
The file was modifiedmlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir (diff)
Commit 192c6023e1e2f31284752d17846401158445f42d by artur.gainullin
[Driver] Make the findVCToolChainViaEnvironment case-insensitive

PATH usage on Windows is case-insensitive. There could be situations
when toolchain path can't be obtained from PATH because of
case-sensitivity of the findVCToolChainViaEnvironment.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D100361
The file was modifiedclang/lib/Driver/ToolChains/MSVC.cpp (diff)
Commit be50657c6ac534215b2cef562e2a29197259ec85 by daniel_l_sanders
[TableGen] Resolve concrete but not complete field access initializers

This fixes the resolution of Rec10.Zero in ListSlices.td.

As part of this, correct the definition of complete for ListInit such that
it's complete iff all the elements in the list are complete rather than
always being complete regardless of the elements. This is the reason
Rec10.TwoFive from ListSlices.td previously resolved despite being
incomplete like Rec10.Zero was

Depends on D100247

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D100253
The file was modifiedllvm/lib/TableGen/Record.cpp (diff)
The file was modifiedllvm/test/TableGen/ListSlices.td (diff)
The file was modifiedllvm/include/llvm/TableGen/Record.h (diff)
The file was modifiedllvm/test/TableGen/field-access-initializers.td (diff)
Commit f56791ae2ea081636d0fc1dd3b1b44865145c7cb by sergei.grechanik
[mlir] Prevent operations with users from being hoisted

This patch collects operations that have users in a for loop and uses
them  when loop invariant operations are detected and hoisted.

Reviewed By: bondhugula, vinayaka-polymage

Differential Revision: https://reviews.llvm.org/D99761
The file was modifiedmlir/lib/Dialect/Affine/Transforms/AffineLoopInvariantCodeMotion.cpp (diff)
The file was modifiedmlir/test/Dialect/Affine/affine-loop-invariant-code-motion.mlir (diff)
Commit 645ce31c200423c546e96eddaf3e399471738103 by root
Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (diff)
The file was addedmypatch.patch
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoV.td (diff)
The file was modifiedllvm/test/MC/RISCV/rvv/invalid.s (diff)
The file was modifiedllvm/test/MC/RISCV/rvv/compare.s (diff)
Commit d7297a736caf5c003f898e4aab43bf1ae96507d4 by root
Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115
The file was removedmypatch.patch
Commit 4d9ccb18f50803a1aa9c0332dc72472bdfec8bc4 by root
Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115
The file was removed.clang-format
Commit f4ecd5a128dc74d7048711d07a658d1b91c8251f by pklausler
[flang] More precise enforcement of runtime constraint

An OPEN statement that affects an already connected unit
without changing its external file is required to have
STATUS="OLD" or default STATUS=.  The code was eliciting
spurious runtime errors in situations where an OPEN statement
pertained to an existing unit number but did not need to have
STATUS="OLD'.

Differential Revision: https://reviews.llvm.org/D100352
The file was modifiedflang/runtime/unit.cpp (diff)
The file was modifiedflang/runtime/unit.h (diff)
The file was modifiedflang/runtime/io-stmt.cpp (diff)
Commit 69545154cc28a0a7f813174253c6cb428666eb3a by bikineev
[Sema] Move 'char-expression-as-unsigned < 0' into a separate diagnostic

This change splits '-Wtautological-unsigned-zero-compare' by reporting
char-expressions-interpreted-as-unsigned under a separate diagnostic
'-Wtautological-unsigned-char-zero-compare'. This is beneficial for
projects that want to enable '-Wtautological-unsigned-zero-compare' but at
the same time want to keep code portable for platforms with char being
signed or unsigned, such as Chromium.

Differential Revision: https://reviews.llvm.org/D99808
The file was modifiedclang/lib/Sema/SemaChecking.cpp (diff)
The file was addedclang/test/Sema/tautological-unsigned-char-zero-compare.cc
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td (diff)
Commit bcef28621a877805a17be2e36ddb35c4aca6609d by stilis
Fix resolution-err.ll

chmod tries to be very helpful on some platforms and prevent naive mistakes, by warning the user. This results in the following error during the test:

```chmod: ...resolution-err.ll.tmp.resolution.txt: new permissions are r--rw-rw-, not r--r--r--```

To fix the test, call chmod with u.

Differential Revision: https://reviews.llvm.org/D100417
The file was modifiedlld/test/ELF/lto/resolution-err.ll (diff)
Commit ac955452ab2ab853900b2d2707243a41f8f8204d by hoy
[CSSPGO] Fix a test issue due to portablity of std::hash

As a follow-up to D99815, this patch enables the test by using a DAG order instead of a sequential order to mitigate the platform portability issue due to `std:: _Hash_bytes`.

Reviewed By: wenlei, jsji

Differential Revision: https://reviews.llvm.org/D100351
The file was modifiedllvm/test/Transforms/SampleProfile/profile-context-tracker-debug.ll (diff)
Commit eff067440e789317664dc2051df838cedd889bea by arjunpitchanathan
[MLIR] PresburgerSet subtraction: add documentation and assertion saying we don't support divisions yet

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D100324
The file was modifiedmlir/include/mlir/Analysis/PresburgerSet.h (diff)
The file was modifiedmlir/lib/Analysis/PresburgerSet.cpp (diff)
Commit 3f4c1e13bca1bd0f78420bfec6b6f6e1de2d491a by springerm
[mlir] Fix return values of AMX tests

Differential Revision: https://reviews.llvm.org/D100422
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-ext.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero-block.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf.mlir (diff)
Commit 32e264921b7a683a0bf797c91c60344c8500aac2 by saugustine
Revert "[GlobalOpt] Revert valgrind hacks"

This reverts commit dbc16ed199dce2598f0e49943bf8354ef92a0ecc.
The file was modifiedllvm/test/ThinLTO/X86/import-constant.ll (diff)
The file was modifiedllvm/test/Transforms/GlobalOpt/dead-store-status.ll (diff)
The file was addedllvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users.ll
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp (diff)
The file was modifiedllvm/test/Transforms/GlobalOpt/2009-11-16-BrokenPerformHeapAllocSRoA.ll (diff)
Commit 0148bf53f0a0b533eb742a7c8005a40328c48d66 by nemanja.i.ibm
[PowerPC] Use correct node to get a super register from a subreg

The VSX tablegen file has some rather eggregious uses of
COPY_TO_REGCLASS even in situations where it needs to use
SUBREG_TO_REG. While this produces correct code, it often doesn't
allow the register coalescer to coalesce copies and the resulting
code ends up being suboptimal. This patch just changes over
patterns that should use SUBREG_TO_REG.
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict-round.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/pre-inc-disable.ll (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td (diff)
Commit 0f0149b8d3be865d40110780edd79882dfb1dabe by zoecarver
[libc++][docs] Add status docs for ranges.

The added documents have two tables: 1 containing links to issues and papers related to ranges. And the other contains most of the sections from the One Ranges Proposal, with their dependencies linked. This will allow us to assign work that can be done in parallel.

Differential Revision: https://reviews.llvm.org/D100393
The file was modifiedlibcxx/docs/index.rst (diff)
The file was addedlibcxx/docs/RangesStatus.rst
The file was addedlibcxx/docs/RangesIssuePaperStatus.csv
The file was addedlibcxx/docs/OneRangesProposalStatus.csv
Commit 5c500c9f01aacc0d921db99681c3dc9c4078938c by mcgrathr
[scudo] Make MTE inline asm compatible with GNU assembler

The GNU assembler can't parse `.arch_extension ...` before a `;`.
So instead uniformly use raw string syntax with separate lines
instead of `;` separators in the assembly code.

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D100413
The file was modifiedcompiler-rt/lib/scudo/standalone/memtag.h (diff)
Commit d5e962f1f20c3e441b36785c572432000c80a728 by shihpo.hung
[RISCV] Implement COPY for Zvlsseg registers

When copying Zvlsseg register tuples, we split the COPY to NF whole register moves
as below:

  $v10m2_v12m2 = COPY $v4m2_v6m2 # NF = 2
=>
  $v10m2 = PseudoVMV2R_V $v4m2
  $v12m2 = PseudoVMV2R_V $v6m2

This patch copies forwardCopyWillClobberTuple from AArch64 to check
register overlapping.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D100280
The file was addedllvm/test/CodeGen/RISCV/rvv/zvlsseg-copy.mir
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp (diff)
Commit 479b672ff9a9230dee37fad97413a88bc0ab362b by Jonas Devlieghere
[lldb] Pretend host architecture is arm64 on AS

The arm64e architecture is a preview. On Apple Silicon, pretend the host
architecture is arm64.
The file was modifiedlldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm (diff)
The file was modifiedllvm/lib/Analysis/Loads.cpp (diff)
Commit 597207a3c3d7774194dbb99d4853f65bf0b84a1e by joker.eph
Expose parseXInDimensionList() to the `DialectAsmParser`

This allows custom types and attribute to parse a dimension list that
isn't necessarily terminated with `xtype`, for example something like:

#tf.shape<4x5>

Differential Revision: https://reviews.llvm.org/D100432
The file was modifiedmlir/lib/Parser/DialectSymbolParser.cpp (diff)
The file was modifiedmlir/include/mlir/IR/DialectImplementation.h (diff)
Commit a3b52a9d13a3c0986f4d3ca74f5e9afdb086a8a4 by pengfei.wang
[X86][AMX] Refactor for PostRA ldtilecfg pass.

This is a follow up of D99010. We didn't consider the live range of shape registers when hoist ldtilecfg. There maybe risks, e.g. we happen to insert it to an invalid range of some registers and get unexpected error.

This patch fixes this problem by storing the value to corresponding stack place of ldtilecfg after all its definition immediately.

This patch also fix a problem in previous code: If we don't have a ldtilecfg which dominates all AMX instructions, we cannot initialize shapes for other ldtilecfg.

There're still some optimization points left. E.g. eliminate unused mov instructions, break the def-use dependency before RA etc.

Reviewed By: LuoYuanke, xiangzhangllvm

Differential Revision: https://reviews.llvm.org/D99966
The file was modifiedllvm/lib/Target/X86/X86TileConfig.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-spill-merge.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-across-func.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-spill.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-config.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86PreTileConfig.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll (diff)
Commit e825effe9ba98c81c9c1799f58e3a7a43e887b38 by Jonas Devlieghere
[lldb] Build debugserver 2-way fat on AS

When compiling for arm, build debugserver 2 way fat with an arm64 and
arm64e slice. You can only debug arm64e processes using an arm64e
debugserver.
The file was modifiedlldb/tools/debugserver/source/CMakeLists.txt (diff)
Commit accb0955129d94636280cbd713c905b2189e30d4 by Jonas Devlieghere
[lldb] Disable TestClangModulesUpdate.py because it's flaky

The test is failing intermittently on GreenDragon.

rdar://76540904
The file was modifiedlldb/test/API/lang/objc/modules-update/TestClangModulesUpdate.py (diff)
Commit d5ed0d4816fee73cb508cbb68be2444412093af7 by serguei.katkov
[Live Intervals] Factor-out unionBitMask. NFC.

For further re-usage in other place.
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp (diff)
Commit 91b6ef64db55084b33295e640258c926acedcb1a by minyihh
[M68k] Put M68kInfo as the direct library dependency for AsmParser

M68kAsmParser uses `llvm::getTheM68kTarget` from M68kInfo, therefore we
should put M68kInfo as its direct dependency. Otherwise the build will
fail when building LLVM libraries as shared objects (building LLVM
libraries statically won't have this problem though).
The file was modifiedllvm/lib/Target/M68k/AsmParser/CMakeLists.txt (diff)
Commit d9b03ef2e899719bb6cbffa738b9c76d45f45cf5 by hanchung
[mlir][StandardToSPIRV] Add support for lowering math.powf to SPIR-V.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D100403
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp (diff)
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir (diff)
Commit 02265ed7ad27c9bd061b26b0ec6f2232a78097cf by serguei.katkov
[Live Intervals] Teach Greedy RA to recognize special case live-through

Statepoint instruction has a deopt section which is actually live-through the call.
Currently this is handled by special post pass after RA - fixup-statepoint-caller-saved.

This change teaches Greedy RA that if segment of live interval is ended with statepoint
instruction and its reg is used in deopt bundle then this live interval interferes regmask of this statepoint
and as a result caller-saved register cannot be assigned to this live interval.

Reviewers: reames, dantrushin
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D100296
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/statepoint-regs.ll (diff)
Commit cbc9c4ea90e17980b7b65966f4bbdba26a395e45 by zeratul976
[clangd] Add support for inline parameter hints

Differential Revision: https://reviews.llvm.org/D98748
The file was modifiedclang-tools-extra/clangd/Protocol.h (diff)
The file was modifiedclang-tools-extra/clangd/Protocol.cpp (diff)
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp (diff)
The file was modifiedclang-tools-extra/clangd/test/initialize-params.test (diff)
The file was modifiedclang-tools-extra/clangd/CMakeLists.txt (diff)
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/CMakeLists.txt (diff)
The file was addedclang-tools-extra/clangd/InlayHints.h
The file was modifiedclang-tools-extra/clangd/ClangdServer.h (diff)
The file was addedclang-tools-extra/clangd/unittests/InlayHintTests.cpp
The file was addedclang-tools-extra/clangd/InlayHints.cpp
The file was modifiedclang-tools-extra/clangd/XRefs.cpp (diff)
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.h (diff)
Commit 905292067653cecf80475287a82ddb0cc36e03d9 by llvmgnsyncbot
[gn build] Port cbc9c4ea90e1
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn (diff)
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn (diff)
Commit e1e2c9d40460db6eb25e772839c08003a89d0a6c by harald
Revert "Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115"

This reverts commit 4d9ccb18f50803a1aa9c0332dc72472bdfec8bc4.
The file was added.clang-format
Commit 184377da5c7ce624adf09341360c6cf8f31ebe8f by pengfei.wang
[LLD] Implement /guard:[no]ehcont

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D99078
The file was modifiedlld/COFF/DriverUtils.cpp (diff)
The file was modifiedlld/test/COFF/gfids-corrupt.s (diff)
The file was modifiedllvm/include/llvm/Object/COFF.h (diff)
The file was modifiedlld/test/COFF/gfids-icf.s (diff)
The file was modifiedllvm/tools/llvm-readobj/COFFDumper.cpp (diff)
The file was modifiedlld/test/COFF/giats.s (diff)
The file was modifiedlld/test/COFF/guard-longjmp.s (diff)
The file was modifiedlld/COFF/Chunks.h (diff)
The file was modifiedlld/COFF/Config.h (diff)
The file was addedlld/test/COFF/guard-ehcont.s
The file was modifiedlld/test/COFF/gfids-gc.s (diff)
The file was modifiedlld/test/COFF/gfids-fallback.s (diff)
The file was modifiedlld/COFF/Writer.cpp (diff)
The file was modifiedlld/COFF/InputFiles.cpp (diff)
The file was modifiedlld/test/COFF/guardcf-lto.ll (diff)
The file was modifiedlld/COFF/Chunks.cpp (diff)
The file was modifiedlld/COFF/InputFiles.h (diff)
The file was modifiedlld/COFF/Driver.cpp (diff)
Commit 0acf4e500529447ba34b8d9152630c8535d17949 by kadircet
[NFC] Fix unused warning.

Differential Revision: https://reviews.llvm.org/D100449
The file was modifiedllvm/lib/Target/X86/X86TileConfig.cpp (diff)
Commit 09d1f6e6b74c9330d80c0346a271a43efbe0384d by Jan Svoboda
[clang] Fix copy constructor of CompilerInvocation

The `CompilerInvocationBase` class factors out members of `CompilerInvocation` that need special handling (initialization or copy constructor), so that `CompilerInvocation` can be implemented as a simple value object.

Currently, the `AnalyzerOpts` member of `CompilerInvocation` violates that setup. This patch extracts the member to `CompilerInvocationBase` and handles it in the copy constructor the same way other it handles other members.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D99568
The file was modifiedclang/unittests/Frontend/CompilerInvocationTest.cpp (diff)
The file was modifiedclang/include/clang/Frontend/CompilerInvocation.h (diff)
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp (diff)
Commit 530456caf9088b8eb237c0ab75086722ce0f2950 by 1.int32
[clang-tidy] Add new check 'bugprone-unhandled-exception-at-new'.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D97196
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-unhandled-exception-at-new.cpp
The file was addedclang-tools-extra/clang-tidy/bugprone/UnhandledExceptionAtNewCheck.h
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst (diff)
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst (diff)
The file was addedclang-tools-extra/docs/clang-tidy/checks/bugprone-unhandled-exception-at-new.rst
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp (diff)
The file was modifiedclang-tools-extra/clang-tidy/bugprone/CMakeLists.txt (diff)
The file was addedclang-tools-extra/clang-tidy/bugprone/UnhandledExceptionAtNewCheck.cpp
Commit cf0d3477aaf5c1d1b11685b852863006fb2d8d9d by serguei.katkov
[GreedyRA ORE] Separate Folder Reloads and Zero Cost Folder Reloads

Patchpoint instructions have operands which is actually zero cost
(or the same as register) to use the value from the stack.
In terms of statistic it makes same to separate them.

Move from computation instructions related to stack spill/reload to
number of stack slot referenced.

Reviewers: reames, MatzeB, anemet, thegameg
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D100016
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/statepoint-ra.ll (diff)
Commit 096857426e2f22a697f75bb787d08a047132507b by llvmgnsyncbot
[gn build] Port 530456caf908
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn (diff)
Commit d80178f7c1122469b539f0be3c57c3ee60eaedde by tpopp
[mlir] Change verification order to prevent null dereference

Differential Revision: https://reviews.llvm.org/D100390
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp (diff)
Commit 7975dd033cb950934b70bd56313fa11a9096e115 by kadircet
[NFC] Fix unused variable warning.

Differential Revision: https://reviews.llvm.org/D100451
The file was modifiedlld/COFF/Chunks.cpp (diff)
Commit bda20282cb94faa97b2e50cb592eff3dec94f6b0 by 1.int32
[clang-tidy] Add exception flag to bugprone-unhandled-exception-at-new test.
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/bugprone-unhandled-exception-at-new.cpp (diff)
Commit 1c4108ab661d43e21b1d1c804d8a403e5b0cf7d6 by chen3.liu
[i386] Modify the alignment of __m128/__m256/__m512 vector type according i386 abi.

According to i386 System V ABI:

1. when __m256 are required to be passed on the stack, the stack pointer must be aligned on a 0 mod 32 byte boundary at the time of the call.
2. when __m512 are required to be passed on the stack, the stack pointer must be aligned on a 0 mod 64 byte boundary at the time of the call.

The current method of clang passing __m512 parameter are as follow:

1. when target supports avx512, passing it with 64 byte alignment;
2. when target supports avx, passing it with 32 byte alignment;
3. Otherwise, passing it with 16 byte alignment.

Passing __m256 parameter are as follow:

1. when target supports avx or avx512, passing it with 32 byte alignment;
2. Otherwise, passing it with 16 byte alignment.

This pach will passing __m128/__m256/__m512 following i386 System V ABI and
apply it to Linux only since other System V OS (e.g Darwin, PS4 and FreeBSD) don't
want to spend any effort dealing with the ramifications of ABI breaks at present.

Differential Revision: https://reviews.llvm.org/D78564
The file was addedclang/test/CodeGen/x86_32-align-linux.c
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp (diff)
Commit 127322ddebde9c3a0b1cd5cdc81b36870606b4f6 by martin
[lldb] Silence GCC warnings about control reaching the end of non-void functions. NFC.

Also remove a superfluous semicolon after the braces for a switch
statement (that wasn't warned about).

Differential Revision: https://reviews.llvm.org/D100447
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp (diff)
Commit d5c5cf5ce8d921fc8c5e1b608c298a1ffa688d37 by martin
[AArch64] [COFF] Properly produce cross-section relative relocations

This fixes breakage on Windows/ARM64 after D94355.

Modelled after the corresponding code for X86; not entirely familiar
with those aspects of that layer otherwise.

Differential Revision: https://reviews.llvm.org/D99572
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp (diff)
The file was modifiedllvm/test/MC/AArch64/coff-relocations.s (diff)
The file was modifiedllvm/test/MC/AArch64/coff-relocations-diags.s (diff)
Commit 3b32dc4b84c8eaa0de337d6847c2c4cdbfcb4333 by martin
[ARM] [COFF] Properly produce cross-section relative relocations

Differential Revision: https://reviews.llvm.org/D99574
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp (diff)
The file was modifiedllvm/test/MC/ARM/coff-relocations.s (diff)
Commit 37935405efbebc4bd9f1ffac9152571c6a8469dc by martin
[lit] Always quote arguments containing '[' on windows

This avoids breaking clang-tidy/infrastructure/validate-check-names.cpp
if 'not' is evaluated as a lit internal tool (making TestRunner
invoke 'grep' directly in that test, instead of invoking 'not', which
then invokes 'grep').

The quoting of arguments is still brittle if the executable is an
MSYS based tool though, as MSYS based tools incorrectly unescape
backslashes in quoted arguments (contrary to regular win32 argument
parsing rules), see D99406 and
https://github.com/msys2/msys2-runtime/issues/36 for more examples
of the issues.

Differential Revision: https://reviews.llvm.org/D99938
The file was modifiedllvm/test/Other/lit-quoting.txt (diff)
The file was modifiedllvm/utils/lit/lit/TestRunner.py (diff)
Commit 8be3181df6f13544d97c1e263a91aa376a760c99 by nemanja.i.ibm
[PowerPC] Fix incorrect subreg typo from 0148bf53f0a0
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td (diff)
Commit 016ceb838231a717e889f7ceb38c56575e82aead by llvm-dev
[X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits in MOVMSK(SHUFFLE(X,u)) -> MOVMSK(X) fold

Extension to rG74f98391a7a4, we can also include any of the upper (known zero) bits in the comparison in the shuffle removal fold, just as long as we demand all the elements of the movmsk source vector.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit 62af2af85daf79471c15a23f1b4f81a83a8bdd19 by llvm-dev
[X86] Regenerate PR32284.ll test case prefixes. NFC.

Use X64 for 64-bit targets and X86 for 32-bit targets
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll (diff)
Commit 73737fe9900dae6a7e766043477d646b43d7f284 by llvm-dev
[X86] Fold cmpeq/ne(trunc(x),0) --> cmpeq/ne(x,0)

Relax the fold from rGbaadbe04bf75 to compare any op, not just logic ops, now that the movmsk regressions have been handled.
The file was modifiedllvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/setcc-lowering.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-or-bool.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-compare-any_of.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/movmsk-cmp.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll (diff)
Commit 2fea5d5d4accf3490854b064a51d1db049b1de64 by lebedev.ri
[InstCombine] tmp alloca bypass: ensure that the replacement dominates all alloca uses

After 077bff39d46364035a5dcfa32fc69910ad0975d0,
isDereferenceableForAllocaSize() can recurse into selects,
which is causing a problem for the new test case,
reduced from https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20210412/904154.html
because the replacement (the select) is defined after the first use
of an alloca, so we'd end up with a verifier error.

Now, this new check is too restrictive.
We likely can handle *some* cases, by trying to sink all uses of an alloca
to after the the def.
The file was modifiedllvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll (diff)
The file was addedllvm/test/Transforms/InstCombine/tmp-alloca-bypass.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp (diff)
Commit 57b259a852a6383880f5d0875d848420bb3c2945 by martin
[Passes] Enable the relative lookup table converter pass on aarch64

After d5c5cf5ce8d921fc8c5e1b608c298a1ffa688d37, it should work fine
for aarch64 on COFF too. (It was disabled when the patch was
(re)applied in e96df3e531f506eea75da0f13d0f8aa9a267f975, pending
that fix.)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
Commit 6401b78ab3cf18cb5f0821f9bd52063af0d7ce35 by Tim Northover
SDAG: constant fold bf16 -> i16 casts

This direction is particularly useful because i16 constants are much more
likely to be legal than bf16.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/bf16.ll (diff)
Commit 6cdc2239dbabeb6fb8a9f933693f744a60d50a8c by david.spickett
[lldb][AArch64] Simplify MTE memory region test

By checking for cpu and toolchain features ahead
of time we don't need the custom return codes.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D97684
The file was modifiedlldb/packages/Python/lldbsuite/test/decorators.py (diff)
The file was modifiedlldb/test/API/linux/aarch64/mte_memory_region/TestAArch64LinuxMTEMemoryRegion.py (diff)
The file was modifiedlldb/test/API/linux/aarch64/mte_memory_region/main.c (diff)
Commit 3637c5c8ec3d4dc0b87eb4e3ee9c9ae8816cade2 by martin
[clang] [AArch64] Fix Windows va_arg handling for larger structs

Aggregate types over 16 bytes are passed by reference.

Contrary to the x86_64 ABI, smaller structs with an odd (non power
of two) are padded and passed in registers.

Differential Revision: https://reviews.llvm.org/D100374
The file was modifiedclang/test/CodeGen/ms_abi_aarch64.c (diff)
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp (diff)
Commit 989445f4386cdc1fce20eb4e418ed4b502819cc7 by spatel
[ValueTracking] add unit test for isKnownNonZero(); NFC

We call various value tracking APIs from within -instsimplify,
so I don't think this is visible in a larger test.
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp (diff)
Commit 413d84fb5c6d18efc0c3f478071a11c7c3542fd0 by martin
[lit] Remove unnecessary testcases from lit-quoting.txt that fail on macOS

These were added in 37935405efbebc4bd9f1ffac9152571c6a8469dc,
but they fail on macOS (and on Windows with MSYS based tools, before
relanding D98859). Remove the tests that exercise "not not echo", as
the primary thing to test is the plain echo patterns above.
The file was modifiedllvm/test/Other/lit-quoting.txt (diff)
Commit 6b7838b68cc49621f3c92d8603f95e801d10f759 by zarko
[AIX] Allow safe for 32bit P8 VSX pattern matching

Pull some of the safe for 32bit pattern matching for Pwr8 and above.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D97909
The file was modifiedllvm/test/CodeGen/PowerPC/cannonicalize-vector-shifts.ll (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td (diff)
The file was addedllvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll (diff)
Commit d0920b201f7cb7494dff9334725e123283128c95 by mkazantsev
[Test] Account for possibility to free memory in loop load PRE test
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-loop-load.ll (diff)
Commit 49193653974ae96b756b8ff13668d07d6252aa77 by spatel
[ValueTracking] reduce code duplication; NFC

The start value can't be null for something to be a non-zero
recurrence, so hoist that common check out of the switch.

Subsequent checks may be incomplete or over-specified as noted in:
D100408
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp (diff)
Commit 929edd4375a40fcf264426ac4f2b3d8fa9c72970 by sebastian.neubauer
[AMDGPU] Mark scavenged SGPR as used

Otherwise it reuses the same register for storing the stack slot
offset if the stack slot offset is big.

Differential Revision: https://reviews.llvm.org/D100461
The file was modifiedllvm/test/CodeGen/AMDGPU/sgpr-spill.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll (diff)
Commit 77dc7b465313345ab0a5929f6f0386dbcab6594c by hansang.bae
[OpenMP] Fix printing routine for OMP_TOOL_VERBOSE_INIT

Also fixed typo in the verbose message.

Differential Revision: https://reviews.llvm.org/D100414
The file was modifiedopenmp/runtime/src/ompt-general.cpp (diff)
The file was modifiedopenmp/runtime/src/kmp_settings.cpp (diff)
The file was modifiedopenmp/runtime/test/ompt/loadtool/tool_available/tool_available.c (diff)
Commit 856c49d79c0d717fb3e9ff6deebfe740a4f752e2 by sven.vanhaastregt
[OpenCL][Docs] Update OpenCL 3.0 implementation status

Reviewed-By: Anastasia Stulova
The file was modifiedclang/docs/OpenCLSupport.rst (diff)
Commit 5ae5d25e38efad1d59ed97d969a5e930b58a5e16 by spatel
[ValueTracking] match negative-stepping non-zero recurrence

This is pulled out of D100408.

This avoids a regression that would be exposed by making the
calling code from InstSimplify more efficient.
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp (diff)
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp (diff)
Commit 7ef2c68a3d24af0b0d540e748e8b564180f4e18a by spatel
[InstSimplify] improve efficiency for detecting non-zero value

Stepping through callstacks in the example from D99759 reveals
this potential compile-time improvement.

The savings come from avoiding ValueTracking's computing known
bits if we have already dealt with special-case patterns.

Further improvements in this direction seem possible.

This makes a degenerate test based on PR49785 about 40x faster
(25 sec -> 0.6 sec), but it does not address the larger question
of how to limit computeKnownBitsFromAssume(). Ie, the original
test there is still infinite-time for all practical purposes.

Differential Revision: https://reviews.llvm.org/D100408
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp (diff)
Commit 92aba5ae49a6970c43bead0afd1e52c83fe44e6e by erich.keane
CPUDispatch- allow out of line member definitions

ICC permits this, and after some extensive testing it looks like we can
support this with very little trouble.  We intentionally don't choose to
do this with attribute-target (despite it likely working as well!)
  because GCC does not support that, and introducing said
  incompatibility doesn't seem worth it.
The file was addedclang/test/CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp (diff)
The file was modifiedclang/test/SemaCXX/attr-cpuspecific.cpp (diff)
Commit 7a9cb801f3e71e8acca1598910c6dd19526942d8 by thakis
[llvm-symbolizer] remove unused variable

This should've been removed in D83530.

Differential Revision: https://reviews.llvm.org/D100434
The file was modifiedllvm/tools/llvm-symbolizer/llvm-symbolizer.cpp (diff)
Commit bbab9f986c6df8508eb64697923eb70ee17cb0f8 by sjoerd.meijer
[SCCP] Create SCCP Solver

This refactors SCCP and creates a SCCPSolver interface and class so that it can
be used by other passes and transformations. We will use this in D93838, which
adds a function specialisation pass.

This is based on an early version by Vinay Madhusudan.

Differential Revision: https://reviews.llvm.org/D93762
The file was addedllvm/lib/Transforms/Utils/SCCPSolver.cpp
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp (diff)
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt (diff)
The file was modifiedllvm/include/llvm/Transforms/Scalar/SCCP.h (diff)
The file was addedllvm/include/llvm/Transforms/Utils/SCCPSolver.h
Commit 34367dd2535c576d0fecbb803b38ada9918dc5e7 by llvmgnsyncbot
[gn build] Port bbab9f986c6d
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn (diff)
Commit 7c4de2e9b9b469b073e6f5f044977b23ac1b26c6 by hanchung
[mlir][StandardToSPIRV] Add support for lowering memref<?xi1> to SPIR-V

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D100452
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp (diff)
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-types-to-spirv.mlir (diff)
Commit cca40aa8d8aa732a226c8978e53cd47e7b7c76ec by pablo.barrio
[AArch64][v8.5A] Add BTI to all function starts

The existing BTI placement pass avoids inserting "BTI c" when the
function has local linkage and is only directly called. However,
even in this case, there is a (small) chance that the linker later
adds a hunk with an indirect call to the function, e.g. if the
function is placed in a separate section and moved far away from
its callers. Make sure to add BTI for these functions too.

Differential Revision: https://reviews.llvm.org/D99417
The file was modifiedllvm/test/CodeGen/AArch64/branch-target-enforcement.mir (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64BranchTargets.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll (diff)
Commit b49c41afbaa212cc15343af68c3293ab929a2d34 by llvm-dev
[SLP] createOp - fix null dereference warning. NFCI.

Only attempt to propagateIRFlags if we have both SelectInst - afaict we shouldn't have matched a min/max reduction without both SelectInst, but static analyzer doesn't know that.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp (diff)
Commit 4fbe7615721863c57b4fd4334f361a5d4157e235 by llvm-dev
[X86][SSE] canonicalizeShuffleWithBinOps - check for more combos of merge-able binary shuffles.

In the fold SHUFFLE(BINOP(X,Y),BINOP(Z,W)) -> BINOP(SHUFFLE(X,Z),SHUFFLE(Y,W)), check if both X/Z AND Y/W have at least one merge-able shuffle in which case the total number of shuffle should still fall.

Helps with instruction count regressions we saw while fixing PR48823
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/haddsub-3.ll (diff)
Commit e3070db0f7049fdbd75955b3e68a3d2bc4936e48 by mahesha.comp
[AMDGPU] Rename "LDS lowering" pass name.

Rename the name of "LDS lowering" pass from `amdgpu-disable-lower-module-lds` to
`amdgpu-enable-lower-module-lds` as later is consistent and reads better.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D100441
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-non-entry-func.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-constantexpr-use.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll (diff)
Commit cf4161673c7e7c7c57d8115468bfcc9988f43d36 by benny.kra
[Instcombine] Disable memcpy of alloca bypass for instruction sources

This transformation is fundamentally broken when it comes to dominance,
it just happened to work when the source of the memcpy can be moved into
the place of the alloca. The bug shows up a lot more often since
077bff39d46364035a5dcfa32fc69910ad0975d0 allows the source to be a
switch.

It would be possible to check dominance of the source and all its
operands, but that seems very heavy for instcombine.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp (diff)
The file was modifiedllvm/test/Transforms/InstCombine/tmp-alloca-bypass.ll (diff)
Commit c4c9e4d6df3c492cf86728288b14a9bc718f6e2d by llvm-dev
[X86] Add PR49028 test case
The file was addedllvm/test/CodeGen/X86/pr49028.ll
Commit f29dcbdde10c86cfd89196fc2aa0e7f6ca3c9c4e by hans
Add flag for showing skipped headers in -H / --show-includes output

Consider the following set of files:

  a.cc:
  #include "a.h"

  a.h:
  #ifndef A_H
  #define A_H

  #include "b.h"
  #include "c.h"  // This gets "skipped".

  #endif

  b.h:
  #ifndef B_H
  #define B_H

  #include "c.h"

  #endif

  c.h:
  #ifndef C_H
  #define C_H

  void c();

  #endif

And the output of the -H option:

  $ clang -c -H a.cc
  . ./a.h
  .. ./b.h
  ... ./c.h

Note that the include of c.h in a.h is not shown in the output (GCC does the
same). This is because of the include guard optimization: clang knows c.h is
covered by an include guard which is already defined, so when it sees the
include in a.h, it skips it. The same would have happened if #pragma once were
used instead of include guards.

However, a.h *does* include c.h, and it may be useful to show that in the -H
output. This patch adds a flag for doing that.

Differential revision: https://reviews.llvm.org/D100480
The file was modifiedclang/include/clang/Driver/Options.td (diff)
The file was modifiedclang/test/Frontend/Inputs/test.h (diff)
The file was modifiedclang/test/Frontend/Inputs/test2.h (diff)
The file was modifiedclang/test/Frontend/print-header-includes.c (diff)
The file was modifiedclang/include/clang/Frontend/DependencyOutputOptions.h (diff)
The file was modifiedclang/lib/Frontend/HeaderIncludeGen.cpp (diff)
Commit d45df0d29f7005d3c25357f3982002eaf339f875 by martin
clang-format: [JS] merge import lines.

Multiple lines importing from the same URL can be merged:

    import {X} from 'a';
    import {Y} from 'a';

Merge to:

    import {X, Y} from 'a';

This change implements this merge operation. It takes care not to merge in
various corner case situations (default imports, star imports).

Differential Revision: https://reviews.llvm.org/D100466
The file was modifiedclang/unittests/Format/SortImportsTestJS.cpp (diff)
The file was modifiedclang/lib/Format/SortJavaScriptImports.cpp (diff)
Commit 4d195f1b4dd6e3978776d69f49840439933a2543 by martin
review comments

track symbol merge status in references to avoid excesive rewrites
The file was modifiedclang/lib/Format/SortJavaScriptImports.cpp (diff)
The file was modifiedclang/unittests/Format/SortImportsTestJS.cpp (diff)
Commit ce82843f72a7e3a40ebb3162a54de39c2b3ec2a4 by gysit
[mlir][linalg] update fusion to support linalg index operations.

The patch updates the linalg fusion pass to add the tile offsets to the indices.

Differential Revision: https://reviews.llvm.org/D100456
The file was modifiedmlir/test/Dialect/Linalg/fusion-indexed-generic.mlir (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp (diff)
The file was modifiedmlir/test/lib/Transforms/TestLinalgFusionTransforms.cpp (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp (diff)
Commit 3b9dc59dbfff913f4625ce3becebee11f3eb6e6f by ties.stuij
[arm][compiler-rt] add armv8m.main and arv8.1m.main targets

These changes were enough to compile compiler-rt builtins for armv8m.main and
armv8.1m.main.

Differential Revision: https://reviews.llvm.org/D99600
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt (diff)
The file was modifiedcompiler-rt/cmake/builtin-config-ix.cmake (diff)
Commit 39d29817f37ed8f0969a9221f714711f2b390a50 by sjoerd.meijer
[SCCP] Follow up of rGbbab9f986c6d. NFC.

This addresses the linter messages, mainly the inconsistent capitalisation of
member functions.
The file was modifiedllvm/include/llvm/Transforms/Utils/SCCPSolver.h (diff)
The file was modifiedllvm/lib/Transforms/Utils/SCCPSolver.cpp (diff)
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp (diff)
Commit ac08e2bb98e6ecc6f56f553109b889abe3ee614e by koraq
[libc++] Make chars_format a bitmask type.

Some of Microsoft's unit tests in D70631 fail because libc++'s
implementation of std::chars_format isn't a proper bitmask type. Adding
the required functions to make std::chars_format a proper bitmask type.

Implements parts of P0067: Elementary string conversions

Differential Revision: https://reviews.llvm.org/D97115
The file was modifiedlibcxx/include/charconv (diff)
The file was addedlibcxx/test/std/utilities/charconv/charconv.syn/chars_format.pass.cpp
Commit af7ab81ce3104418b4971b2398c1e028238ed90f by tlively
[WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

Now that these instructions are no longer prototypes, we do not need to be
careful about keeping them opt-in and can use the standard LLVM infrastructure
for them. This commit removes the bespoke intrinsics we were using to represent
these operations in favor of the corresponding target-independent intrinsics.
The clang builtins are preserved because there is no standard way to easily
represent these operations in C/C++.

For consistency with the scalar codegen in the Wasm backend, the intrinsic used
to represent {f32x4,f64x2}.nearest is @llvm.nearbyint even though
@llvm.roundeven better captures the semantics of the underlying Wasm
instruction. Replacing our use of @llvm.nearbyint with use of @llvm.roundeven is
left to a potential future patch.

Differential Revision: https://reviews.llvm.org/D100411
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td (diff)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (diff)
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-intrinsics.ll (diff)
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-unsupported.ll (diff)
The file was modifiedclang/test/CodeGen/builtins-wasm.c (diff)
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td (diff)
Commit 596f669cfbbf5d794442a60f84ae8b5f6ebf1f57 by sander.desmalen
[TTI] NFC: Change getCallInstrCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: c-rhodes

Differential Revision: https://reviews.llvm.org/D100312
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp (diff)
Commit 14b934f8a6f2aeade5a512c5004ec88837f363f5 by sander.desmalen
[TTI] NFC: Change getCFInstrCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D100313
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (diff)
Commit 174e8f6c5e467d403272715c8649134f350ff2c7 by sander.desmalen
[TTI] NFC: Change getShuffleCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100314
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (diff)
Commit 1af35e77f4b8c3314dc20a10d579b52f22c75a00 by sander.desmalen
[TTI] NFC: Change getVectorInstrCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100315
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
Commit d84bd951a8d39436b0ca0cd3fa93cacef2f969f1 by sander.desmalen
[TTI] NFC: Change getFPOpCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: c-rhodes

Differential Revision: https://reviews.llvm.org/D100316
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
Commit 4f42d873c20291077f5a1ed37b102330d505f00d by sander.desmalen
[TTI] NFC: Change getArithmeticInstrCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100317
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/Lanai/LanaiTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
Commit e81c96d6f8b1cc974f9dbdd47ed82be6be81ae0a by pklausler
[flang] Handle END= situations better in runtime input

Debug the input path for READ statements with END= labels;
don't emit errors when the program can handle them.
BeginReadingRecord() member functions have been made
"bool" for more convenient handling of error cases,
and some code in IoErrorHandler has been cleaned up.

Differential Revision: https://reviews.llvm.org/D100421
The file was modifiedflang/runtime/io-stmt.h (diff)
The file was modifiedflang/runtime/io-stmt.cpp (diff)
The file was modifiedflang/runtime/descriptor-io.h (diff)
The file was modifiedflang/runtime/io-api.cpp (diff)
The file was modifiedflang/runtime/io-error.cpp (diff)
The file was modifiedflang/runtime/unit.h (diff)
The file was modifiedflang/runtime/unit.cpp (diff)
The file was modifiedflang/runtime/io-error.h (diff)
Commit b7ebb25e53538002d6bccec58cc9ca8e80c042fe by Stanislav.Mekhanoshin
[AMDGPU] Factor out SelectSAddrFI()

This is a service function generally useful for selection
of a FI in an SADDR. NFC for now, needed for future patch.

Differential Revision: https://reviews.llvm.org/D100406
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp (diff)
Commit f1bc1a82cf718a67d3271fc74c28f5845f0f1526 by nikita.ppv
[ValueTracking] Add additional non-zero add recurrence test (NFC)

Also drop a number of unused parameters from existing tests.
The file was modifiedllvm/test/Analysis/ValueTracking/monotonic-phi.ll (diff)
Commit 5c0fb026c93b33dd107f6ff50723d7eed911e1ce by nikita.ppv
[ValueTracking] Don't require non-zero step for add nuw

It's okay if the step is zero, we'll just stay at the same non-zero
value in that case. The valuable part of this is that the step
doesn't even need to be a constant anymore.
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp (diff)
The file was modifiedllvm/test/Analysis/ValueTracking/monotonic-phi.ll (diff)
Commit a0124f4e4ded2694172aa1027cc1ea42e3ea3ac8 by momchil.velikov
Remove deprecated member functions (NFC)

Remove the member functions getByValAlign and getOrigAlign, there were
no users left.

Differential Revision: https://reviews.llvm.org/D99098
The file was modifiedllvm/include/llvm/CodeGen/TargetCallingConv.h (diff)
Commit 72142b909d635d17bdbe3cb4823d97afb96c1d9e by a.bataev
[SLP]Added a tests for shuffled matched tree entries, NFC.
The file was addedllvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
Commit a32846b1d0147f30f6dde4bfec453cd681937005 by jpienaar
Refactor the architecture of mlir-reduce

Add iterator for ReductionNode traversal and use range to indicate the region we would like to keep. Refactor the interaction between Pass/Tester/ReductionNode.
Now it'll be easier to add new traversal type and OpReducer

Reviewed By: jpienaar, rriddle

Differential Revision: https://reviews.llvm.org/D99713
The file was removedmlir/include/mlir/Reducer/ReductionTreeUtils.h
The file was modifiedmlir/tools/mlir-reduce/ReductionNode.cpp (diff)
The file was addedmlir/tools/mlir-reduce/ReductionTreePass.cpp
The file was modifiedmlir/tools/mlir-reduce/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Reducer/ReductionTreePass.h (diff)
The file was removedmlir/tools/mlir-reduce/Passes/OpReducer.cpp
The file was modifiedmlir/include/mlir/Reducer/Tester.h (diff)
The file was modifiedmlir/lib/Reducer/Tester.cpp (diff)
The file was removedmlir/tools/mlir-reduce/ReductionTreeUtils.cpp
The file was modifiedmlir/include/mlir/Reducer/Passes/OpReducer.h (diff)
The file was modifiedmlir/include/mlir/Reducer/ReductionNode.h (diff)
The file was modifiedmlir/tools/mlir-reduce/OptReductionPass.cpp (diff)
The file was modifiedmlir/tools/mlir-reduce/mlir-reduce.cpp (diff)
Commit 17e2f236f05a8eb73bd66d5f286dccc14d412e74 by pklausler
[flang] Fix Boolean flag arguments

Two sites in io-api.cpp pass the wrong Boolean flag value to
signify that a new anonymous unit is a formatted file.

Differential Revision: https://reviews.llvm.org/D100419
The file was modifiedflang/runtime/io-api.cpp (diff)
The file was modifiedflang/runtime/buffer.h (diff)
Commit b15c54ad687a1d906ee22acba0104c2f3f0dd2f9 by koraq
[NFC][libc++] Fixes a documentation typo.
The file was modifiedlibcxx/docs/RangesStatus.rst (diff)
Commit 0d91075f772d3f0e2cf6449b534a726d4d944c62 by nikita.ppv
[ValueTracking] Don't require strictly positive for mul nsw recurrence

Just like in the mul nuw case, it's sufficient that the step is
non-zero. If the step is negative, then the values will jump
between positive and negative, "crossing" zero, but the value of
the recurrence is never actually zero.
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp (diff)
The file was modifiedllvm/test/Analysis/ValueTracking/monotonic-phi.ll (diff)
Commit 18a9b180870fcfc98da10ba9027f8eb5d0e7aba5 by rnk
[COFF] Simplify ICF associated comdat handling

This is a different approach from D98993 that should achieve most of the
same benefit. The two changes are:
1. Sort the list of associated child sections by section name
2. Do not consider associated sections to have children themselves

This fixes the main issue, which was that we sometimes considered an
.xdata section to have a child .pdata section. That lead to slow links
and larger binaries (less xdata folding).

Otherwise, this should be NFC: we go back to ignoring .debug/.gljmp and
other metadata sections rather than only looking at pdata/xdata. We
discovered that we do care about other associated sections, like ASan
global registration metadata.
The file was modifiedlld/COFF/Chunks.h (diff)
The file was addedlld/test/COFF/icf-assoc-order.s
The file was addedlld/test/COFF/icf-xdata-last.s
The file was modifiedlld/COFF/Chunks.cpp (diff)
Commit 2fe4909748b5f14499e83b0647b7e9ddd0068a15 by martin
clang-format: fix undefined behavior.

The previous change failed to initialize the SymbolsMerged field.
The file was modifiedclang/lib/Format/SortJavaScriptImports.cpp (diff)
Commit af7925b4dd6519ebf0126ac8a18d791eb26968c9 by tlively
[WebAssembly] Codegen for f64x2.convert_low_i32x4_{s,u}

Add a custom DAG combine and ISD opcode for detecting patterns like

  (uint_to_fp (extract_subvector ...))

before the extract_subvector is expanded to ensure that they will ultimately
lower to f64x2.convert_low_i32x4_{s,u} instructions. Since these instructions
are no longer prototypes and can now be produced via standard IR, this commit
also removes the target intrinsics and builtins that had been used to prototype
the instructions.

Differential Revision: https://reviews.llvm.org/D100425
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISD.def (diff)
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def (diff)
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-conversions.ll (diff)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td (diff)
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td (diff)
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-intrinsics.ll (diff)
The file was modifiedclang/test/CodeGen/builtins-wasm.c (diff)
Commit 1c5717225e89d4b266784f1a1fe482530bc4b6f2 by scw
[libTooling] Add smart pointer support to the `access` Stencil

This extends smart pointer support beyond the existing `maybeDeref` and
`maybeAddressOf`.

Differential Revision: https://reviews.llvm.org/D100450
The file was modifiedclang/unittests/Tooling/StencilTest.cpp (diff)
The file was modifiedclang/lib/Tooling/Transformer/Stencil.cpp (diff)
Commit f992cfba7173ab55d9795f71156ffde0b5eece0a by Louis Dionne
[libc++] Split up __memory/base.h into meaningful headers
The file was addedlibcxx/include/__memory/construct_at.h
The file was modifiedlibcxx/include/__memory/shared_ptr.h (diff)
The file was modifiedlibcxx/include/CMakeLists.txt (diff)
The file was modifiedlibcxx/include/iterator (diff)
The file was removedlibcxx/include/__memory/base.h
The file was modifiedlibcxx/include/__memory/uninitialized_algorithms.h (diff)
The file was modifiedlibcxx/include/exception (diff)
The file was addedlibcxx/include/__memory/addressof.h
The file was modifiedlibcxx/include/__memory/raw_storage_iterator.h (diff)
The file was modifiedlibcxx/include/memory (diff)
The file was modifiedlibcxx/include/__memory/allocator_traits.h (diff)
Commit e98060fa72ccb3c43d359dc5842f7d102dcf4378 by Louis Dionne
[libc++] Move __memory/utilities.h to __memory/allocation_guard.h

This matches the granularity of other headers that were split off of <__memory>.
The file was modifiedlibcxx/include/__memory/shared_ptr.h (diff)
The file was modifiedlibcxx/include/memory (diff)
The file was modifiedlibcxx/include/CMakeLists.txt (diff)
The file was removedlibcxx/include/__memory/utilities.h
The file was addedlibcxx/include/__memory/allocation_guard.h
Commit 207d58bf31ab975203c6bb818ee4167a09c195ce by Louis Dionne
[libc++] Move guards against std::auto_ptr outside of auto_ptr.h

This makes it clear that headers like <memory> which include auto_ptr
only do that when compiling under an older Standard, or when the removed
feature is explicitly requested.
The file was modifiedlibcxx/include/__memory/unique_ptr.h (diff)
The file was modifiedlibcxx/include/memory (diff)
The file was modifiedlibcxx/include/__memory/shared_ptr.h (diff)
The file was modifiedlibcxx/include/__memory/auto_ptr.h (diff)
Commit c1554f32e3b3fafab64698fdb5b806b1bda4aa8a by Alex Lorenz
[clang][FileManager] Support empty file name in getVirtualFileRef for serialized diagnostics

After https://reviews.llvm.org/D90484 libclang is unable to read a serialized diagnostic file
which contains a diagnostic which came from a file with an empty filename. The reason being is
that the serialized diagnostic reader is creating a virtual file for the "" filename, which now
fails after the changes in https://reviews.llvm.org/D90484. This patch restores the previous
behavior in getVirtualFileRef by allowing it to construct a file entry ref with an empty name by
pretending its name is "." so that the directory entry can be created.

Differential Revision: https://reviews.llvm.org/D100428
The file was modifiedclang/lib/Basic/FileManager.cpp (diff)
The file was addedclang/test/Misc/serialized-diags-empty-filename.c
Commit cfc12a2120fc84fd240a8a8c426e18f695bccde0 by pklausler
[flang] Correct the interpretation of BIND(C,NAME='')

An empty NAME= should mean that there is no C binding, not the
binding that would result from BIND(C) without a NAME=.
See 18.10.2p2.

Differential Revision: https://reviews.llvm.org/D100494
The file was modifiedflang/lib/Semantics/resolve-names.cpp (diff)
Commit d3e2b4c0a21f8b3861d8b64a4c2ed051694094d1 by gh
[SROA][TBAA] Handle shift of regular TBAA nodes

SROA shifts TBAA nodes in a way that may present a problem for !tbaa but not !tbaa.struct nodes.

Differential Revision: https://reviews.llvm.org/D99851
The file was modifiedllvm/lib/Analysis/TypeBasedAliasAnalysis.cpp (diff)
The file was addedllvm/test/Transforms/SROA/tbaa-subload.ll
Commit e2006903813849eb6e4ae2c78ff89e9277a82845 by thakis
[gn build] try to make sync_source_lists_from_cmake.py py3-compatible
The file was modifiedllvm/utils/gn/build/sync_source_lists_from_cmake.py (diff)
Commit 89dc4e3312b9b735b0a6af74a63f137adcbd6bf2 by llvmgnsyncbot
[gn build] Port e98060fa72cc
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn (diff)
Commit c0fa3fe4aa7888e92b13fda66db6634961bbb74d by llvmgnsyncbot
[gn build] Port f992cfba7173
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn (diff)
Commit 1e89f08f59acf8ffd48ffba32ee83a63934a6314 by thakis
fix typo to cycle bots
The file was modifiedlld/ELF/LinkerScript.cpp (diff)
Commit 29f189f90d44a021dafc859b0db4def53b1b46a3 by nikita.ppv
[InstCombine] Conditionally emit nowrap flags when combining two adds

Currently, the InstCombineCompare is combining two add operations
into a single add operation which always has a nsw flag, without
checking the conditions to see if this flag should be present
according to the original two add operations or not.

This patch will change the InstCombineCompare to emit the nsw or
nuw only when these flags are allowed to be generated according to
the original add operations and remove the possibility of applying
wrong optimization with passes that will perform on the IR later
in the pipeline.

To confirm that the current results are buggy and the results after
proposed patch are the correct IR the following examples from Alive2
are attached; the same results can be seen in the case of nuw flag
and nsw is just used as an example. The following link shows that
the generated IR with current LLVM is a buggy IR when none of the
original add operations have nsw flag.
https://alive2.llvm.org/ce/z/WGaDrm
The following link proves that the generated IR after the patch in
the former case is the correct IR.
https://alive2.llvm.org/ce/z/wQ7G_e

Differential Revision: https://reviews.llvm.org/D100095
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)
The file was modifiedllvm/test/Transforms/InstCombine/icmp-add.ll (diff)
Commit da0ef5ad5b26529d0aedca9f6c7a2526acbfc48e by thakis
fix typo to cycle bots
The file was modifiedlld/ELF/SyntheticSections.cpp (diff)
Commit 2494243ed3f2ec2d7aba6e879fff47ff0ed71683 by pavel
[lldb] Move QThreadSuffixSupported and QListThreadsInStopReply into llgs

These were in the shared llgs+platform code, but they only make sense
for llgs (as they deal with how the server reports information about
debugged processes).
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.h (diff)
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h (diff)
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp (diff)
Commit ded660495f4e6514823db9ebadbbfa7653c061f3 by pavel
[lldb/test] Remove the "expect_captures" feature of lldb-server tests

This functionality is used exactly once, and it is trivial to implement
it differently (capture into two distinct variables, and compare for
equality afterwards).
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py (diff)
The file was modifiedlldb/test/API/tools/lldb-server/TestLldbGdbServer.py (diff)
Commit 87183b1a7511f1726b0b19a2a217ed249ef3c5b9 by Jonas Devlieghere
[lldb] Only override target arch if it is compatible

It looks like the goal of this code is to provide a more precise
architecture definition for the target when attaching to a process. When
attaching to a foreign debugserver, you might get into a situation where
the active (host) platform will give you bogus information on the target
process.

This change allows the platform to override the target arch only with a
compatible architecture. This fixes TestTargetXMLArch.py on Apple
Silicon. Another alternative would be to just fail in this scenario and
update the test(s).
The file was modifiedlldb/source/Target/Process.cpp (diff)
Commit 543cd763a4882285f34a75db930f19fd6a21b14b by joker.eph
Update OpBase.td AttrDef class to define default value for returnType and convertFromStorage (NFC)

Differential Revision: https://reviews.llvm.org/D100356
The file was modifiedmlir/include/mlir/IR/OpBase.td (diff)
Commit a33b6471001aa8381a152c9ff49442e79d6198f8 by joker.eph
Revert "Refactor the architecture of mlir-reduce"

This reverts commit a32846b1d0147f30f6dde4bfec453cd681937005.

The build is broken with -DBUILD_SHARED_LIBS=ON:

tools/mlir/lib/Reducer/CMakeFiles/obj.MLIRReduce.dir/Tester.cpp.o: In function `mlir::Tester::isInteresting(mlir::ModuleOp) const':
Tester.cpp:(.text._ZNK4mlir6Tester13isInterestingENS_8ModuleOpE+0xa8): undefined reference to `mlir::OpPrintingFlags::OpPrintingFlags()'
Tester.cpp:(.text._ZNK4mlir6Tester13isInterestingENS_8ModuleOpE+0xc6): undefined reference to `mlir::Operation::print(llvm::raw_ostream&, mlir::OpPrintingFlags)'
The file was modifiedmlir/tools/mlir-reduce/mlir-reduce.cpp (diff)
The file was modifiedmlir/include/mlir/Reducer/ReductionNode.h (diff)
The file was addedmlir/tools/mlir-reduce/Passes/OpReducer.cpp
The file was modifiedmlir/tools/mlir-reduce/OptReductionPass.cpp (diff)
The file was removedmlir/tools/mlir-reduce/ReductionTreePass.cpp
The file was modifiedmlir/tools/mlir-reduce/CMakeLists.txt (diff)
The file was modifiedmlir/tools/mlir-reduce/ReductionNode.cpp (diff)
The file was modifiedmlir/lib/Reducer/Tester.cpp (diff)
The file was addedmlir/tools/mlir-reduce/ReductionTreeUtils.cpp
The file was addedmlir/include/mlir/Reducer/ReductionTreeUtils.h
The file was modifiedmlir/include/mlir/Reducer/ReductionTreePass.h (diff)
The file was modifiedmlir/include/mlir/Reducer/Tester.h (diff)
The file was modifiedmlir/include/mlir/Reducer/Passes/OpReducer.h (diff)
Commit 82f0e3d3ea6bf927e3397b2fb423abbc5821a30f by sguelton
Simplify BitVector code

Instead of managing memory by hand, delegate it to std::vector. This makes the
code much simpler, and also avoids repeatedly computing the storage size.

According to valgrind --tool=callgrind, this also slightly decreases the
instruction count, but by a small margin.

Differential Revision: https://reviews.llvm.org/D100387
The file was modifiedllvm/include/llvm/ADT/BitVector.h (diff)
Commit cf20286bcc9b7182a25b3cc64a87a94c383fa37f by ajcbik
[mlir] Use default lli JIT in Integration tests

Now that 9b8e7a9d ("[lli] Honor the --entry-function flag in orc and
orc-lazy modes") fixed https://llvm.org/PR49906.

Reviewed By: mehdi_amini, aartbik

Differential Revision: https://reviews.llvm.org/D100407
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-ext.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-rsqrt.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero-block.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero.mlir (diff)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir (diff)
Commit cc88d301a0bcd8b93c632af2870503949038c87f by a20012251
[lldb-vscode] Reduce chattiness of progress events

Progress events internally have a completed count and a total count, which can mean that for a job with 20000 total counts, then there will be 20000 events fired. Sending all these events to the IDE can break it. For example, debugging a huge binary resulted in around 50 million messages, which rendered the IDE useless, as it was spending all of its resources simply parsing messages and updating the UI.

A way to fix this is to send unique percentage updates, which are at most 100 per job, which is not much. I was able to debug that big target and confirm that only unique percentage notifications are sent. I can't write a test for this because the current test is flaky. I'll figure out later how to make the test reliable, but fixing this will unblock us from deploy a new version of lldb-vscode.

Differential Revision: https://reviews.llvm.org/D100443
The file was modifiedlldb/tools/lldb-vscode/CMakeLists.txt (diff)
The file was addedlldb/tools/lldb-vscode/ProgressEvent.cpp
The file was addedlldb/tools/lldb-vscode/ProgressEvent.h
The file was modifiedlldb/tools/lldb-vscode/VSCode.cpp (diff)
The file was modifiedlldb/tools/lldb-vscode/VSCode.h (diff)
The file was modifiedlldb/tools/lldb-vscode/lldb-vscode.cpp (diff)
Commit 6559ebd91b70f8d2ed82e19539ee09c5220159c2 by steveire
[AST] Replace asserts with a condition

As was done for other locations in commit 54272e5b (NFC:
Replace asserts with if() in SourceLocation accessors, 2019-01-07).

Extracted from  https://reviews.llvm.org/D99231
The file was modifiedclang/include/clang/AST/TemplateBase.h (diff)
The file was modifiedclang/include/clang/AST/DeclCXX.h (diff)
Commit d2bb3cbbf8bc3a1b3d27c5a89e7cdd56bdca924f by saugustine
Make test runnable on read-only file systems.
The file was modifiedclang/test/Misc/serialized-diags-empty-filename.c (diff)
Commit f347f0e0b869be4f9b97f26663cf8e4eac2c4868 by steveire
[AST] Add introspection support for more base nodes

Fix the logic of detecting pseudo-virtual getBeginLoc etc on Stmt and
Decl subclasses.

Adjust the test infrastructure to filter out invalid source locations.
This makes the tests more clear about which nodes have which locations.

Differential Revision: https://reviews.llvm.org/D99231
The file was modifiedclang/include/clang/Tooling/NodeIntrospection.h (diff)
The file was modifiedclang/lib/Tooling/DumpTool/ASTSrcLocProcessor.cpp (diff)
The file was modifiedclang/lib/Tooling/CMakeLists.txt (diff)
The file was modifiedclang/lib/Tooling/DumpTool/generate_cxx_src_locs.py (diff)
The file was modifiedclang/unittests/Introspection/IntrospectionTest.cpp (diff)
Commit 6b0cef3e02eef277c60c95e4c1ca71f71091d8ae by jpienaar
Refactor the architecture of mlir-reduce

Add iterator for ReductionNode traversal and use range to indicate the
region we would like to keep. Refactor the interaction between
Pass/Tester/ReductionNode.
Now it'll be easier to add new traversal type and OpReducer

Reviewed By: jpienaar, rriddle

Differential Revision: https://reviews.llvm.org/D99713
The file was modifiedmlir/include/mlir/Reducer/Tester.h (diff)
The file was modifiedmlir/include/mlir/Reducer/ReductionTreePass.h (diff)
The file was modifiedmlir/tools/mlir-reduce/OptReductionPass.cpp (diff)
The file was removedmlir/tools/mlir-reduce/ReductionTreeUtils.cpp
The file was modifiedmlir/lib/Reducer/CMakeLists.txt (diff)
The file was modifiedmlir/tools/mlir-reduce/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Reducer/ReductionNode.h (diff)
The file was addedmlir/tools/mlir-reduce/ReductionTreePass.cpp
The file was modifiedmlir/lib/Reducer/Tester.cpp (diff)
The file was removedmlir/tools/mlir-reduce/Passes/OpReducer.cpp
The file was removedmlir/include/mlir/Reducer/ReductionTreeUtils.h
The file was modifiedmlir/include/mlir/Reducer/Passes/OpReducer.h (diff)
The file was modifiedmlir/tools/mlir-reduce/mlir-reduce.cpp (diff)
The file was modifiedmlir/tools/mlir-reduce/ReductionNode.cpp (diff)
Commit 6a18cc23efad410db48a3ccfc233d215de7d4cb9 by tlively
[WebAssembly] Codegen for i64x2.extend_{low,high}_i32x4_{s,u}

Removes the builtins and intrinsics used to opt in to using these instructions
and replaces them with normal ISel patterns now that they are no longer
prototypes.

Differential Revision: https://reviews.llvm.org/D100402
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td (diff)
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def (diff)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-intrinsics.ll (diff)
The file was modifiedclang/test/CodeGen/builtins-wasm.c (diff)
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td (diff)
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-extending.ll (diff)
Commit a749bd76394c05b423cd643633188eb09f59fbe8 by Jonas Devlieghere
[lldb] Add addressing_bits to KNOWN_HOST_INFO_KEYS and sort the list

This fixes TestGdbRemoteHostInfo on Apple Silicon.
The file was modifiedlldb/test/API/tools/lldb-server/TestGdbRemoteHostInfo.py (diff)
Commit 222d30d32c83a56c19aa4b76649edf6131e2c1a2 by jpienaar
Use PassPipelineCLParser in mlir-reduce

We are able to config the reducer pass pipeline through command-line.

Reviewed By: jpienaar, rriddle

Differential Revision: https://reviews.llvm.org/D100155
The file was modifiedmlir/test/mlir-reduce/simple-test.mlir (diff)
The file was modifiedmlir/include/mlir/Reducer/ReductionTreePass.h (diff)
The file was modifiedmlir/tools/mlir-reduce/OptReductionPass.cpp (diff)
The file was addedmlir/include/mlir/Reducer/Passes.h
The file was modifiedmlir/include/mlir/Reducer/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Reducer/Passes.td (diff)
The file was modifiedmlir/tools/mlir-reduce/ReductionTreePass.cpp (diff)
The file was modifiedmlir/tools/mlir-reduce/mlir-reduce.cpp (diff)
The file was modifiedmlir/include/mlir/Reducer/OptReductionPass.h (diff)
The file was modifiedmlir/test/mlir-reduce/dce-test.mlir (diff)
The file was modifiedmlir/test/mlir-reduce/multiple-function.mlir (diff)
Commit 61500016a59616a8f5ba5a389bafec3b33845279 by jpienaar
[mlir] Fix passArg of ViewOpGraphPass

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D100156
The file was modifiedmlir/include/mlir/Transforms/Passes.td (diff)
Commit 61a85da88235983da565bda0160367461fa0f382 by listmail
[InferAttributes] Materialize all infered attributes for declaration

We have some cases today where attributes can be inferred from another on access, but the result is not explicitly materialized in IR. This change is a step towards changing that.

Why? Two main reasons:

* Human clarity. It's really confusing trying to figure out why a transform is triggering when the IR doesn't appear to have the required attributes.
* This avoids the need to special case declarations in e.g. functionattrs. Since we can assume the attribute is present, we can work directly from attributes (and only attributes) without also needing to query accessors on Function to avoid missing cases due to unannotated (but infered on use) declarations. (This piece will appear must easier to follow once D100226 also lands.)

Differential Revision: https://reviews.llvm.org/D100400
The file was modifiedllvm/lib/Transforms/IPO/InferFunctionAttrs.cpp (diff)
The file was modifiedllvm/test/Transforms/LICM/strlen.ll (diff)
The file was modifiedllvm/test/Transforms/InferFunctionAttrs/annotate.ll (diff)
The file was modifiedllvm/test/Other/cgscc-devirt-iteration.ll (diff)
Commit 3ce61fb6d697d49db471c7077b88b3b9ec9dec66 by listmail
[NFC] Move a recently added utility into a location to enable reuse

About to refresh a patch that uses this in FunctionAtrrs, doing the move seperately to control build times.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp (diff)
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h (diff)
The file was modifiedllvm/lib/Transforms/IPO/InferFunctionAttrs.cpp (diff)
Commit e51939eca63c33e4a57c9c1f4b7d3cd8216369d6 by pklausler
[flang] Fix typo caught by clang build

An inadvertent ! operator was (fortunately) flagged as a
warning by clang; remove it.

Differential Review: https://reviews.llvm.org/D100513
The file was modifiedflang/runtime/io-error.cpp (diff)
Commit c609d533634416fc701939d39bf1e43f293e84dc by listmail
Fix buildbots after 61a85da
The file was modifiedllvm/test/CodeGen/AMDGPU/simplify-libcalls.ll (diff)
Commit c960c3836c6a28ba8f8c0b21db0474bf7d674a18 by steveire
NFC: Remove condition to simplify code

The run method is only called if there is a match with a binding.
The file was modifiedclang/lib/Tooling/DumpTool/ASTSrcLocProcessor.cpp (diff)
Commit ab98f2c7129a52e216fd7e088b964cf4af27b0f2 by thakis
Revert "[InferAttributes] Materialize all infered attributes for declaration"

Breaks check-clang, see comments on D100400

Also revert follow-up "[NFC] Move a recently added utility into a location to enable reuse"

This reverts commit 3ce61fb6d697d49db471c7077b88b3b9ec9dec66.
This reverts commit 61a85da88235983da565bda0160367461fa0f382.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp (diff)
The file was modifiedllvm/lib/Transforms/IPO/InferFunctionAttrs.cpp (diff)
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h (diff)
The file was modifiedllvm/test/Transforms/LICM/strlen.ll (diff)
The file was modifiedllvm/test/Transforms/InferFunctionAttrs/annotate.ll (diff)
The file was modifiedllvm/test/Other/cgscc-devirt-iteration.ll (diff)
Commit 98eea392cdbcdb7360e58b46e9329573f092cd96 by thakis
Revert "Fix buildbots after 61a85da"

This reverts commit c609d533634416fc701939d39bf1e43f293e84dc.
61a85da was reverted in ab98f2c7
The file was modifiedllvm/test/CodeGen/AMDGPU/simplify-libcalls.ll (diff)
Commit b12f3ce47f8983b847b6aa055859dd6fac9e2db0 by zoecarver
[libcxx][nfc] Assign [ranges.primitives] in "RangesStatus."
The file was modifiedlibcxx/docs/OneRangesProposalStatus.csv (diff)
Commit b23abbeab1d76376b4b46142d04e6c105c1074f0 by n.james93
[AST] Use IntrusiveRefCntPtr for Introspection LocationCall.

Reviewed By: steveire

Differential Revision: https://reviews.llvm.org/D100378
The file was modifiedclang/include/clang/Tooling/NodeIntrospection.h (diff)
The file was modifiedclang/lib/Tooling/NodeIntrospection.cpp (diff)
The file was modifiedclang/lib/Tooling/DumpTool/generate_cxx_src_locs.py (diff)
Commit bfb6c2874be830cc6f7595652d23192598edecf0 by n.james93
[AST][NFC] Remove temporary ASTTU file from Introspection generation.

We can use the Preprocessor to remap this file, cleaning up the cmake code.

Reviewed By: steveire

Differential Revision: https://reviews.llvm.org/D100343
The file was modifiedclang/lib/Tooling/DumpTool/ClangSrcLocDump.cpp (diff)
The file was modifiedclang/lib/Tooling/CMakeLists.txt (diff)
Commit 6890f302f587ca4f6712be728bd9302da597fe0c by n.james93
[AST][Introspection] Fix args not being set.

This field isn't set in the constructor.
Tweak its accessor to return an ArrayRef.
The file was modifiedclang/include/clang/Tooling/NodeIntrospection.h (diff)
Commit ebee45713190d9844ef860bf491035e3dcf3a538 by Shafik Yaghmour
[LLLDB] Adding additional check LibCppStdFunctionCallableInfo based on crash reports

We have seen several crashes in LibCppStdFunctionCallableInfo(...) but we don't have a
reproducer. The last crash pointed to last call to line_entry_helper(...) and symbol
was a nullptr. So adding a check for this case.
The file was modifiedlldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp (diff)
Commit dd985551c247752ee2be71f04a141225a40641ef by listmail
Reapply "[InferAttributes] Materialize all infered attributes for declaration"" and follow on patches.

This reverts commit ab98f2c7129a52e216fd7e088b964cf4af27b0f2 and 98eea392cdbcdb7360e58b46e9329573f092cd96.

It includes a fix for the clang test which triggered the revert.  I failed to notice this one because there was another AMDGPU llvm test with a similiar name and the exact same text in the error message.  Odd.  Since only one build bot reported the clang test, I didn't notice that one.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp (diff)
The file was modifiedllvm/test/Other/cgscc-devirt-iteration.ll (diff)
The file was modifiedllvm/lib/Transforms/IPO/InferFunctionAttrs.cpp (diff)
The file was modifiedclang/test/CodeGenOpenCL/builtins-amdgcn.cl (diff)
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h (diff)
The file was modifiedllvm/test/Transforms/InferFunctionAttrs/annotate.ll (diff)
The file was modifiedllvm/test/Transforms/LICM/strlen.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/simplify-libcalls.ll (diff)
Commit dc1ab590a0527533815aeed0100de54a5f4a4829 by efriedma
[Sema] Fold VLA types in compound literals to constant arrays.

Similar to variables with an initializer, this is never valid in
standard C, so we can safely constant-fold as an extension.  I ran into
this construct in a couple proprietary codebases.

While I'm here, drive-by fix for 090dd647: we should only fold variables
with VLA types, not arbitrary variably modified types.

Differential Revision: https://reviews.llvm.org/D98363
The file was modifiedclang/test/Sema/vla.c (diff)
The file was modifiedclang/lib/Sema/SemaDecl.cpp (diff)
The file was modifiedclang/lib/Sema/SemaExpr.cpp (diff)
The file was modifiedclang/include/clang/Sema/Sema.h (diff)
Commit 1035123ac50db21bb2f44f78c040a823d7d064b2 by thakis
[llvm-objdump] Switch command-line parsing from llvm::cl to OptTable

This is similar to D83530, but for llvm-objdump.

The motivation is the desire to add an `llvm-otool` symlink to
llvm-objdump that behaves like macOS's `otool`, using the same
technique the at llvm-objcopy uses to behave like `strip` (etc).

This change for the most part preserves behavior. In some cases,
it increases compatibility with GNU objdump a bit. For example,
the long options now require two dashes, and the long options
taking arguments for the most part now require a `=` in front
of the value. Exceptions are flags where tests passed the
value separately, for these the separate form is kept as
an alias to the = form.

The one-letter short form args are now joined or separate
and long longer accept a =, which also matches GNU objdump.

cl::opt<>s in libraries now have to be explicitly plumbed
through. This patch does that for --x86-asm-syntax=, but
there's hope that we can remove that again.

Differential Revision: https://reviews.llvm.org/D100433
The file was modifiedllvm/test/tools/llvm-objdump/X86/source-interleave-prefix.test (diff)
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp (diff)
The file was modifiedllvm/tools/llvm-objdump/MachODump.cpp (diff)
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn (diff)
The file was modifiedllvm/test/tools/llvm-objdump/section-filter.test (diff)
The file was addedllvm/tools/llvm-objdump/ObjdumpOptID.h
The file was modifiedllvm/tools/llvm-objdump/CMakeLists.txt (diff)
The file was modifiedllvm/test/Support/check-default-options.txt (diff)
The file was modifiedllvm/test/tools/llvm-objdump/help.test (diff)
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.h (diff)
The file was modifiedllvm/tools/llvm-objdump/MachODump.h (diff)
The file was addedllvm/tools/llvm-objdump/ObjdumpOpts.td
Commit 51aa61e74bdb394d89217350ddcb0fd04a21e32f by eugenis
[hwasan] Fix lock contention on thread creation.

Do not hold the free/live thread list lock longer than necessary.
This change speeds up the following benchmark 10x.

constexpr int kTopThreads = 50;
constexpr int kChildThreads = 20;
constexpr int kChildIterations = 8;

void Thread() {
  for (int i = 0; i < kChildIterations; ++i) {
    std::vector<std::thread> threads;
    for (int i = 0; i < kChildThreads; ++i)
      threads.emplace_back([](){});
    for (auto& t : threads)
      t.join();
  }
}

int main() {
  std::vector<std::thread> threads;
  for (int i = 0; i < kTopThreads; ++i)
    threads.emplace_back(Thread);
  for (auto& t : threads)
    t.join();
}

Differential Revision: https://reviews.llvm.org/D100348
The file was modifiedcompiler-rt/lib/hwasan/hwasan_thread_list.h (diff)
Commit e80f9cab0ab82852b70b9a5edbdfb69bc35c135b by thakis
[llvm-objdump] try to fix hexagon and riscv tests after 1035123ac50db
The file was modifiedllvm/tools/llvm-objdump/ObjdumpOpts.td (diff)
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp (diff)
Commit ca897a1abb4d96ffe4dc9eee195c522e93fbbb68 by thakis
[llvm-objdump] try to fix hexagon tests more after 51aa61e74bdb
The file was modifiedllvm/tools/llvm-objdump/ObjdumpOpts.td (diff)
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp (diff)
Commit 5a625e5303d2aaff458f1c98be011e7dc616a108 by thakis
[llvm-objdump] try to fix section-filter.test in full builds after 51aa61e74bdb
The file was modifiedllvm/test/tools/llvm-objdump/section-filter.test (diff)
Commit 8f9477b067b0e059ece95bae3e2bd84f95702666 by saugustine
Revert "Simplify BitVector code"

This reverts commit 82f0e3d3ea6bf927e3397b2fb423abbc5821a30f.

The change breaks the asan buildbots.

https://lab.llvm.org/buildbot/#/builders/99/builds/2835
The file was modifiedllvm/include/llvm/ADT/BitVector.h (diff)
Commit b7459a10dad1cf71dc0e6dcb97256bfbe3c2a28d by rafaelauler
[DWARF] Fix crash for DWARFDie::dump.

When DIE is extracted manually, the DieArray is empty. When dump is invoked on aforementioned DIE it tries to extract child, even if Dump options say otherwise. Resulting in crash.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D99698
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h (diff)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp (diff)
The file was addedllvm/unittests/DebugInfo/DWARF/DWARFDieManualExtractTest.cpp
The file was modifiedllvm/unittests/DebugInfo/DWARF/CMakeLists.txt (diff)
Commit 6ce1067f2ddd8623b163175ee9488673b9ced8d2 by Jonas Devlieghere
[lldb] Simplify output for skipped categories in dotest.py

Print a single line listing all the categories that are being skipped,
rather than relying on the check.*Support() functions specifying why a
particular category will be skipped. If we know why a category got
skipped, still print that in verbose mode.

The motivation for this change is that sometimes engineers misidentify
the output of these messages as the cause for a test failure (e.g. not
being able to build libc++ or libstdc++).

Differential revision: https://reviews.llvm.org/D100508
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest.py (diff)
Commit 730c0b6ea3da4f0260168f318a69789c3a3a8dc1 by llvmgnsyncbot
[gn build] Port b7459a10dad1
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/DebugInfo/DWARF/BUILD.gn (diff)
Commit d5e8dca1b622e377dfa02c67c11f968f623db03b by thakis
fix comment typos to cycle bots
The file was modifiedllvm/include/llvm/MC/MCStreamer.h (diff)
Commit 2e3a78b8ca10482226cc3cc05da17885aba02a8f by cjdb
[libcxx][NFC] adjusts formatting rules

This will reduce the amount of noisy feedback during reviews.

Differential Revision: https://reviews.llvm.org/D99691
The file was modifiedlibcxx/.clang-format (diff)
Commit 90ae4d9030b0abb04d1805c4f0802c17e58461c2 by joker.eph
Change add_mlir_doc CMake macro to take the tablegen command as last argument to allow extra flags

This is useful for expressing specific table-gen options, like selecting
a particular dialect to print.
Use it to fix the documentation for the `pdl_interp` dialect which is now
generating the first dialect it finds in its input which is `pdl`.

Differential Revision: https://reviews.llvm.org/D100517
The file was modifiedmlir/include/mlir/Dialect/Shape/Transforms/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Linalg/CMakeLists.txt (diff)
The file was modifiedmlir/cmake/modules/AddMLIR.cmake (diff)
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/CMakeLists.txt (diff)
The file was modifiedmlir/tools/mlir-tblgen/OpDocGen.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/DLTI/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/PDL/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/PDLInterp/IR/CMakeLists.txt (diff)
The file was modifiedmlir/tools/mlir-tblgen/DialectGen.cpp (diff)
The file was modifiedmlir/include/mlir/Conversion/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/OpenMP/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/X86Vector/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/AMX/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Tosa/Transforms/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/Transforms/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Reducer/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Vector/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/MemRef/Transforms/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/SCF/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/Transforms/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/ArmSVE/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/MemRef/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Affine/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Math/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Tensor/Transforms/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Quant/CMakeLists.txt (diff)
The file was modifiedmlir/examples/standalone/include/Standalone/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Async/IR/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/Async/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/OpenACC/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Transforms/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/ArmNeon/CMakeLists.txt (diff)
The file was modifiedmlir/include/mlir/Dialect/GPU/CMakeLists.txt (diff)
Commit 4973b0c4e774e18452f2a7da23af4dec7d368bfa by mahesha.comp
[AMDGPU] Disable forceful inline of non-kernel functions which use LDS.

Now since LDS uses within non-kernel functions are being handled in the
pass - LowerModuleLDS, we *NO* need to *forcefully* inline non-kernel
functions just because they use LDS. Do forceful inlining only when the
pass - LowerModuleLDS is not enabled. It is enabled by default.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D100481
The file was modifiedllvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address-codegen.ll (diff)
Commit 037bae8928f2eac16583ef0b19217eadc57ea37b by joker.eph
Fix Interface doc generation after recent change to add_mlir_doc() API

This is basically fixing the build of `mlir-doc`
The file was modifiedmlir/include/mlir/Interfaces/CMakeLists.txt (diff)
Commit 6148e3fc8e60fb0f0d06013008672512734f02e5 by mkazantsev
[Test] Propagate nofree attribute from function to calls
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-aliasning-path.ll (diff)
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-loop-load.ll (diff)
Commit f78dcb81af7d78dc07f343a86a0942df7297f9a3 by joker.eph
Fix the build of `mlir-doc` (again)

This is more fallout from add_mlir_doc() API change
The file was modifiedmlir/include/mlir/Interfaces/CMakeLists.txt (diff)
Commit 2a894b698c1a942399d735ec81a5b2b0bc5ae90e by Vitaly Buka
[scudo] Restore zxtest compatibility

Reviewed By: cryptoad

Differential Revision: https://reviews.llvm.org/D100426
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/combined_test.cpp (diff)
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/scudo_unit_test.h (diff)
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/primary_test.cpp (diff)
Commit ea5d33dbc1ecb0db9e202c00ba254dc028fdad21 by zakk.chen
[RISCV][Clang] Add vmv and vfmv series intrinsic functions.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Reviewed By: craig.topper, Jim

Differential Revision: https://reviews.llvm.org/D100266
The file was modifiedclang/utils/TableGen/RISCVVEmitter.cpp (diff)
The file was modifiedclang/include/clang/Basic/riscv_vector.td (diff)
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vfmv.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics/vmv.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmv.c
The file was addedclang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmv.c
Commit c3f127146415c1dd59db798fc244e14ec9feeed1 by craig.topper
[RISCV] Add a PatFrag to shorten repeated (XLenVT (VLOp GPR:$vl)) in V extension patterns.

Reduces the amount of changes needed in D100288.
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td (diff)
Commit 5a3ff24b1282e119bf8a3b82479d9cc2a0c6517a by flo
[NewGVN] Add phi-of-ops operands if no real PHI is created.

If the PHI-of-ops simplifies to an existing value, no real PHI is
created, which means the dependencies between the
PHI-of-ops and its operands is not materialized in IR. At the
moment, we fail to create a real PHI node for the PHI-of-ops,
because the PHI-of-ops root instruction is not re-visited if
one of the PHI-of-ops operands changes. We need to add the
operands as additional users in this case.

Even with this patch, there are still some dependencies
missing. I will continue tackling the outstanding
reporeted crashes in this area.

Fixes PR36501, PR42422, PR42557.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D66924
The file was addedllvm/test/Transforms/NewGVN/phi-of-ops-simplified-to-existing-value-then-changes-again.ll
The file was modifiedllvm/lib/Transforms/Scalar/NewGVN.cpp (diff)
Commit a1ed025d0ef99ba76c30b3d3753e5c2c40f9b755 by nikita.ppv
Revert "[SCEV] Don't walk uses of phis without SCEV expression when forgetting"

This reverts commit faf9f11589ce892b31d271917cf840f8ca903221.

Issues with this patch have been reported in
https://reviews.llvm.org/D100264#2689917 and
https://bugs.llvm.org/show_bug.cgi?id=49967.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h (diff)
Commit efee57925c3f46c74c6697234ce4f869e772834a by martin
Reland "[lit] Handle plain negations directly in the internal shell"

Keep running "not --crash" via the external "not" executable, but
for plain negations, and for cases that use the shell "!" operator,
just skip that argument and invert the return code.

The libcxx tests only use the shell operator "!" for negations,
never the "not" executable, because libcxx tests can be run without
having a fully built llvm tree available providing the "not"
executable.

This allows using the internal shell for libcxx tests.

It should be possible to reland this now that D99938 fixed the
one test failure in clang-tidy that broke when "not" was handled
internally, letting lit/python execute grep.exe directly instead
of via not.exe. (See D99330 and D99406 for more commentery on the
exact issue that broke and other potential ways of fixing it.)

Differential Revision: https://reviews.llvm.org/D98859
The file was modifiedllvm/utils/lit/tests/lit.cfg (diff)
The file was modifiedllvm/utils/lit/tests/shtest-not.py (diff)
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/exclamation-calls-external.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/exclamation-args-none.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/exclamation-args-nested-none.txt
The file was modifiedllvm/utils/lit/lit/TestRunner.py (diff)
Commit ee570e215353625a867fcbfd8c3089e9e0f8660d by martin
[clang] [test] Share patterns in CodeGen/ms_abi_aarch64.c between cases. NFC.

Differential Revision: https://reviews.llvm.org/D100468
The file was modifiedclang/test/CodeGen/ms_abi_aarch64.c (diff)
Commit 5144f730a8a8a4c7c7984ff945187a9aa83c91ac by martin
[AArch64] Fix windows vararg functions with floats in the fixed args

On Windows, float arguments are normally passed in float registers
in the calling convention for regular functions. For variable
argument functions, floats are passed in integer registers. This
already was done correctly since many years.

However, the surprising bit was that floats among the fixed arguments
also are supposed to be passed in integer registers, contrary to regular
functions. (This also seems to be the behaviour on ARM though, both
on Windows, but also on e.g. hardfloat linux.)

In the calling convention, don't promote shorter floats to f64, but
convert them to integers of the same length. (Floats passed as part of
the actual variable arguments are promoted to double already on the
C/Clang level; the LLVM vararg calling convention doesn't do any
extra promotion of f32 to f64 - this matches how it works on X86 too.)

Technically, this is an ABI break compared to older LLVM versions,
but it fixes compatibility with the official platform ABI. (In practice,
floats among the fixed arguments in variable argument functions is
a pretty rare construct.)

Differential Revision: https://reviews.llvm.org/D100365
The file was addedllvm/test/CodeGen/AArch64/win64_vararg_float.ll
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64CallingConvention.td (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll (diff)
Commit 3c23807569f0c5ff8fe5ef64c5e51f4e3e33dd03 by dvyukov
Add convenient composed tsan constants

This change adds convenient composed constants to be used for tsan_read_try_lock annotations, reducing the boilerplate at the instrumentation site.

Reviewed By: dvyukov

Differential Revision: https://reviews.llvm.org/D99595
The file was modifiedcompiler-rt/include/sanitizer/tsan_interface.h (diff)
Commit 01ad95ff2a7cc127eddf3832693bbd5c6c54f9ef by Jason Molenda
Mark armv6m compat with armv7em; match armv7em being compat with armv6m

armv7em and armv6m in ArchSpec cores_match() will return true.
There was a small bug where the reverse order would not return true.

rdar://76387176
The file was modifiedlldb/source/Utility/ArchSpec.cpp (diff)
Commit 06eff02ba18b02bff3a8d5759cc4a5ee043e4112 by Jan Svoboda
[clang][deps] NFC: Improve documentation

Fix typos and simplify wording
The file was modifiedclang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h (diff)
Commit 7120f89f7d8379c98fcf596da7c98cec04b89313 by david.sherwood
[NFC][LoopVectorize] Remove unnecessary VF.isScalable asserts

There are a few places in LoopVectorize.cpp where we have been too
cautious in adding VF.isScalable() asserts and it can be confusing.
It also makes it more difficult to see the genuine places where
work needs doing to improve scalable vectorization support.

This patch changes getMemInstScalarizationCost to return an
invalid cost instead of firing an assert for scalable vectors. Also,
vectorizeInterleaveGroup had multiple asserts all for the same
thing. I have removed all but one assert near the start of the
function, and added a new assert that we aren't dealing with masks
for scalable vectors.

Differential Revision: https://reviews.llvm.org/D99727
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp (diff)
Commit e7be90bd27051c3dcd9a344cb1b347a0c9454c21 by andrzej.warzynski
[flang] Update the regression tests to use the new driver when enabled

This patch updates most of the remaining regression tests (~400) to use
`flang-new` rather then `f18` when `FLANG_BUILD_NEW_DRIVER` is set.
This allows us to share more Flang regression tests between `f18` and
`flang-new`. A handful of tests have not been ported yet - these are
currently either failing or not supported by the new driver.

Summary of changes:
  * RUN lines in tests are updated to use `%flang_fc1` instead of `%f18`
  * option spellings in tests are updated to forms accepted by both `f18` and
    `flang-new`
  * variables in Bash scripts are renamed (e.g. F18 --> FLANG_FC1)
The updated tests will now be run with the new driver, `flang-new`,
whenever it is enabled (i.e when `FLANG_BUILD_NEW_DRIVER` is set).

Although this patch touches many files, vast majority of the changes are
automatic:
```
grep -IEZlr "%f18" flang/test/ | xargs -0 -l sed -i 's/%f18/%flang_fc1/g
```

Differential Revision: https://reviews.llvm.org/D100309
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Commit 71a45e7c63285614364d3d5dfcb4d48da6e7535d by Jason Molenda
NFC put the armv6m entry with the other Cortex-M entries

The armv6m entry in cores_match() got separated from its
friends armv7m and armv7em.  Reuniting them to make it
easier to keep them updated in all at the same time.
The file was modifiedlldb/source/Utility/ArchSpec.cpp (diff)
Commit acd9cc74957ba63967015946fc3349988ab200b1 by flo
[AArch64] Use type-legalization cost for code size memop cost.

At the moment, getMemoryOpCost returns 1 for all inputs if CostKind is
CodeSize or SizeAndLatency. This fools LoopUnroll into thinking memory
operations on large vectors have a cost of one, even if they will get
expanded to a large number of memory operations in the backend.

This patch updates getMemoryOpCost to return the cost for the type
legalization for both CodeSize and SizeAndLatency. This should more
accurately reflect the number of memory operations required.

I am not sure how latency should properly be included in SizeAndLatency
from the description, but returning the size cost should be clearly more
accurate.

This does not cause any binary changes when building
MultiSource/SPEC2000/SPEC2006 with -O3 -flto for AArch64, likely because
large vector memops are not really formed by code emitted from Clang.
But using the C/C++ matrix extension can easily result in code with very
large vector operations directly from Clang, e.g.
https://clang.godbolt.org/z/6xzxcTGvb

Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D100291
The file was modifiedllvm/test/Analysis/CostModel/AArch64/store.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnroll/AArch64/large-vector-ops.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)
Commit ce1626f34ad41f8eb6b559ab26f093640c50aefd by dfukalov
[AA] Updates for D95543.

Addressing latter comments in D95543:
- `AliasResult::Result` renamed to `AliasResult::Kind`
- Offset printing added for `PartialAlias` case in `-aa-eval`
- Removed VisitedPhiBBs check from BasicAA'

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D100454
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp (diff)
The file was modifiedllvm/test/Analysis/BasicAA/invariant_group.ll (diff)
The file was modifiedllvm/lib/Analysis/AliasAnalysis.cpp (diff)
The file was modifiedllvm/test/Analysis/BasicAA/gep-modulo.ll (diff)
The file was modifiedllvm/include/llvm/Analysis/AliasAnalysis.h (diff)
The file was modifiedllvm/test/Analysis/BasicAA/recphi.ll (diff)
The file was modifiedllvm/lib/Analysis/AliasAnalysisEvaluator.cpp (diff)
Commit eae0ac3a1f4c63762577520b2a4ad6c6ed144323 by fraser
[RISCV] Pre-commit vector shuffle test cases

This codegen will be improved by future patches.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp