Started 5 mo 12 days ago
Took 8 hr 24 min

Build #4856 (Dec 6, 2021 3:31:19 PM)

Changes
  1. [CSKY] Add compressed instruction mapping between 32-bit and 16-bit instruction (details / githubweb)
  2. [clang-format] Adjust braced list detection (details / githubweb)
  3. [mlir][linalg] Pad independent of application order (NFC). (details / githubweb)
  4. [mlir][Vector] Support 0-D vectors in `ConstantMaskOp` (details / githubweb)
  5. [llvm-c] Add header deprecations (details / githubweb)
  6. [mlir][linalg][bufferize][NFC] Collect equivalent FuncOp BBArgs in PostAnalysisStep (details / githubweb)
  7. [mlir] Add default implementations for methods in `TilingInterface`. (details / githubweb)
  8. [WebAssembly] Implementation of intrinsic for ref.null and HeapType removal (details / githubweb)
  9. [mlir][linalg][bufferize] Remove buffer equivalence from bufferize (details / githubweb)
  10. [analyzer] Ignore flex generated files (details / githubweb)
  11. [mlir][linalg][bufferize][NFC] Utilize isWritable for FuncOps (details / githubweb)
  12. [clang][DebugInfo] Allow function-local statics and types to be scoped within a lexical block (details / githubweb)
  13. [VE] Support multiple architectures installation (details / githubweb)
  14. [NFC][LICM] Update the comment in the scalar-promote.ll (details / githubweb)
  15. [ARM] Add a vrinta.f16.f16 alias (details / githubweb)
  16. [VE] Change to use R_VE_SREL32 (details / githubweb)
  17. [ARM] Implement setjmp BTI placement for PACBTI-M (details / githubweb)
  18. [VE] Support VE specific data directives in MC (details / githubweb)
  19. [clang][docs][dataflow] Added an introduction to dataflow analysis (details / githubweb)
  20. [LV] Pass compare predicate to getCmpSelInstrCost. (details / githubweb)
  21. tsan: disable dlopen_static_tls.cpp test on powerpc64 (details / githubweb)
  22. [Clang] Ignore CLANG_DEFAULT_LINKER for custom-linker toolchains (details / githubweb)
  23. [mlir] Avoid needlessly converting LLVM named structs with compatible elements (details / githubweb)
  24. [DSE] Add additional memset_chk tests. (details / githubweb)
  25. [openmp][amdgpu] Disable tests requiring USM on amdgcn (details / githubweb)
  26. [lldb] [Process/elf-core] Disable for FreeBSD vmcores (details / githubweb)
  27. [lldb] Remove extern "C" from lldb-swig-lua interface (details / githubweb)
  28. [lldb/lua] Add a file that should have been a part of a52af6d3 (details / githubweb)
  29. [lldb/qemu] Add support for pty redirection (details / githubweb)
  30. [MC] Add emitXCOFFSymbolLinkageWithVisibility to MCNullStreamer (details / githubweb)

Started by upstream project clang-stage2-Rthinlto_relay build number 6698
originally caused by:

This run spent:

  • 8 hr 29 min waiting;
  • 8 hr 24 min build duration;
  • 16 hr total from scheduled to completion.
Revision: b4e033604f7e6eba38e0a6341d267c7f4f592ee8
Repository: https://github.com/llvm/llvm-zorg.git
  • refs/remotes/origin/main
Revision: b23d17f6b5f7748645996f54c79dc0b58aa5a9c2
Repository: https://github.com/llvm/llvm-project.git
  • detached
Test Result (no failures)