UnstableChanges

Summary

  1. [WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION (details)
  2. [mlir] replace LLVMIntegerType with built-in integer type (details)
  3. [mlir] don't match the text produced only in debug mode in Python tests (details)
  4. [SLP] remove opcode identifier for reduction; NFC (details)
  5. Simplify vectorcall argument classification of HVAs, NFC (details)
  6. [NFC][AMDGPU] Reduce include files dependency. (details)
  7. [OpenMP] Add example in Libomptarget Information docs (details)
  8. Fix gcc5 build failure (NFC) (details)
  9. [Clang][Driver] Fix read-after-free when using /clang: (details)
  10. [OpenMP][Docs] Add remarks intro section (details)
  11. [OpenMP][Fix] Make the arch selector for x86_64 work (details)
  12. [OpenMP][FIX] Ensure the isa trait is evaluated last (details)
  13. [clang] Change builtin object size when subobject is invalid (details)
  14. [OpenMP][Docs] Mark finished features as done (details)
  15. [llvm-pdbutil] Don't crash when printing unknown CodeView type records (details)
  16. [mlir] Adds argument attributes for using LLVM's sret and byval attributes (details)
  17. [OpenMP][FIX] Avoid string literal comparison, use `StringRef::equal` (details)
  18. Fix include path for check-gdb-mlir-support to include the MLIR binary dir (details)
  19. Fix check-gdb-mlir-support build after MLIR API changed to take Context as first argument (details)
  20. GlobalISel: Add combine for G_UREM by power of 2 (details)
  21. [NFC] clang/test/openMP/target_codegen.cpp should not depend on ssa name (details)
  22. [libc++abi] Simplify __gxx_personality_v0 (details)
  23. [test] Move coro-retcon-unreachable.ll into llvm/test (details)
  24. [CoroSplit][NewPM] Don't call LazyCallGraph functions to split when no clones (details)
  25. Fixup Asserts+!AbiBreakingChecks fallout from db33f85c7124 (details)
  26. [TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a StringRef instead of const std::string &. (details)
  27. [LLD][COFF] When using PCH.OBJ, ensure func_id records indices are remapped under /DEBUG:GHASH (details)
  28. lldb: Add support for DW_AT_ranges on DW_TAG_subprograms (details)
  29. [libc++] Fix typo in run-buildbot (details)
  30. GlobalISel: Fail legalization on narrowing extload below memory size (details)
  31. [hip] Enable HIP compilation with `<complex`> on MSVC. (details)
  32. [OpenMP] Always print error messages in libomptarget CUDA plugin (details)
  33. [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection (details)
  34. [NewPM][Hexagon] Fix HexagonVectorLoopCarriedReusePass position in pipeline (details)
  35. [libc++] Alphabetize generate_feature_test_macro_components.py. NFCI. (details)
  36. [NewPM][NVPTX] Port NVPTX opt passes (details)
  37. [NFC][SimplifyCFG] Add a test with cond br on constant w/ identical destinations (details)
  38. [SimplifyCFG] ConstantFoldTerminator(): handle matching destinations of condbr earlier (details)
  39. [SimplifyCFG] ConstantFoldTerminator(): switch to non-permissive DomTree updates in `SwitchInst` handling (details)
  40. [NFC][SimlifyCFG] Add some indirectbr-of-blockaddress tests (details)
  41. [SimplifyCFG] ConstantFoldTerminator(): switch to non-permissive DomTree updates in `indirectbr` handling (details)
  42. [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock(): switch to non-permissive DomTree updates (details)
  43. [NFC][SimplifyCFG] Add test with an unreachable block with two identical successors (details)
  44. [SimplifyCFG] removeUnreachableBlocks(): switch to non-permissive DomTree updates (details)
  45. [NFC][SimplifyCFG] Add a test with an undef cond branch to identical destinations (details)
  46. [SimplifyCFG] changeToUnreachable(): switch to non-permissive DomTree updates (details)
  47. [SimplifyCFG] MergeBlockIntoPredecessor(): switch to non-permissive DomTree updates (details)
  48. [SimplifyCFG] DeleteDeadBlocks(): switch to non-permissive DomTree updates (details)
  49. [SimplifyCFG] changeToCall(): switch to non-permissive DomTree updates (details)
  50. [SimplifyCFG] removeUnwindEdge(): switch to non-permissive DomTree updates (details)
  51. [SimplifyCFG] markAliveBlocks(): switch to non-permissive DomTree updates (details)
Commit 5c38ae36c58f5b6bb4a32e9ec2187fde86cf94b8 by aardappel
[WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION

A struct in C passed by value did not get debug information. Such values are currently
lowered to a Wasm local even in -O0 (not to an alloca like on other archs), which becomes
a Target Index operand (TI_LOCAL). The DWARF writing code was not emitting locations
in for TI's specifically if the location is a single range (not a list).

In addition, the ExplicitLocals pass which removes the ARGUMENT pseudo instructions did
not update the associated DBG_VALUEs, and couldn't even find these values since the code
assumed such instructions are adjacent, which is not the case here.

Also fixed asm printing of TIs needed by a test.

Differential Revision: https://reviews.llvm.org/D94140
The file was addedllvm/test/MC/WebAssembly/debug-byval-struct.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/dbgvalue.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was modifiedlld/test/wasm/debuginfo.test
Commit 2230bf99c712a1e9cb3a9f423998aa8727b389fc by zinenko
[mlir] replace LLVMIntegerType with built-in integer type

The LLVM dialect type system has been closed until now, i.e. did not support
types from other dialects inside containers. While this has had obvious
benefits of deriving from a common base class, it has led to some simple types
being almost identical with the built-in types, namely integer and floating
point types. This in turn has led to a lot of larger-scale complexity: simple
types must still be converted, numerous operations that correspond to LLVM IR
intrinsics are replicated to produce versions operating on either LLVM dialect
or built-in types leading to quasi-duplicate dialects, lowering to the LLVM
dialect is essentially required to be one-shot because of type conversion, etc.
In this light, it is reasonable to trade off some local complexity in the
internal implementation of LLVM dialect types for removing larger-scale system
complexity. Previous commits to the LLVM dialect type system have adapted the
API to support types from other dialects.

Replace LLVMIntegerType with the built-in IntegerType plus additional checks
that such types are signless (these are isolated in a utility function that
replaced `isa<LLVMType>` and in the parser). Temporarily keep the possibility
to parse `!llvm.i32` as a synonym for `i32`, but add a deprecation notice.

Reviewed By: mehdi_amini, silvas, antiagainst

Differential Revision: https://reviews.llvm.org/D94178
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
The file was modifiedmlir/test/Dialect/Linalg/llvm.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/standard-to-llvm.mlir
The file was modifiedmlir/test/lib/Transforms/TestConvertCallOp.cpp
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/lower-host-to-llvm-calls.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
The file was modifiedmlir/test/Target/arm-sve.mlir
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/types.mlir
The file was modifiedmlir/test/Target/import.ll
The file was modifiedmlir/docs/Dialects/LLVM.md
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
The file was modifiedmlir/test/Dialect/GPU/outlining.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/func.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/legalize-for-export.mlir
The file was modifiedmlir/lib/ExecutionEngine/JitRunner.cpp
The file was modifiedmlir/test/Conversion/GPUCommon/lower-launch-func-to-gpu-runtime-calls.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/roundtrip.mlir
The file was modifiedmlir/docs/SPIRVToLLVMDialectConversion.md
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/TypeDetail.h
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
The file was modifiedmlir/test/Target/nvvmir.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-static-memref-ops.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/types-invalid.mlir
The file was modifiedmlir/test/Target/rocdl.mlir
The file was modifiedmlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
The file was modifiedmlir/lib/Target/LLVMIR/TypeTranslation.cpp
The file was modifiedmlir/test/Target/llvmir-intrinsics.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/comparison-ops-to-llvm.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/nvvm.mlir
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/test/Conversion/GPUToVulkan/invoke-vulkan.mlir
The file was modifiedmlir/test/Dialect/OpenMP/ops.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir
The file was modifiedmlir/docs/Tutorials/Toy/Ch-6.md
The file was modifiedmlir/test/Dialect/LLVMIR/global.mlir
The file was modifiedmlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-argattrs.mlir
The file was modifiedmlir/test/Dialect/SPIRV/IR/types.mlir
The file was modifiedmlir/test/Target/openmp-llvm.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-funcs.mlir
The file was modifiedmlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
The file was modifiedmlir/test/Transforms/test-convert-call-op.mlir
The file was modifiedmlir/lib/Conversion/GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
The file was modifiedmlir/docs/ConversionToLLVMDialect.md
The file was modifiedmlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir
The file was modifiedmlir/docs/LLVMDialectMemRefConvention.md
The file was modifiedmlir/test/Conversion/GPUCommon/memory-attrbution.mlir
The file was modifiedmlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
The file was modifiedmlir/test/Target/llvmir.mlir
The file was modifiedmlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
The file was modifiedmlir/integration_test/Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/bitwise-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/shift-ops-to-llvm.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-dynamic-memref-ops.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/constant-op-to-llvm.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/rocdl.mlir
The file was modifiedmlir/test/Target/llvmir-types.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/func-ops-to-llvm.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/terminator.mlir
The file was modifiedmlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/control-flow-ops-to-llvm.mlir
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/logical-ops-to-llvm.mlir
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
The file was modifiedmlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
The file was modifiedmlir/test/mlir-cpu-runner/bare_ptr_call_conv.mlir
The file was modifiedmlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
The file was modifiedmlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
The file was modifiedmlir/test/Target/avx512.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/test/Conversion/StandardToLLVM/calling-convention.mlir
The file was modifiedmlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/dialect-cast.mlir
The file was modifiedmlir/test/mlir-cpu-runner/simple.mlir
The file was modifiedmlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp
Commit 906efeec0a471be522588bd7cbb7f61459b2b437 by zinenko
[mlir] don't match the text produced only in debug mode in Python tests

Some Python bindings tests were using FileCheck to match parts of the
error description produced only in the debug compilation mode. Remove
these parts (but keep the main message) to ensure tests also pass when
running them in the release compilation mode.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D94221
The file was modifiedmlir/test/Bindings/Python/ir_attributes.py
The file was modifiedmlir/test/Bindings/Python/ir_operation.py
Commit 4c7148d75cd7e75f169251cdab3e013819344cfd by spatel
[SLP] remove opcode identifier for reduction; NFC

Another step towards allowing intrinsics in reduction matching.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit ad55d5c3f32f6598f8ac30b68f4961d82cdb1fed by rnk
Simplify vectorcall argument classification of HVAs, NFC

This reduces the number of `WinX86_64ABIInfo::classify` call sites from
3 to 1. The call sites were similar, but passed different values for
FreeSSERegs. Use variables instead of `if`s to manage that argument.
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
Commit 6a87e9b08bf093ba3ccba8650b89f4d337c497f4 by dfukalov
[NFC][AMDGPU] Reduce include files dependency.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D93813
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertSkips.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600AsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPostRABundler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUExportClustering.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
The file was modifiedllvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPTNote.h
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
The file was modifiedllvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.h
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFStreamer.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDKernelCodeT.h
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNILPSched.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegPressure.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIAddIMGInit.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegPressure.h
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/lib/Target/AMDGPU/SIModeRegister.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600FrameLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
The file was modifiedllvm/lib/Support/AMDGPUMetadata.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInline.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineScheduler.h
The file was modifiedllvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600OpenCLImageTypeLoweringPass.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMacroFusion.h
The file was modifiedllvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
The file was modifiedllvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600FrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600RegisterInfo.cpp
The file was modifiedllvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFStreamer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was modifiedllvm/lib/Target/AMDGPU/R600ISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600InstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNIterativeScheduler.h
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600Packetizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/R600Defines.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit abb174bbc100437556fd386d920a9939723e0647 by jhuber6
[OpenMP] Add example in Libomptarget Information docs

Add an example to the OpenMP Documentation on the LIBOMPTARGET_INFO environment variable

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94246
The file was modifiedopenmp/docs/design/Runtimes.rst
Commit 467e916d3032bc068995aa1b6b16655eb573e750 by joker.eph
Fix gcc5 build failure (NFC)

The loop index was shadowing the container name.
It seems that we can just not use a for-range loop here since there is
an induction variable anyway.

Differential Revision: https://reviews.llvm.org/D94254
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
Commit 3854b81b0fd23adc9bab91bf68918d102dc31f51 by alexandre.ganea
[Clang][Driver] Fix read-after-free when using /clang:

Fixes PR42501.

Differential Revision: https://reviews.llvm.org/D93772
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/test/Driver/cl-options.c
Commit 9ae171bcd38cdefa64c9dd5d763d16007eebcd0d by johannes
[OpenMP][Docs] Add remarks intro section

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D93735
The file was modifiedopenmp/docs/remarks/OptimizationRemarks.rst
Commit d970a285b8567b93aea39e7e4d10965fe8b7340c by johannes
[OpenMP][Fix] Make the arch selector for x86_64 work

The triple uses a bar "x86-64" instead of an underscore. Since we
have troubles accepting x86-64 as an identifier, we stick with
x86_64 in the frontend and translate it explicitly.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D93786
The file was addedclang/test/OpenMP/declare_variant_ast_x86_64.c
The file was modifiedllvm/lib/Frontend/OpenMP/OMPContext.cpp
Commit 36c4dc9b42fe2e6af4ab488b7c4013d5082b67f6 by johannes
[OpenMP][FIX] Ensure the isa trait is evaluated last

Since isa can cause diagnostics we want it to be evaluated last to avoid
the "unknown isa" warning if the rest of the selector wouldn't match
anyway. That allows us to guard isa with arch properly.

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D93785
The file was modifiedclang/test/OpenMP/begin_declare_variant_messages.c
The file was modifiedclang/test/OpenMP/declare_variant_messages.c
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPKinds.def
The file was modifiedclang/test/OpenMP/nvptx_declare_variant_name_mangling.cpp
The file was modifiedclang/test/OpenMP/declare_variant_messages.cpp
Commit 275f30df8ad6de75e1f29e4b33eaeb67686caf0d by George Burgess IV
[clang] Change builtin object size when subobject is invalid

Motivating example:

```
  struct { int v[10]; } t[10];

  __builtin_object_size(
      &t[0].v[11], // access past end of subobject
      1            // request remaining bytes of closest surrounding
                   // subobject
  );
```

In GCC, this returns 0. https://godbolt.org/z/7TeGs7

In current clang, however, this returns 356, the number of bytes
remaining in the whole variable, as if the `type` was 0 instead of 1.
https://godbolt.org/z/6Kffox

This patch checks for the specific case where we're requesting a
subobject's size (type 1) but the subobject is invalid.

Differential Revision: https://reviews.llvm.org/D92892
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/test/CodeGen/object-size.c
Commit 6e7101530dae78efd7b5cdffc1338790ed3e5705 by johannes
[OpenMP][Docs] Mark finished features as done

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D94185
The file was modifiedclang/docs/OpenMPSupport.rst
Commit ce7f30b2a874386a0ce089c98327acb65e87b04d by alexandre.ganea
[llvm-pdbutil] Don't crash when printing unknown CodeView type records

Differential Revision: https://reviews.llvm.org/D93720
The file was modifiedllvm/tools/llvm-pdbutil/DumpOutputStyle.cpp
The file was modifiedllvm/tools/llvm-pdbutil/FormatUtil.cpp
The file was modifiedllvm/tools/llvm-pdbutil/FormatUtil.h
The file was addedllvm/test/tools/llvm-pdbutil/Inputs/unknown-record.obj
The file was addedllvm/test/tools/llvm-pdbutil/unknown-records.test
Commit 70b841ac317765c5c504334f7a22ac085f14ac2d by eschweitz
[mlir] Adds argument attributes for using LLVM's sret and byval attributes
to the conversion of LLVM IR dialect. These attributes are used in FIR to
support the lowering of Fortran using target-specific calling conventions.

Add roundtrip tests.

Add changes per review comments/concerns.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D94052
The file was modifiedmlir/test/Dialect/LLVMIR/func.mlir
The file was modifiedmlir/test/Target/llvmir-invalid.mlir
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
Commit 0b0f2e6ee0c3e52398a0d0c4a5131d4a23d8b1ee by johannes
[OpenMP][FIX] Avoid string literal comparison, use `StringRef::equal`
The file was modifiedllvm/lib/Frontend/OpenMP/OMPContext.cpp
Commit 476db17dcb64ef3ec6e247f4b1c673b57f61a367 by joker.eph
Fix include path for check-gdb-mlir-support to include the MLIR binary dir

This fixes a build failure:

fatal error: 'mlir/IR/BuiltinTypes.h.inc' file not found
The file was modifieddebuginfo-tests/CMakeLists.txt
Commit 9e1aaa9943b814c22ae03f4abb3171dac8062801 by joker.eph
Fix check-gdb-mlir-support build after MLIR API changed to take Context as first argument
The file was modifieddebuginfo-tests/llvm-prettyprinters/gdb/mlir-support.cpp
Commit 1f9b6ef91ffd8ea487aa083d146c7568e7243457 by Matthew.Arsenault
GlobalISel: Add combine for G_UREM by power of 2

Really I want this in the legalizer, but this is a start.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
Commit 63b42a0514567d24df617e4587e80e4564ebf120 by tianshilei1992
[NFC] clang/test/openMP/target_codegen.cpp should not depend on ssa name

This makes the test more robust to other changes.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D93038
The file was modifiedclang/test/OpenMP/target_codegen.cpp
Commit 85f86e8a3cf9e05347691fdde30e9e98a6657d92 by i
[libc++abi] Simplify __gxx_personality_v0

In three cases we call `scan_eh_tab` to parse LSDA:

* `actions & _UA_SEARCH_PHASE`
* `actions & _UA_CLEANUP_PHASE && actions & _UA_HANDLER_FRAME && !native_exception`
* `actions & _UA_CLEANUP_PHASE && !(actions & _UA_HANDLER_FRAME)`

Check
`actions & _UA_CLEANUP_PHASE && actions & _UA_HANDLER_FRAME && native_exception` first,
then we can move three `scan_eh_tab` into one place.

Another simplification is that we can check whether the result of `scan_eh_tab`
is `_UA_CONTINUE_UNWIND` or `_UA_FATAL_PHASE1_ERROR` first. Then many of the
original checks will be dead and can thus be deleted.

Reviewed By: #libc_abi, ldionne

Differential Revision: https://reviews.llvm.org/D93186
The file was modifiedlibcxxabi/src/cxa_personality.cpp
Commit d002cd4e0f10f20c4f8b419ffa23d782636e46d8 by aeubanks
[test] Move coro-retcon-unreachable.ll into llvm/test

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D94257
The file was removedclang/test/CodeGenCoroutines/coro-retcon-unreachable.ll
The file was addedllvm/test/Transforms/Coroutines/coro-retcon-unreachable.ll
Commit 1a2eaebc09c6a200f93b8beb37130c8b8aab3934 by aeubanks
[CoroSplit][NewPM] Don't call LazyCallGraph functions to split when no clones

Apparently there can be no clones, as happens in
coro-retcon-unreachable.ll.

The alternative is to allow no split functions in
addSplitRefRecursiveFunctions(), but it seems better to have the caller
make sure it's not accidentally splitting no functions out.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D94258
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon-unreachable.ll
The file was modifiedllvm/lib/Transforms/Coroutines/CoroSplit.cpp
Commit 3503c856819efc01ce210fa56e597ddfb7a4c1a1 by dblaikie
Fixup Asserts+!AbiBreakingChecks fallout from db33f85c7124
The file was modifiedllvm/unittests/IR/ValueHandleTest.cpp
The file was modifiedllvm/include/llvm/IR/ValueHandle.h
The file was modifiedllvm/unittests/Support/DataExtractorTest.cpp
Commit 973c35d3384ace023000eb44442f86a2543ab9eb by craig.topper
[TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a StringRef instead of const std::string &.

All callers use a string literal and the getDef method the string
is passed to already takes a StringRef.
The file was modifiedllvm/utils/TableGen/CodeGenDAGPatterns.cpp
The file was modifiedllvm/utils/TableGen/CodeGenDAGPatterns.h
Commit eaadb41db6233cf1c9e882d74a31c1f9d6e211ff by alexandre.ganea
[LLD][COFF] When using PCH.OBJ, ensure func_id records indices are remapped under /DEBUG:GHASH

Before this patch, when using LLD with /DEBUG:GHASH and MSVC precomp.OBJ files, we had a bunch of:

lld-link: warning: S_[GL]PROC32ID record in blabla.obj refers to PDB item index 0x206ED1 which is not a LF[M]FUNC_ID record

This was caused by LF_FUNC_ID and LF_MFUNC_ID which didn't have correct mapping to the corresponding TPI records. The root issue was that the indexMapStorage was improperly re-assembled in UsePrecompSource::remapTpiWithGHashes.

After this patch, /DEBUG and /DEBUG:GHASH produce exactly the same debug infos in the PDB.

Differential Revision: https://reviews.llvm.org/D93732
The file was addedlld/test/COFF/Inputs/precomp-ghash-obj1.obj
The file was modifiedlld/COFF/DebugTypes.cpp
The file was addedlld/test/COFF/precomp-ghash.test
The file was addedlld/test/COFF/Inputs/precomp-ghash-precomp.obj
The file was addedlld/test/COFF/Inputs/precomp-ghash-obj2.obj
Commit 274afac9a17f43e5396a0d6c7a0741702596a7bd by dblaikie
lldb: Add support for DW_AT_ranges on DW_TAG_subprograms

gcc already produces debug info with this form
-freorder-block-and-partition
clang produces this sort of thing with -fbasic-block-sections and with a
coming-soon tweak to use ranges in DWARFv5 where they can allow greater
reuse of debug_addr than the low/high_pc forms.

This fixes the case of breaking on a function name, but leaves broken
printing a variable - a follow-up commit will add that and improve the
test case to match.

Differential Revision: https://reviews.llvm.org/D94063
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
The file was addedlldb/test/Shell/SymbolFile/DWARF/subprogram_ranges.test
The file was addedlldb/test/Shell/SymbolFile/DWARF/Inputs/subprogram_ranges.s
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
Commit c01202a7efdd73fed280755184762b0ef8a5b78a by Louis Dionne
[libc++] Fix typo in run-buildbot

The installation directory was never meant to contain a brace.
The file was modifiedlibcxx/utils/ci/run-buildbot
Commit 2cbbc6e87c4b565a54c9bb85e34d464acb608f16 by Matthew.Arsenault
GlobalISel: Fail legalization on narrowing extload below memory size
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit f78d6af7319aa676a0f9f6cbb982f21c96e9aac5 by michael.hliao
[hip] Enable HIP compilation with `<complex`> on MSVC.

- MSVC has different `<complex>` implementation which calls into functions
  declared in `<ymath.h>`. Provide their device-side implementation to enable
  `<complex>` compilation on HIP Windows.

Differential Revision: https://reviews.llvm.org/D93638
The file was modifiedclang/lib/Headers/__clang_hip_cmath.h
Commit 2ce16810f28379b0a56f7036895a04e18d6b4506 by huberjn
[OpenMP] Always print error messages in libomptarget CUDA plugin

Summary:
Currently error messages from the CUDA plugins are only printed to the user if they have debugging enabled. Change this behaviour to always print the messages that result in offloading failure. This improves the error messages by indidcating what happened when the error occurs in the plugin library, such as a segmentation fault on the device.

Reviewed by: jdoerfert

Differential Revision: https://reviews.llvm.org/D94263
The file was modifiedopenmp/libomptarget/plugins/cuda/src/rtl.cpp
Commit 15f5971150684b656005cfd5b744c1a34477ff60 by luismarques
[LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection

Adds the RISC-V ArchSpec bits contributed by @simoncook as part of D62732,
plus logic to distinguish between riscv32 and riscv64 based on ELF class.

The patch follows the implementation approach previously used for MIPS.
It defines RISC-V architecture subtypes and inspects the ELF header,
namely the ELF class, to detect the right subtype.

Differential Revision: https://reviews.llvm.org/D86292
The file was modifiedlldb/source/Utility/ArchSpec.cpp
The file was addedlldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml
The file was modifiedlldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
The file was modifiedlldb/include/lldb/Utility/ArchSpec.h
Commit b2dafd44ca7a975e3d58d68f3a24e36b2ceb2e1e by aeubanks
[NewPM][Hexagon] Fix HexagonVectorLoopCarriedReusePass position in pipeline

In https://reviews.llvm.org/D88138 this was incorrectly added with
registerOptimizerLastEPCallback(), when it should be
registerLoopOptimizerEndEPCallback(), matching the legacy PM's
EP_LoopOptimizerEnd.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D93929
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
Commit ff1b6f9ff27cc4d5607ea2b5daa980a1c553236b by arthur.j.odwyer
[libc++] Alphabetize generate_feature_test_macro_components.py. NFCI.

For ease of comparing our list with the official SD-6 list, which is alphabetized.
https://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations#library-feature-test-macros
This also alphabetizes the lists of headers in which the macros are
defined, which harmlessly alters many comments in <version>.
Also drive-by-fix some trivial flake8 warnings.
The file was modifiedlibcxx/include/version
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
Commit 9ccf13c36d1c450bc9a74bd04c9730df56f8bd73 by aeubanks
[NewPM][NVPTX] Port NVPTX opt passes

There are only two used in the IR optimization pipeline.
Port these and add them to the default pipeline.

Similar to https://reviews.llvm.org/D93863.

I added -mtriple to some tests since under the new PM, the passes are
only available when the TargetMachine is specified.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D93930
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetMachine.h
The file was modifiedllvm/test/CodeGen/NVPTX/nvvm-reflect.ll
The file was modifiedllvm/lib/Target/NVPTX/NVPTX.h
The file was modifiedllvm/lib/Target/NVPTX/NVVMReflect.cpp
The file was modifiedllvm/tools/opt/opt.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVVMIntrRange.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/NVPTX/nvvm-reflect-module-flag.ll
The file was modifiedllvm/test/CodeGen/NVPTX/intrinsic-old.ll
Commit 087be536feab0aacc043aed52bee2e48e90e538c by lebedev.ri
[NFC][SimplifyCFG] Add a test with cond br on constant w/ identical destinations
The file was modifiedllvm/test/Transforms/SimplifyCFG/branch-fold.ll
Commit 16ab8e5f6dbbeb5b8e900677f4a64c9924ecd7ba by lebedev.ri
[SimplifyCFG] ConstantFoldTerminator(): handle matching destinations of condbr earlier

We need to handle this case before dealing with the case of constant
branch condition, because if the destinations match, latter fold
would try to remove the DomTree edge that would still be present.

This allows to make that particular DomTree update non-permissive
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit 36593a30a40b52e8040d821bbd294ef6758cf9cf by lebedev.ri
[SimplifyCFG] ConstantFoldTerminator(): switch to non-permissive DomTree updates in `SwitchInst` handling

... which requires not deleting edges that will still be present.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit 8b9a0e6f7ed2fa3293ba5cd2c2fb1acd21db6e2d by lebedev.ri
[NFC][SimlifyCFG] Add some indirectbr-of-blockaddress tests
The file was modifiedllvm/test/Transforms/SimplifyCFG/indirectbr.ll
Commit b3822728fae2e3755d6daff7fc31fbac16e61fe4 by lebedev.ri
[SimplifyCFG] ConstantFoldTerminator(): switch to non-permissive DomTree updates in `indirectbr` handling

... which requires not deleting edges that were just deleted already.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit 1f9b591ee66fe5abd6f63990b085e1f1f559d8d9 by lebedev.ri
[SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock(): switch to non-permissive DomTree updates

... which requires not deleting edges that were just deleted already,
    by not processing the same predecessor more than once.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit f8875c313c381764a9734dbd6e94539e8837d9f7 by lebedev.ri
[NFC][SimplifyCFG] Add test with an unreachable block with two identical successors
The file was addedllvm/test/Transforms/SimplifyCFG/unreachable-matching-successor.ll
Commit 7600d7c7be07ee78543522d0fbd1e92e672a0327 by lebedev.ri
[SimplifyCFG] removeUnreachableBlocks(): switch to non-permissive DomTree updates

... which requires not deleting edges that were just deleted already,
    by not processing the same predecessor more than once.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit 6984781df9b584febce51b7740c8738a076f5692 by lebedev.ri
[NFC][SimplifyCFG] Add a test with an undef cond branch to identical destinations
The file was addedllvm/test/Transforms/SimplifyCFG/change-to-unreachable-matching-successor.ll
Commit 05adc73db053fd79e64901e359e6ee783d772a80 by lebedev.ri
[SimplifyCFG] changeToUnreachable(): switch to non-permissive DomTree updates

... which requires not deleting edges that were just deleted already,
    by not processing the same predecessor more than once.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit 66189212bbb0351ae98bbda70bd2cd819e86fd17 by lebedev.ri
[SimplifyCFG] MergeBlockIntoPredecessor(): switch to non-permissive DomTree updates

... which requires not deleting edges that were just deleted already,
    by not processing the same successor more than once.
The file was modifiedllvm/lib/Transforms/Utils/BasicBlockUtils.cpp
Commit be0a31d13bcf28577f65b8e189a8bb105b000274 by lebedev.ri
[SimplifyCFG] DeleteDeadBlocks(): switch to non-permissive DomTree updates

No actual changes needed, DetatchDeadBlocks() was already doing the right thing.
The file was modifiedllvm/lib/Transforms/Utils/BasicBlockUtils.cpp
Commit f0eba8ce2d4027a890751b7617e98730d7d682f6 by lebedev.ri
[SimplifyCFG] changeToCall(): switch to non-permissive DomTree updates

No actual changes needed, normal and unwind destinations of an invoke
can never be identical.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit d59f97bb3a652565ac074e76da2b6b54816880f3 by lebedev.ri
[SimplifyCFG] removeUnwindEdge(): switch to non-permissive DomTree updates

No actual changes needed, Catchswitch cannot unwind to one of its catchpads.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit f2f81c554b0d38edf754a220bcb063876747ee6b by lebedev.ri
[SimplifyCFG] markAliveBlocks(): switch to non-permissive DomTree updates

No actual changes needed, invoke can't have the same block as an unwind
destination and a normal destination.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp