Started 1 mo 14 days ago
Took 2 hr 6 min

Success Build #2892 (May 11, 2021 11:02:04 AM)

Changes
  1. [Zorg][OpenMP] Add CUDA offloading worker. (details / githubweb)
Changes
  1. [X86][SSE] Replace foldShuffleOfHorizOp with generalized version in canonicalizeShuffleMaskWithHorizOp (details)
  2. [X86] Replace repeated isa/cast<ConstantSDNode> calls with single single dyn_cast<>. NFCI. (details)
  3. [TableGen] Make the NUL character invalid in .td files (details)
  4. [X86] X86TTIImpl::getInterleavedMemoryOpCostAVX2(): use getMemoryOpCost() (details)
  5. [VPlan] Register recipe for instr if the simplified value is recipe. (details)
  6. [OpenMP] Fix hidden helper + affinity (details)
  7. Revert "[TableGen] Make the NUL character invalid in .td files" (details)
  8. Fix typo "Execpt" in comments (details)
  9. [LoopInterchange] Fix legality for triangular loops (details)
  10. Revert "[AMDGPU][OpenMP] Emit textual IR for -emit-llvm -S" (details)
  11. [NFC][AMDGPU] Correct product name for gfx908 (details)
  12. [IR][AutoUpgrade] Drop align attribute from void return types (details)
  13. Produce warning for performing pointer arithmetic on a null pointer. (details)
  14. [NFC][X86] Precommit another testcase for D101944 (details)
  15. Fix branch coverage merging in FunctionCoverageSummary::get() for instantiation (details)
  16. Change Target::ReadMemory to ensure the amount of memory read from the file-cache is the amount requested. (details)
  17. Add null-pointer checks when accessing a TypeSystem's SymbolFile (details)
  18. [mlir] Use static shape knowledge when lowering memref.reshape (details)
  19. [libomptarget][nfc] Add hook to easily disable building amdgcn bclib (details)
  20. [libc++] s/_VSTD::declval/declval/g. NFCI. (details)
  21. [libc++] s/std::size_t/size_t/g. NFCI. (details)
  22. [libc++] s/_VSTD::chrono/chrono/g. NFCI. (details)
  23. [libc++] s/_VSTD::is_unsigned/is_unsigned/ in <random>. NFCI. (details)
  24. [libc++] Remove more unnecessary _VSTD:: from type names. NFCI. (details)
  25. Revert "Fix branch coverage merging in FunctionCoverageSummary::get() for instantiation" (details)
  26. [RISCV] Match trunc_vector_vl+sra_vl/srl_vl with splat shift amount to vnsra/vnsrl. (details)
  27. [X86][Codegen] Shift amount mod: sh? i64 x, (32-y) --> sh? i64 x, -(y+32) (details)
  28. [RISCV] Use fractional LMULs for fixed length types smaller than riscv-v-vector-bits-min. (details)
  29. [libcxx][tests] Fix incomplte.verify tests by disabling them on clang-10. (details)
  30. [X86][SSE] Add tests for permute(phaddw(phaddw(x,y),phaddw(z,w))) -> phaddw(phaddw(),phaddw()) folds. (details)
  31. Reland "[Coverage] Fix branch coverage merging in FunctionCoverageSummary::get() for instantiation"" (details)
  32. Revert "[ORC-RT] Add unit test infrastructure, extensible_rtti..." (details)
  33. [TextAPI] Reformat llvm_unreachable message (details)
  34. [flang] Allow large and erroneous ac-implied-do's (details)
  35. Re-apply "[ORC-RT] Add unit test infrastructure, extensible_rtti..." (details)
  36. [lld/mac] Implement -sectalign (details)
  37. [git-clang-format] Do not apply clang-format to symlinks (details)
  38. [libcxx] [test] Fix filesystem permission tests for windows (details)
  39. [mlir][ODS]: Add per-op cppNamespace. (details)
  40. [ArgumentPromotion] Fix byval alignment handling. (details)
  41. [RISCV] Prefer to lower MC_GlobalAddress operands to .Lfoo$local (details)
  42. [AArch64][GlobalISel] Support truncstorei8/i16 w/ combine to form truncating G_STOREs. (details)
  43. [GlobalOpt] Remove heap SROA (details)
  44. [X86] X86TTIImpl::getInterleavedMemoryOpCostAVX2(): canonicalize to integer type (details)
  45. [lld][WebAssembly] Convert test to assembly. NFC. (details)
  46. [clang] Support -fpic -fno-semantic-interposition for RISCV (details)
  47. [OpenMP] Use compound operators for reduction combiner if available. (details)
  48. [libc++] Run `substitutes-in-compile-flags.sh.cpp` test on Windows. (details)
  49. Add an "interrupt timeout" to Process, and pipe that through the (details)
  50. [lld][WebAssembly] Remove relocation target verification (details)
Changes
  1. [Zorg][OpenMP] Add CUDA offloading worker. (details)

Started by upstream project LLDB Incremental build number 31875
originally caused by:

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Started by upstream project LLDB Incremental build number 31876
originally caused by:

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Started by upstream project LLDB Incremental build number 31878
originally caused by:

  • Started by timer
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Started by upstream project LLDB Incremental build number 31880
originally caused by:

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This run spent:

  • 7 hr 58 min waiting;
  • 2 hr 6 min build duration;
  • 8 hr 58 min total from scheduled to completion.
Revision: e4aa8a2773fe76c427a91229f021ab067eafc8e7
  • refs/remotes/origin/main
Revision: b49a798e71f922a68628ad9e31ca12fdb864c2f5
  • refs/remotes/origin/main
Revision: e4aa8a2773fe76c427a91229f021ab067eafc8e7
  • refs/remotes/origin/main
Test Result (no failures)
    Revision: 6a075b6de4cafebec9ca1ff9eec7229a617c93f6
    • llvmorg-5.0.2
    Revision: d0d8eb2e5415b8be29343e3c17a18e49e67b5551
    • llvmorg-7.0.1
    Revision: 0399d5a9682b3cef71c653373e38890c63c4c365
    • llvmorg-9.0.0