Started 1 mo 20 days ago
Took 3 hr 49 min

Success Build #3206 (Jun 10, 2021 7:44:51 PM)

  1. [AArch64][GlobalISel] Legalize scalar G_CTTZ + G_CTTZ_ZERO_UNDEF (details)
  2. [libcxx][ranges] removes default_initializable from weakly_incrementable and view (details)
  3. Preserve more MD_mem_parallel_loop_access and MD_access_group in SROA (details)
  4. [clang] Implement P2266 Simpler implicit move (details)
  5. [Profile] Handle invalid profile data (details)
  6. [IR] make -warn-frame-size into a module attr (details)
  7. [Profile] Remove redundant check (details)
  8. LoadStoreVectorizer: support different operand orders in the add sequence match (details)
  9. [static initializers] Emit global_ctors and global_dtors in reverse order when .ctors/.dtors are used. (details)
  10. [IR] Value: Fix OpCode checks (details)
  11. [RISCV] Add test cases that show failure to use some W instructions if they are proceeded by a load. NFC (details)
  12. [SDAG] Fix pow2 assumption when splitting vectors (details)
  13. [ValueTypes] Define MVTs for v6i32, v6f32, v7i32, v7f32 (details)
  14. [AArch64][GlobalISel] Fix incorrectly generating uxtw/sxtw for addressing modes. (details)
  15. [mlir][IR] Move MemRefElementTypeInterface to a new BuiltinTypeInterfaces file (details)
  16. [mlir] Add new SubElementAttr/SubElementType Interfaces (details)
  17. [mlir-ir-printing] Prefix the dump message with the split marker(// -----) (details)
  18. [Flang] Compile fix after D99459. (details)
  19. [RISCV] Use ComputeNumSignBits/MaskedValueIsZero in RISCVDAGToDAGISel::selectSExti32/selectZExti32. (details)
  20. [VectorCombine] Fix alignment in single element store (details)
  21. Revert "[clang] Implement P2266 Simpler implicit move" (details)
  22. Revert "[clang] NRVO: Improvements and handling of more cases." (details)
  23. [RISCV] Remove extra assignment of intrinsic ID in ManualCodegen. NFC (details)

Started by upstream project LLDB Incremental build number 32733
originally caused by:

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This run spent:

  • 1 hr 4 min waiting;
  • 3 hr 49 min build duration;
  • 3 hr 49 min total from scheduled to completion.
Revision: d631fe591d8ff09edb895ef124e8370875d8d523
  • refs/remotes/origin/main
Revision: 081ae5fe1aa3ead6d9da75747d3698f09ff89cb9
  • refs/remotes/origin/main
Revision: d631fe591d8ff09edb895ef124e8370875d8d523
  • refs/remotes/origin/main
Test Result (no failures)
    Revision: 6a075b6de4cafebec9ca1ff9eec7229a617c93f6
    • llvmorg-5.0.2
    Revision: d0d8eb2e5415b8be29343e3c17a18e49e67b5551
    • llvmorg-7.0.1
    Revision: 0399d5a9682b3cef71c653373e38890c63c4c365
    • llvmorg-9.0.0