Changes

Summary

  1. [X86][AVX] Add PR50053 test case (details)
  2. [test] Fix PayloadString: in lldb tests (details)
  3. [mlir][tosa] Disable tosa shape verification between operands/results (details)
  4. [WebAssembly] Improve pseudocode in LowerEmscriptenEHSjLj (details)
  5. [libc] add scudo wrappers to llvm libc (details)
  6. [GlobalISel] Add combine for merge(unmerge) and use AArch64 postlegal-combiner. (details)
  7. [AArch64][GlobalISel] Enable some select combines after legalization. (details)
  8. [LLVM IR] Allow volatile stores to trap. (details)
  9. [AArch4][GlobalISel] Post-legalize combine s64 = G_MERGE s32, 0 -> G_ZEXT. (details)
  10. [LLDB][GUI] Resolve paths in file/directory fields (details)
  11. [FPEnv][InstSimplify] Enable more folds for constrained fadd (details)
  12. [lld][WebAssembly] Do not remove name section with --strip-debug (details)
  13. [PowerPC] Implement partial vector ld/st builtins for XL compatibility (details)
  14. [compiler-rt][CMake][arm64] Use a custom target for symlinking LSE sources (details)
  15. [TypePromotion] Remove redundant if. NFC (details)
  16. [amdgpu] Add 64-bit PC support when expanding unconditional branches. (details)
  17. Fix clang regression test after 5c486ce0 (details)
  18. [libc++] Set the target triple by default in the standalone build (details)
  19. [libc++] Implement the output_iterator and output_range concepts (details)
  20. [OpenMP][NFC] Remove unncessary capture in RAII struct (details)
  21. [PowerPC] Add implicit-def RM to instructions mtfsb[01] (details)
  22. Fix clang debug info irgen of i128 enums (details)
  23. [SimplifyCFG] Remove stale comment after d7378259aa, NFC (details)
  24. [lldb][NFC] Delete unused and commented out DWARF constants (details)
  25. [AArch64] NFC: Make some AArch64-SVE LoopVectorize tests generic. (details)
  26. [LV] Don't let ForceTargetInstructionCost override Invalid cost. (details)
  27. [PowerPC]Add addex instruction definition and MC tests (details)
  28. [ARM] Fixup vst4 test. NFC (details)
  29. [OpenMP][NFC] Fix a few typos in OpenMP documentation (details)
  30. [CodeView] Saturate values bigger than supported by APInt. (details)
  31. [clang] P2266 implicit moves STL workaround (details)
  32. [SimplifyCFG] Drop support for duplicating ret's into uncond predecessors (details)
  33. [SimplifyCFG] Drop support for simplifying cond branch to two (different) ret's (details)
  34. [SimplifyCFG] SwitchToLookupTable(): don't increase ret count (details)
  35. [flang][msvc] Fix external-io unittest. (details)
  36. [OpenMP] Add a driver flag to enable the new device runtime library (details)
  37. [libc++abi/unwind] NFC: Normalize how we set target properties (details)
  38. [libc++] Remove "pass by const value" in <random>. NFCI. (details)
  39. [libc++] Fix signed overflow inside ranges::advance. (details)
  40. [WebAssembly] Make Emscripten EH work with Emscripten SjLj (details)
  41. [LLDB][GUI] Expand selected thread tree item by default (details)
  42. [LLDB][GUI] Add Arch Field (details)
  43. [OpenMP] Always inline the OpenMP outlined function (details)
  44. [WebAssembly] Remove dominator dependency in WasmEHPrepare (NFC) (details)
  45. [GlobalISel] Add a constant folding combine. (details)
  46. [flang] Disallow BOZ literal constants as arguments of implicit interfaces (details)
  47. [llvm-objcopy] Fix section group flag read/write when operating on a cross-endian object file (details)
  48. [AArch64][GlobalISel] Add identity combines to post-legal combiner. (details)
  49. [libc++] Fix spacing in <vector>. NFCI. (details)
  50. [MLIR][SCF][NFC] Fix typo in documentation of scf.while (details)
  51. [compiler-rt][hwasan][fuchsia] Define shadow bound globals (details)
  52. [lldb] [gdb-remote client] Avoid zero padding PID/TID in H packet (details)
  53. Disable the new enum i128 test under ASan, it uncovers an existing leak (details)
Commit fbe6eac8bd65e6e144a647a40df0192ab482129b by llvm-dev
[X86][AVX] Add PR50053 test case
The file was modifiedllvm/test/CodeGen/X86/avx-vperm2x128.ll
Commit b71b25008f2a746d11ed1db1f49a6461b387cc8a by i
[test] Fix PayloadString: in lldb tests
The file was modifiedlldb/test/Shell/ObjectFile/MachO/lc_version_min.yaml
The file was modifiedlldb/test/API/macosx/version_zero/libDylib.dylib.yaml
The file was modifiedlldb/test/Shell/ObjectFile/MachO/lc_build_version_notools.yaml
The file was modifiedlldb/test/Shell/ObjectFile/MachO/symtab.yaml
The file was modifiedlldb/test/Shell/ObjectFile/MachO/lc_build_version.yaml
Commit 055fa446fd4412c2006e9bc56b31da5afcc5da62 by rob.suderman
[mlir][tosa] Disable tosa shape verification between operands/results

Tosa shape verification prevent shape propagation when coming from a dialect
of known shape. Relax this constraint to allow ingestion / shape propagation
from these other dialects.

Differential Revision: https://reviews.llvm.org/D106610
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
The file was modifiedmlir/include/mlir/IR/OpBase.td
Commit 6b9aba43a2392c307694229261c2be66557b6e88 by aheejin
[WebAssembly] Improve pseudocode in LowerEmscriptenEHSjLj

Both `__THREW__` and `__threwValue` are global variables, and we have
been distinguishing the global variable `__THREW__` and the loaded value
`%__THREW__.val` in comments but not doing it for `__threwValue`. Made
the pseudocode comments consistent for both variables.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D106524
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Commit 016ae7df95f2d30bc8e44d5e06571e7510770379 by michaelrj
[libc] add scudo wrappers to llvm libc

The previous patch included the implementations for the scudo allocator,
but not the wrappers. This change fixes that.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D106718
The file was modifiedlibc/lib/CMakeLists.txt
Commit dec34104bfa505f39bb81d24c9ca064a4a03c88a by Amara Emerson
[GlobalISel] Add combine for merge(unmerge) and use AArch64 postlegal-combiner.

Differential Revision: https://reviews.llvm.org/D106761
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-merge.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Commit 0d41d21929d4366997e67f986689eef0253547b6 by Amara Emerson
[AArch64][GlobalISel] Enable some select combines after legalization.

The legalizer generates selects for some operations, which can have constant
condition values, resulting in lots of dead code if it's not folded away.

Differential Revision: https://reviews.llvm.org/D106762
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-select.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
The file was modifiedllvm/test/CodeGen/AArch64/fold-global-offsets.ll
Commit 5c486ce04db4d33ae5be65dac4a03d1b0f46f3e2 by efriedma
[LLVM IR] Allow volatile stores to trap.

Proposed alternative to D105338.

This is ugly, but short-term I think it's the best way forward: first,
let's formalize the hacks into a coherent model. Then we can consider
extensions of that model (we could have different flavors of volatile
with different rules).

Differential Revision: https://reviews.llvm.org/D106309
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/lib/IR/Instruction.cpp
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/test/Transforms/FunctionAttrs/nosync.ll
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
The file was modifiedllvm/test/Transforms/LICM/sink-debuginfo-preserve.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Commit 6af8d360546e01ee2e8c8c45fb5d0cf39fcda462 by Amara Emerson
[AArch4][GlobalISel] Post-legalize combine s64 = G_MERGE s32, 0 -> G_ZEXT.

These are generated as a byproduce of legalization.

Differential Revision: https://reviews.llvm.org/D106768
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-merge.mir
Commit a98f394e81f4dd70dc2a4a3a6640b10a6144cc3f by gclayton
[LLDB][GUI] Resolve paths in file/directory fields

This patch resolves the paths in the file/directory fields before
performing checks. Those checks are applied on the file system if
m_need_to_exist is true, so remote files can set this to false to avoid
performing host-side file system checks. Additionally, methods to get
a resolved and a direct file specs were added to be used by client code.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D106553
The file was modifiedlldb/source/Core/IOHandlerCursesGUI.cpp
Commit 2a7ee6b5c12444255726b9fd1b276468a7a698d9 by kevin.neal
[FPEnv][InstSimplify] Enable more folds for constrained fadd

Precommit tests, try 2. My tree is up-to-date as of this morning so this
should go better than my first try.
The file was addedllvm/test/Transforms/InstSimplify/strictfp-fadd.ll
Commit cf54424a46ffb505bd1a117a44fc30c01bbff882 by dschuff
[lld][WebAssembly] Do not remove name section with --strip-debug

Leave the name section in the output when using the --strip-debug
flag. This treats it more like ELF symbol tables, as the name
section has similar uses at runtime (e.g. wasm engines understand
it and it can be used for symbolization at runtime).

Fixes https://github.com/emscripten-core/emscripten/issues/14623

Differential Revision: https://reviews.llvm.org/D106728
The file was modifiedlld/test/wasm/strip-debug.test
The file was modifiedlld/test/wasm/weak-undefined.s
The file was modifiedlld/wasm/SyntheticSections.h
Commit 1c50a5da364fd57905ec170ed9ba64d3c7e416f3 by nemanja.i.ibm
[PowerPC] Implement partial vector ld/st builtins for XL compatibility

XL provides functions __vec_ldrmb/__vec_strmb for loading/storing a
sequence of 1 to 16 bytes in big endian order, right justified in the
vector register (regardless of target endianness).
This is equivalent to vec_xl_len_r/vec_xst_len_r which are only
available on Power9.

This patch simply uses the Power9 functions when compiled for Power9,
but provides a more general implementation for Power8.

Differential revision: https://reviews.llvm.org/D106757
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was addedclang/test/CodeGen/builtins-ppc-ld-st-rmb.c
The file was addedclang/test/CodeGen/builtins-ppc-xlcompat-vec-error.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/test/CodeGen/builtins-ppc-xlcompat-pwr8.c
Commit b31080c596246bc26d2493cfd5e07f053cf9541c by raul
[compiler-rt][CMake][arm64] Use a custom target for symlinking LSE sources

On Apple platforms the builtins may be built for both arm64 and arm64e.
With Makefile generators separate targets are built using Make sub-invocations.
This causes a race when creating the symlink which may sometimes fail.

Work around this by using a custom target that the builtin targets depend on.
This causes any sub-invocations to depend on the symlinks having been created before.

Mailing list thread: https://lists.llvm.org/pipermail/llvm-dev/2021-July/151822.html

Reviewed By: thakis, steven_wu

Differential Revision: https://reviews.llvm.org/D106305
The file was modifiedcompiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt
Commit 14e356d121cd3f49a1f78f67a5b2e605c7d063f6 by craig.topper
[TypePromotion] Remove redundant if. NFC

The same condition was checked in the previous if. Maybe this was
a bad merge resolution?
The file was modifiedllvm/lib/CodeGen/TypePromotion.cpp
Commit b0402a35fc882ad582ddf128833e531cf2b7f657 by michael.hliao
[amdgpu] Add 64-bit PC support when expanding unconditional branches.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D106445
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
The file was addedllvm/test/MC/AMDGPU/offset-expr.s
The file was modifiedllvm/test/MC/AMDGPU/expressions.s
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Commit 0fb16d5ad126a14213ceee6b20b86c721ea49d4e by efriedma
Fix clang regression test after 5c486ce0
The file was modifiedclang/test/CodeGenOpenCL/convergent.cl
Commit 069428b6f73bdfb7bba13d461a2f57beb86b6aa7 by Louis Dionne
[libc++] Set the target triple by default in the standalone build

Even though the standalone build is deprecated, some people are still
relying on it (including libc++ itself for some configurations). Setting
the target triple will ensure that the build and the test suite behaves
consistently in the standalone and normal builds.

Differential Revision: https://reviews.llvm.org/D106800
The file was modifiedlibcxx/utils/libcxx/test/dsl.py
The file was modifiedlibcxx/cmake/Modules/HandleOutOfTreeLLVM.cmake
The file was modifiedlibcxx/utils/libcxx/test/params.py
Commit 7b28c5d3765c5f48a1502693331b22330d609f88 by Louis Dionne
[libc++] Implement the output_iterator and output_range concepts

Differential Revision: https://reviews.llvm.org/D106704
The file was modifiedlibcxx/include/__ranges/concepts.h
The file was addedlibcxx/test/std/iterators/iterator.requirements/iterator.concepts/iterator.concept.output/output_iterator.compile.pass.cpp
The file was modifiedlibcxx/include/ranges
The file was addedlibcxx/test/std/ranges/range.req/range.refinements/output_range.compile.pass.cpp
The file was modifiedlibcxx/docs/Status/RangesPaper.csv
The file was modifiedlibcxx/include/__iterator/concepts.h
The file was modifiedlibcxx/include/iterator
Commit e757a3b05fd99bb5b5e6460c1d59cd0a170a6033 by huberjn
[OpenMP][NFC] Remove unncessary capture in RAII struct

Summary:
There was an unnecessary variable assigned to the information cache when we
only need it in the constructor to extract the function declaration.
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
Commit 2d788959edda2155398ed760d19aee84259ed814 by lei
[PowerPC] Add implicit-def RM to instructions mtfsb[01]

This is a followup patch for D105930 to add implicit-def of RM for
mtfsb[01] instructions as per review comments.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D106603
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
Commit 323049329939becf690adbeeff9f5f7e219075ec by rnk
Fix clang debug info irgen of i128 enums

DIEnumerator stores an APInt as of April 2020, so now we don't need to
truncate the enumerator value to 64 bits. Fixes assertions during IRGen.

Split from D105320, thanks to Matheus Izvekov for the test case and
report.

Differential Revision: https://reviews.llvm.org/D106585
The file was modifiedllvm/include/llvm/IR/DIBuilder.h
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedllvm/lib/IR/DIBuilder.cpp
The file was addedclang/test/CodeGenCXX/debug-info-enum-i128.cpp
Commit d56e6985528bae0305c1633fd8db1658d1b28356 by rnk
[SimplifyCFG] Remove stale comment after d7378259aa, NFC
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit e42edce4a349efeedde2ffd07a26a6335178d24b by apl
[lldb][NFC] Delete unused and commented out DWARF constants

I cannot find any users of these anywhere and they have been commented out
for years.
The file was modifiedlldb/include/lldb/Core/dwarf.h
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbdwarf.py
Commit e745277012ec05d1e6f980e05f2a3ea7c827eeec by sander.desmalen
[AArch64] NFC: Make some AArch64-SVE LoopVectorize tests generic.

This change moves most of `sve-inductions.ll` to non-AArch64 specific
LV tests using the `-target-supports-scalable-vectors` flag, because they're
not explicitly AArch64-specific. One test builds on AArch64-specific
knowledge regarding masked loads/stores, and remains in sve-inductions.ll.
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
The file was addedllvm/test/Transforms/LoopVectorize/scalable-inductions.ll
Commit 13ccb097258a244498aa760b878a23de721af29f by sander.desmalen
[LV] Don't let ForceTargetInstructionCost override Invalid cost.

Invalid costs can be used to avoid vectorization with a given VF, which is
used for scalable vectors to avoid things that the code-generator cannot
handle. If we override the cost using the -force-target-instruction-cost
option of the LV, we would override this mechanism, rendering the flag useless.

This change ensures the cost is only overriden when the original cost that
was calculated is valid. That allows the flag to be used in combination
with the -scalable-vectorization option.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D106677
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
Commit 64a15817a01703ea2206dd02f27a166ea1890ecb by lei
[PowerPC]Add addex instruction definition and MC tests

Add td definitions and asm/disasm tests for the addex instruction introduced in
ISA 3.0.

Reviewed By: nemanjai, amyk, NeHuang

Differential Revision: https://reviews.llvm.org/D106666
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrFormats.td
The file was modifiedllvm/lib/Target/PowerPC/P9InstrResources.td
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/test/MC/PowerPC/ppc64-encoding.s
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt
Commit d0c7d4d8a06679a9f306855f4abf1df0bab41dd1 by david.green
[ARM] Fixup vst4 test. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst4.ll
Commit dead50d4427cbdd5f41c02c5441270822f702730 by jhuber6
[OpenMP][NFC] Fix a few typos in OpenMP documentation

Summary:
Fixes some typos in the OpenMP documentation.
The file was modifiedopenmp/docs/remarks/OMP112.rst
The file was modifiedopenmp/docs/remarks/OMP111.rst
The file was modifiedopenmp/docs/remarks/OMP113.rst
The file was modifiedopenmp/docs/remarks/OMP160.rst
The file was modifiedopenmp/docs/remarks/OMP110.rst
The file was modifiedopenmp/docs/remarks/OMP131.rst
The file was modifiedopenmp/docs/remarks/OMP120.rst
Commit f84c70a3793909ec16b3e53a502f0f9ea99c6af3 by mizvekov
[CodeView] Saturate values bigger than supported by APInt.

This fixes an assert firing when compiling code which involves 128 bit
integrals.

This would trigger runtime checks similar to this:
```
Assertion failed: getMinSignedBits() <= 64 && "Too many bits for int64_t", file llvm/include/llvm/ADT/APInt.h, line 1646
```

To get around this, we just saturate those big values.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D105320
The file was modifiedllvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
The file was modifiedllvm/lib/IR/DIBuilder.cpp
The file was modifiedllvm/include/llvm/IR/DIBuilder.h
The file was addedllvm/test/DebugInfo/COFF/integer-128.ll
The file was modifiedllvm/include/llvm/ADT/APInt.h
The file was modifiedllvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp
Commit 20555a15a596012ef827e29b665db53a4fc0b86c by mizvekov
[clang] P2266 implicit moves STL workaround

This patch replaces the workaround for simpler implicit moves
implemented in D105518.

The Microsoft STL currently has some issues with P2266.

Where before, with -fms-compatibility, we would disable simpler
implicit moves globally, with this change, we disable it only
when the returned expression is in a context contained by
std namespace and is located within a system header.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: aaron.ballman, mibintc

Differential Revision: https://reviews.llvm.org/D105951
The file was modifiedclang/lib/Frontend/InitPreprocessor.cpp
The file was modifiedclang/test/SemaCXX/cxx2b-p2266-disable-with-msvc-compat.cpp
The file was modifiedclang/lib/Sema/SemaCoroutine.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
Commit 7c5f104e4549ed13c41a61429423ab03d958878e by lebedev.ri
[SimplifyCFG] Drop support for duplicating ret's into uncond predecessors

This functionality existed only under a default-off flag,
and simplifycfg nowadays prefers to not increase the count of ret's.
The file was modifiedllvm/test/Transforms/SimplifyCFG/return-merge.ll
The file was modifiedllvm/test/Transforms/SimplifyCFG/merge-duplicate-conditional-ret-val.ll
The file was removedllvm/test/Transforms/SimplifyCFG/duplicate-ret-into-uncond-br.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 08efc2e68d5f9fe522fe8d70d0bd5ddf45f78848 by lebedev.ri
[SimplifyCFG] Drop support for simplifying cond branch to two (different) ret's

Nowadays, simplifycfg pass already tail-merges all the ret blocks together
before doing anything, and it should not increase the count of ret's,
so this is dead code.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 1901c98dd81bded0b95b2a1c0de05d56c24e7408 by lebedev.ri
[SimplifyCFG] SwitchToLookupTable(): don't increase ret count

The very next SimplifyCFG pass invocation will tail-merge these two ret's
anyways, there is not much point in creating more work for ourselves.
The file was modifiedllvm/test/Transforms/SimplifyCFG/X86/disable-lookup-table.ll
The file was modifiedllvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
The file was modifiedllvm/test/Transforms/SimplifyCFG/rangereduce.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/simplifycfg-late.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
Commit cbad57613e769d0653e13cf877d80eae421b2314 by llvm-project
[flang][msvc] Fix external-io unittest.

Fix the external-io unittest under Windows.

In particular, fixes the following issues:

1.  When creating a temporary file, open it with read+write permissions
     using the _O_RDWR flag. _S_IREAD and _S_IWRITE are for the file
     permissions of the created file.

2. _chsize returns 0 on success (just like ftruncate).

3. To set a std::optional, use its assign-operator overload instead of
    getting a reference to its value and overwrite that. The latter is
    invalid if the std::optional has no value, and is caught by
    msvc's debug STL.

The non-GTest unittest is currently not executed under Windows because
of the added .exe extension to the output file: external-io.text.exe.
llvm-lit skips the file because .exe is not in the lists of test
suffixes (.test is). D105315 is going to change that by converting it
to a GTest-test.

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D106726
The file was modifiedflang/runtime/unit.cpp
The file was modifiedflang/runtime/file.cpp
Commit d2972116923a124de71cea006eca3068bdc381ea by huberjn
[OpenMP] Add a driver flag to enable the new device runtime library

This patch adds a driver flag `-fopenmp-target-new-runtime` to optionally enable the new device runtime
bitcode library. This allows users to enable the new experimental runtime
before it becomes the default in the future.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106793
The file was modifiedclang/include/clang/Basic/LangOptions.def
The file was modifiedclang/test/Driver/openmp-offload-gpu.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/Driver/Inputs/libomptarget/libomptarget-new-nvptx-sm_35.bc
The file was modifiedclang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
The file was modifiedclang/lib/Driver/ToolChains/Cuda.cpp
Commit e95cd94f7edf50367d650410b8e534342eb0e5cb by Louis Dionne
[libc++abi/unwind] NFC: Normalize how we set target properties

This is a NFC commit to normalize how we set target properties on the
various runtime targets. A follow-up patch is going to add new properties,
and I wanted that follow-up patch to be cleaner.
The file was modifiedlibunwind/src/CMakeLists.txt
The file was modifiedlibcxxabi/src/CMakeLists.txt
Commit 25666a74c5af05ae6b189ad4f7382d351fb8698f by arthur.j.odwyer
[libc++] Remove "pass by const value" in <random>. NFCI.
The file was modifiedlibcxx/include/random
Commit 41b17c444df647ce46609d8efb57a98d35704c63 by arthur.j.odwyer
[libc++] Fix signed overflow inside ranges::advance.

See LWG reflector thread of 2021-07-23 titled
'Question on ranges::advance and "past-the-sentinel iterators"'.
Test case heavily based on one graciously provided by Casey Carter.

Differential Revision: https://reviews.llvm.org/D106735
The file was modifiedlibcxx/include/__iterator/advance.h
The file was modifiedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.advance/iterator_count_sentinel.pass.cpp
Commit c285a11efdb0821e6be9fcef695097890f44aa03 by aheejin
[WebAssembly] Make Emscripten EH work with Emscripten SjLj

When Emscripten EH mixes with Emscripten SjLj, we are not currently
handling some of them correctly. There are three cases:
1. The current function calls `setjmp` and there is an `invoke` to a
   function that can either throw or longjmp. In this case, we have to
   check both for exception and longjmp. We are currently handling this
   case correctly:
   https://github.com/llvm/llvm-project/blob/0c0eb76782d5224b8d81a5afbb9a152bcf7c94c7/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp#L1058-L1090
   When inserting routines for functions that can longjmp, which we do
   only for setjmp-calling functions, we check if the function was
   previously an `invoke` and handle it correctly.

2. The current function does NOT call `setjmp` and there is an `invoke`
   to a function that can either throw or longjmp. Because there is no
   `setjmp` call, we haven't been doing any check for functions that can
   longjmp. But in that case, for `invoke`, we only check for an
   exception and if it is not an exception we reset `__THREW__` to 0,
   which can silently swallow the longjmp:
   https://github.com/llvm/llvm-project/blob/0c0eb76782d5224b8d81a5afbb9a152bcf7c94c7/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp#L70-L80
   This CL fixes this.

3. The current function calls `setjmp` and there is no `invoke`. Because
   it is not an `invoke`, we haven't been doing any check for functions
   that can throw, and only insert longjmp-checking routines for
   functions that can longjmp. But in that case, if a longjmpable
   function throws, we only check for a longjmp so if it is not a
   longjmp we reset `__THREW__` to 0, which can silently swallow the
   exception:
   https://github.com/llvm/llvm-project/blob/0c0eb76782d5224b8d81a5afbb9a152bcf7c94c7/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp#L156-L169
   This CL fixes this.

To do that, this moves around some code, so we register necessary
functions for both EH and SjLj and precompute some data (the set of
functions that contains `setjmp`) before doing actual EH or SjLj
transformation.

This CL makes 2nd and 3rd tests in
https://github.com/emscripten-core/emscripten/pull/14732 work.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D106525
The file was addedllvm/test/CodeGen/WebAssembly/lower-em-ehsjlj.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/lower-em-sjlj.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssembly.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Commit fed25ddc1c3de59aa1de27e95b349f86896ccb79 by gclayton
[LLDB][GUI] Expand selected thread tree item by default

This patch expands the tree item that corresponds to the selected thread
by default in the Threads window. Additionally, the tree root item is
always expanded, which is the process in the Threads window.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D100243
The file was modifiedlldb/source/Core/IOHandlerCursesGUI.cpp
The file was addedlldb/test/API/commands/gui/expand-threads-tree/main.c
The file was addedlldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
The file was addedlldb/test/API/commands/gui/expand-threads-tree/Makefile
Commit ed5b4dbd3952ffa8970ae59faa7f7505cd28aa92 by gclayton
[LLDB][GUI] Add Arch Field

This patch adds an Arch field that inputs and validates an arch spec.

Differential Revision: https://reviews.llvm.org/D106564
The file was modifiedlldb/source/Core/IOHandlerCursesGUI.cpp
Commit af000197c4214926bd7d0862d86f89aed5f20da6 by huberjn
[OpenMP] Always inline the OpenMP outlined function

This patch adds the always inline attribute to the outlined functions generated
by OpenMP regions. Because there is only a single instance of this function and
it always has internal linkage it is safe to inline in every instance it is
created. This could potentially lead to performance degredation due to
inflated register counts in the parallel region.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106799
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
Commit a48ee9f25581d0d6cbf2b1205777e7d53023797f by aheejin
[WebAssembly] Remove dominator dependency in WasmEHPrepare (NFC)

Dominator trees were previously used for an optimization related to
`wasm.lsda` but the optimization was removed in D97309. Currently
dominators are not doing anything in this pass. Also removes some
`include` lines without which it compiles.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D106811
The file was modifiedllvm/lib/CodeGen/WasmEHPrepare.cpp
Commit c658b472f3e61e1818e1909bf02f3d65470018a5 by Amara Emerson
[GlobalISel] Add a constant folding combine.

Use it AArch64 post-legal combiner. These don't always get folded because when
the instructions are created the constants are obscured by artifacts.

Differential Revision: https://reviews.llvm.org/D106776
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/test/CodeGen/AArch64/fold-global-offsets.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
Commit 8f41431654fedac4a5ad2751056a611bfc7751f0 by psteinfeld
[flang] Disallow BOZ literal constants as arguments of implicit interfaces

Since BOZ literal arguments are typeless, we cannot know how to pass them as
actual arguments to procedures with implicit interfaces.  This change avoids
the problem by emitting an error message in such situations.

This change stemmed from the following issue --
  https://github.com/flang-compiler/f18-llvm-project/issues/794

Differential Revision: https://reviews.llvm.org/D106831
The file was modifiedflang/lib/Semantics/check-call.cpp
The file was modifiedflang/test/Semantics/boz-literal-constants.f90
Commit c5d8bd5a35cbd325c6ccd42afa91bad06d261f07 by i
[llvm-objcopy] Fix section group flag read/write when operating on a cross-endian object file
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.cpp
Commit 172051a1f4b1a007a2dbc46f8efb5e650b016d3b by Amara Emerson
[AArch64][GlobalISel] Add identity combines to post-legal combiner.

We see some shifts of zero emitted during legalization.

Differential Revision: https://reviews.llvm.org/D106816
The file was modifiedllvm/test/CodeGen/AArch64/fold-global-offsets.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-identity.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-select.mir
Commit 1e1b5706c3f5e24b937878e592cf9907af368ec3 by arthur.j.odwyer
[libc++] Fix spacing in <vector>. NFCI.

Thanks to gAlfonso-bit for the patch!

Differential Revision: https://reviews.llvm.org/D106691
The file was modifiedlibcxx/include/vector
Commit 58aa3881bac60a497168449b9087e3ebef85a3d8 by jurahul
[MLIR][SCF][NFC] Fix typo in documentation of scf.while

- `scf.yield` in the "after" region supplies new arguments to the "before" region.

Differential Revision: https://reviews.llvm.org/D106806
The file was modifiedmlir/include/mlir/Dialect/SCF/SCFOps.td
Commit b50fb58695b4fa2b60e0003980b158a717638180 by leonardchan
[compiler-rt][hwasan][fuchsia] Define shadow bound globals

These are required by MemIsShadow for checking if an address actually is shadow memory.

Differential Revision: https://reviews.llvm.org/D105745
The file was modifiedcompiler-rt/lib/hwasan/hwasan_fuchsia.cpp
Commit 3c3269559ba9400224400b96c22b31812638de52 by mgorny
[lldb] [gdb-remote client] Avoid zero padding PID/TID in H packet

Change SetCurrentThread*() logic not to include the zero padding
in PID/TID that was a side effect of 02ef0f5ab483.  This should fix
problems caused by sending 64-bit integers to 32-bit servers.  Reported
by Ted Woodward.

Differential Revision: https://reviews.llvm.org/D106832
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
The file was modifiedlldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
Commit a9b114c5dd68685e0e68dd9144454b44509c2f5f by rnk
Disable the new enum i128 test under ASan, it uncovers an existing leak

See llvm.org/pr51221
The file was modifiedclang/test/CodeGenCXX/debug-info-enum-i128.cpp