Changes

Summary

  1. [ORC][JITLink] Move JITDylib name into JITLinkDylib base class. (details)
  2. [AMDGPU] Do not generate ELF symbols for the local branch target labels (details)
  3. [llvm] Use range-based for loops (NFC) (details)
  4. [ORC] Make JITDylib::AsynchronousSymbolQuerySet private. (details)
  5. [X86] Add test case for pr52567. NFC (details)
  6. [X86] Don't combine (x86cmp (trunc (movmsk (bitcast X))), 0) if the truncate discards unknown bits. (details)
  7. [MLIR] Avoid creation of buggy affine maps while replacing dimension and symbol (details)
  8. [NFC][X86][MCA] Add forgotten test coverage for AVX512's VPMOVM2[BWDQ] / VPMOV[BWDQ]2M (details)
Commit 43f5f6916f0e2b0095a943eb19d06dfb8e13c727 by Lang Hames
[ORC][JITLink] Move JITDylib name into JITLinkDylib base class.

This will enable better error messages and debug logs in JITLink.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Core.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Core.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLinkDylib.h
Commit 18f9351223488121cc88f252744a575156c617bf by VenkataRamanaiah.Nalamothu
[AMDGPU] Do not generate ELF symbols for the local branch target labels

The compiler was generating symbols in the final code object for local
branch target labels. This bloats the code object, slows down the loader,
and is only used to simplify disassembly.

Use '--symbolize-operands' with llvm-objdump to improve readability of the
branch target operands in disassembly.

Fixes: SWDEV-312223

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D114273
The file was modifiedllvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/infinite-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-skip.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sgpr-copy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/bypass-div.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/salu-to-valu.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sdiv64.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/urem64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/basic-branch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/loop_break.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uniform-crash.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr-load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mfma-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/trap-abis.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-crash.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uniform-cfg.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ctpop16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idiv-licm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/subvector-test.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_int24.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ret_jump.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/udiv64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/loop-prefetch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/collapse-endcf.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-m0.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amd.endpgm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-condition-and.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-call.ll
Commit d1abf481daf2aa0076bb2d4f25eab9f5ca59a05d by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/Transforms/Utils/MetaRenamer.cpp
The file was modifiedllvm/lib/Transforms/Utils/Evaluator.cpp
The file was modifiedllvm/lib/Transforms/Utils/CloneModule.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopSimplify.cpp
Commit 0dec59305a52e51be8ef70a3ccdc59b5235663b7 by Lang Hames
[ORC] Make JITDylib::AsynchronousSymbolQuerySet private.

This type does not need to be public
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Core.h
Commit 1cb991e754053ce2b5d551eb6c1a0ce759ab381e by craig.topper
[X86] Add test case for pr52567. NFC
The file was addedllvm/test/CodeGen/X86/pr52567.ll
Commit a4373f6753fa9aa89d39fbd4ec9e273f76459a58 by craig.topper
[X86] Don't combine (x86cmp (trunc (movmsk (bitcast X))), 0) if the truncate discards unknown bits.

We have transform that tries turn a pmovmskb into movmskps/pd or
movmskps to movmskpd. This transform isn't valid if the truncate
discarded bits that might be set by the original movmsk.

We could fix this by inserting an AND after the new movmsk to discard
the equivalent of the truncated bits, but I've left that for later
patch.

Fixes PR52567.

Differential Revision: https://reviews.llvm.org/D114306
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/pr52567.ll
Commit 1f9ca5adbac08dcca73b9e12aa2c5ed777cc460e by uday
[MLIR] Avoid creation of buggy affine maps while replacing dimension and symbol

Initially before appending the newly composed dimension and symbols
to the dimension and symbol list whose size is to be passed in
AffineMap::get(), the call to the AffineMap::get() was made, resulting
in wrong dimCount and symbolCount being passed as argument. We move the
call to the AffineMap::get() after the diimension and symbol list are
updated.

Differential Revision: https://reviews.llvm.org/D114237
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
Commit 2f364f6f0d3a2420ca78cbd80abb186657180e05 by lebedev.ri
[NFC][X86][MCA] Add forgotten test coverage for AVX512's VPMOVM2[BWDQ] / VPMOV[BWDQ]2M
The file was modifiedllvm/test/tools/llvm-mca/X86/Generic/resources-avx512dqvl.s
The file was modifiedllvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512bwvl.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Generic/resources-avx512bwvl.s
The file was modifiedllvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512dq.s
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The file was modifiedllvm/test/tools/llvm-mca/X86/Generic/resources-avx512bw.s
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