Changes

[AIX] Limit parallel link jobs to 2 for AIX buildbot

Lowering the setting to 2 from 6 to improve stability of the machine.

Reviewed By: daltenty

Differential Revision: https://reviews.llvm.org/D118410

Reduce the amount of parallelism on lldb-matrix

[mlir][Bazel][cmake] Add missing dependency.

After 2c7b0685e179 this dependency is needed.

[NFC] Add tests for ODR checking of default template argument

[libc] Fix 64-bit Apple ARM support and header includes

Summary:

Reviewers: sivachandra

Subscribers:

Differential Revision: https://reviews.llvm.org/D114236

[ARM] Don't look through pointer types in canTailPredicateLoop()

Inspecting the pointer element type here is incompatible with
opaque pointers, and doesn't seem necessary to me. I think the
intention might have been to check the type of load/store pointer
arguments, but I believe those should get checked through their
return type or value operand anyway. I don't get any test failures
if I simply drop this.

Differential Revision: https://reviews.llvm.org/D118353

[OpenMPIRBuilder] Store element type in AtomicOpValue

With opaque pointers, we can no longer derive this from the pointer
type, so we need to explicitly provide the element type the atomic
operation should work with.

Differential Revision: https://reviews.llvm.org/D118359

[lld][ELF] Cleanup %t directory in tests, NFC

[MLIR] Remove some pointer element type accesses

Use the MLIR pointer element type, rather than the LLVM pointer
element type.

[lldb][ARM/AArch64] Update dissembler to v9.3-a

This means sve2 is enabled by default and the v8.8 mops (memcpy
and memset acceleration instructions) and HBC (hinted conditional
branch) extensions can be disassembled.

v9.3-a is equivalent to v8.8-a except that in v9.0-a sve2 was
enabled by default so v9.3-a includes that too.

MTE remains an optional extension, only enabled for specific CPUs.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D118358

Revert "[lldb] [gdb-remote] Support getting siginfo via API"

This reverts commit 1a8f60f5f5b8638a3e8e7fb31ba7ae9e17a7ff2d.
The API requires further work.

[MC] Remove a stray space after tab for COFF .def directives

This extra stray space after tab can be traced back to when printing
of this directive was added originally in
4f01b783a3ca5b2544fe1b1677b5bcf6d91c6d2c. The same commit added
inconsistent printing of space after the ELF .type directive too,
which was fixed later in
77fe07a93aeb8feaf39b7d48ad8fc1e6c9e4c78e.

(This is kind of NFC, but it does alter the output, so it's not
strictly non-functional in that sense.)

Differential Revision: https://reviews.llvm.org/D118401

[libcxx] Allow using thread safety annotations in MinGW mode

These were omitted in all Windows configurations, but it turns out
that they work just fine in MinGW mode.

This allows converting a couple cases of "XFAIL: LIBCXX-WINDOWS-FIXME"
into "XFAIL: msvc" as the bug is specific to MSVC mode (clang-cl).

Differential Revision: https://reviews.llvm.org/D118192

[libcxx] [test] Fix testcases that fail on systems with 16 bit wchar_t

Don't decode a UTF-8 character that is out of range for a 16 bit
`wchar_t`.

Differential Revision: https://reviews.llvm.org/D118191

[VPlan] Record whether scalar IVs are need in induction recipe. (NFC)

This explicitly records whether a scalar IV is needed in the
VPWidenIntOrFpInductionRecipe, to remove a dependence on the cost-model
during its ::execute.

It will also be used in D116123 to determine if a vector phi will be
generated.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D118167

[InlineFunction] Use phis() iterator (NFC)

[lldb] Convert DWARF log to the new API

This also deletes some dead log statements (log initialization commented
out).

[Sparc] Implement BFD_RELOC_NONE

`instrprof-icall-promo.test` `FAIL`s on Solaris/sparcv9:

  Profile-sparc :: instrprof-icall-promo.test
  Profile-sparcv9 :: instrprof-icall-promo.test

when compiling `compiler-rt/test/profile/Inputs/instrprof-icall-promo_2.cpp` with

  fatal error: error in backend: Relocation for CG Profile could not be created: unknown relocation name

This happens because the Sparc backend doesn't implement `BFD_RELOC_NONE`.
This patch fixes that, following what X86 does.

Tested on `sparcv9-sun-solaris2.11`.

Differential Revision: https://reviews.llvm.org/D118136

[clang][ARM] Emit warnings when PACBTI-M is used with unsupported architectures

Branch protection in M-class is supported by
 - Armv8.1-M.Main
 - Armv8-M.Main
 - Armv7-M

Attempting to enable this for other architectures, either by
command-line (e.g -mbranch-protection=bti) or by target attribute
in source code (e.g.  __attribute__((target("branch-protection=..."))) )
will generate a warning.

In both cases function attributes related to branch protection will not
be emitted. Regardless of the warning, module level attributes related to
branch protection will be emitted when it is enabled via the command-line.

The following people also contributed to this patch:
- Victor Campos

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D115501

[tblgen] Disable lsan weak hook when building with msvc

This change is to fix a link time error when building llvm with msvc.

MSVC's implementation does not support weak hook or lsan so this change
disables lsan's weak hook definition.
Only GCC supports LSan.

Tested with visual studio 2019 v16.9.6

Reviewed By: aaron.ballman, rnk

Differential Revision: https://reviews.llvm.org/D118162

[ADT] Remove unused variables in Triple.h, fix build warnings with GCC. NFC.

[clang-format] Remove useless npos parameter from substr. NFC.

[OpenCL] opencl-c.h: refactor named addrspace builtins

The named address space overloads of builtins that take a pointer
argument are conditionalized on the `__opencl_c_generic_address_space`
feature macro (in a `#else` body).  Introduce an internal feature
macro instead, such that their availability can be controlled in a
single place and independently of the generic address space feature
macro.

This commit does not change the available builtins.

Differential Revision: https://reviews.llvm.org/D118158

[flang][NFC] Remove obsolete FIRBuilder and BoxValue

This patch removes some files made obsolete by newer version
of them available in the Optimizer directory.
`flang/include/flang/Lower/FIRBuilder.h` and `flang/lib/Lower/FIRBuilder.cpp` are
removed and replace by the newer version present in
`flang/include/flang/Optimizer/Builder/FIRBuilder.h` and
`flang/lib/Optimizer/Builder/FIRBuilder.cpp`.
`flang/include/flang/Lower/Support/BoxValue.h` and `flang/lib/Lower/ConvertExpr.cpp` are removed and replace by the newer
version present in `flang/include/flang/Optimizer/Builder/BoxValue.h`

This patch is a preparation to be able to upstream the lowering from
fir-dev.

Reviewed By: jeanPerier, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D118404

[flang][NFC] Remove obsolete DoLoopHelper

During the upstreaming process from fir-dev some
new builder have been introduced in the `flang/Optimizer/Builder`
directory. This patch removes the obsolete DoLoopHelper still present
in the lowering directories and makes use of the new one where needed.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D118442

[sanitizers] Silence warnings about unused variables in i386 build. NFC.

[Matrix] Use ArrayType for allocas instead of VectorType.

When creating an alloca to copy a matrix due to memory conflicts, those
allocas used to use VectorTypes, which forced them to have huge
alignments for large vectors.

This patch updates LowerMatrixIntrinsics to use a corresponding array
type, like Clang already does, to get more manageable alignments.

Reviewed By: anemet, thegameg

Differential Revision: https://reviews.llvm.org/D118239

Move llvm::array_lenghtof to llvm/ADT/STLArrayExtras.h

This moves the dependency of several files on include/llvm/ADT/STLExtras.h to
the much shorter llvm/ADT/STLArrayExtras.h

Differential Revision: https://reviews.llvm.org/D118342

Cleanup includes for LLVMBitstream

This is a very small library, so only a few changes and very little gain.

$ clang++ -E  -Iinclude -I../llvm/include ../llvm/lib/Bitstream/Reader/*.cpp -std=c++14 -fno-rtti -fno-exceptions | wc -l
before: 65777
after:  64997

Related Discourse thread: https://llvm.discourse.group/t/include-what-you-use-include-cleanup

Differential Revision: https://reviews.llvm.org/D118373

Cleanup include dependencies for LLVMTableGen

Based on the output of include-what-you-use. No other library seems affected by
the new forward declaration.

$ clang++ -E  -Iinclude -I../llvm/include ../llvm/lib/TableGen/*.cpp -std=c++14 -fno-rtti -fno-exceptions | wc -l
before: 795231
after: 750654

Related Discourse thread: https://llvm.discourse.group/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D118374

Cleanup includes for LLVMTableGenGlobalISel

Based on the output of include-what-you-use. No big deal here, it's a utils
library and it doesn't seem to be used a lot across the codebase.

$ clang++ -E  -Iinclude -I../llvm/include ../llvm/utils/TableGen/GlobalISel/*.cpp -std=c++14 -fno-rtti -fno-exceptions | wc -l
before: 573143
after:  568908

Related Discourse thread: https://llvm.discourse.group/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D118375

clang-format: [JS] sort import aliases. Users can define aliases for long symbols using import aliases:

    import X = A.B.C;

Previously, these were unhandled and would terminate import sorting.
With this change, aliases sort as their own group, coming last after all
other imports.

Aliases are not sorted within their group, as they may reference each
other, so order is significant.

This reverts commit f750c3d95a0c8bf1d21380ae753fce12010a7561. It fixes
the msan issue by not parsing past the end of the line when handling
import aliases.

Differential Revision: https://reviews.llvm.org/D118446

[mlir] Move SCF utils implementations to SCF/Utils.

BEGIN_PUBLIC
[mlir] Move SCF utils implementations to SCF/Utils.
END_PUBLIC

[clang-format] Move irrelevant code from getRangeLength to getRemainingLength. NFC.

[X86] Fix MOVMSK(CONCAT(X,Y)) -> MOVMSK(AND/OR(X,Y)) fold for float types and demanded elements

rG9103b73fe052 was assuming that we could OR/AND with the source vector, but that will fail on float/double vectors without bitcasting - it also missed the case that any_of checks might be testing less than all the source elements

[CodeGen] Emit COFF symbol type for function aliases

On the level of the generated object files, both symbols (both
original and alias) are generally indistinguishable - both are
regular defined symbols. But previously, only the original
function had the COFF ComplexType set to IMAGE_SYM_DTYPE_FUNCTION,
while the symbol created via an alias had the type set to
IMAGE_SYM_DTYPE_NULL.

This matches what GCC does, which emits directives for setting the
COFF symbol type for this kind of alias symbol too.

This makes a difference when GNU ld.bfd exports symbols without
dllexport directives or a def file - it seems to decide between
function or data exports based on the COFF symbol type. This means
that functions created via aliases, like some C++ constructors,
are exported as data symbols (missing the thunk for calling without
dllimport).

The hasnt been an issue when doing the same with LLD, as LLD decides
between function or data export based on the flags of the section
that the symbol points at.

This should fix the root cause of
https://github.com/msys2/MINGW-packages/issues/10547.

Differential Revision: https://reviews.llvm.org/D118328

Revert "[InstCombine] Fold and-reduce idiom"

It causes builds to fail with

llvm/include/llvm/Support/Casting.h:269:
typename llvm::cast_retty<X, Y*>::ret_type llvm::cast(Y*)
[with X = llvm::IntegerType; Y = const llvm::Type; typename llvm::cast_retty<X, Y*>::ret_type = const llvm::IntegerType*]:
Assertion `isa<X>(Val) && "cast<Ty>() argument of incompatible type!"' failed.

See the code review for link to a reproducer.

> This patch introduces folding of and-reduce idiom and generates code
> that is easier to read and which is lest costly in terms of icmp operations.
> The folding is
> ```
>   icmp eq (bitcast(icmp ne (lhs, rhs)), 0)
> ```
> into
> ```
>   icmp eq(bitcast(lhs), bitcast(rhs))
> ```
>
> See PR53419.
>
> Differential Revision: https://reviews.llvm.org/D118317
> Reviewed By: lebedev.ri, spatel

This reverts commit 8599bb0f26738ed88aae62aba57d82f7cf326cf9.

This also revertes the dependent change:

"[Test] Add 'ne' tests for and-reduce pattern folding"

This reverts commit a4aaa5995308ac2ba1bf180c9ce9c321cdb9f28a.

[BasicAA] Add support for memmove intrinsic

Currently, basic AA has special support for llvm.memcpy.* intrinsics. This change extends this support for any memory trancsfer opration and in particular llvm.memmove.* intrinsic.

Reviewed By: reames, nikic

Differential Revision: https://reviews.llvm.org/D117095

[ConstraintElimination] Add sub nuw test with signed predicates.

Add missing test coverage for `sub nuw` combined with both unsigned and
signed predicates.

clang-format: [JS] fix uninitialized memory.

SortJavaScriptImports attempts to set its currently parsed token to an
invalid token when it reaches the end of the line. However in doing so,
it used a `FormatToken`, which contains a `Token Tok`. `Token` does not
have a constructor, so its fields start out as uninitialized memory.

`Token::startToken()` initializes all fields. Calling it in
`JavaScriptImportSorter`'s constructor thus fixes the problem.

Differential Revision: https://reviews.llvm.org/D118448

[X86] combineSetCCMOVMSK - match all_of patterns with X86ISD::CMP as well as X86ISD::SUB

Previous folds by combineSetCCMOVMSK might have converted these to CMP when changing the bitwidth, and the CMP->SUB fold might not have happened (or will happen)

[llvm-mca] Plot as result of comparing multiple files

This patch introduces a new options for script llvm-mca-compare.py
(-plot-resource-pressure, -plot) to draw plots for llvm-mca tool
statistics and option (--plot-path) to specify relative path where
you want to save the plots.

Differential Revision: https://reviews.llvm.org/D115718

[RISCV] Fix FileCheck prefixes in RVV test

The LMULMAX check names didn't match the options we were passing to llc
(they were swapped around) and we were silently missing coverage for one
test which differs between RV32 and RV64.

[RISCV] Add tests for possible splat optimizations

These splats -- whether BUILD_VECTOR or SPLAT_VECTOR -- are formed by
first extracting a value from a vector and splatting it to all elements
of the destination vector. These could be performed more optimally,
avoiding the drop to scalar, using RVV's vrgather, for example.

[test][NewGVN] Use -passes=newgvn instead of -newgvn

Use the new PM syntax when specifying the pipeline in regression
tests previously running
  "opt -newgvn ..."

Instead we now do
  "opt -passes=newgvn ..."

Notice that this also changes the aa-pipeline to become the default
aa-pipeline instead of just basic-aa. Since these tests haven't been
explicitly requesting basic-aa in the past (compared to the test cases
updated in a separate patch involving "-basic-aa -newgvn") it is
assumed that the exact aa-pipeline isn't important for the validity
of the test cases. An alternative could have been to add
-aa-pipeline=basic-aa as well to the run lines, but that might just
add clutter in case the test cases do not care about the aa-pipeline.

This is another step to move away from the legacy PM syntax when
specifying passes in opt.

Differential Revision: https://reviews.llvm.org/D118341

[test][NewGVN] Use '-passes=newgvn' instead of '-basic-aa -newgvn'

This updates NewGVN test cases that were running
  "opt -basic-aa -newgvn ..."
to run
  "opt -passes=newgvn ..."
instead.

The pipeline will be more similar to what we used to have with
legacy PM by doing it this way. The compatility mode that we've
been using for awhile during transition from legacy PM to new PM,
i.e. using the legacy syntax together with new PM, has resulted in
a pipeline such as
  -passes='function(require<basic-aa>),function(newgvn)'
but running the analysis in a separate function pass manager seem
overly complicated for these tests.

Another difference is that we will get the default aa-pipeline instead
of only running basic-aa. That might be a bit questioned (given that
the tests originally specified basic-aa). The output is however
identival for all the test cases modified here regardless of using
basic-aa or the default aa-pipeline.

This is also another small step towards removal of the support for
using the legacy PM syntax in opt.

Differential Revision: https://reviews.llvm.org/D118340

[AArch64][SVE] NFC: Add test for scaled stepvector.

This commutative test could be optimised into:
  index z0.d, x0, x1

But currently isn't yet.

[SVE] Extend isel pattern coverage for BIC.

Adds patterns of the form "(and a, (not b)) -> bic".

NOTE: With this support I'm inclined to remove AArch64ISD::BIC,
but will leave that investigation for another time.

Differential Revision: https://reviews.llvm.org/D118365

[X86] Add test showing incorrect movmsk->ptest fold

We can't fold MOVMSK(BITCAST(PCMPEQ(X,0))) -> PTESTZ(X,X) if we're not testing every element comparison

[X86] combineSetCCMOVMSK - don't fold MOVMSK(BITCAST(PCMPEQ(X,0))) -> PTESTZ(X,X) if we're not testing every element comparison

Do not crash when trying to encode a _BitInt type

Using a _BitInt (or _ExtInt) type as a block parameter or block return
type hits an "unreachable" when trying to determine the encoding for
the block. Instead of crashing, this patch handles it like some of the
other types for which we don't yet have an encoding. The test case
verifies we no longer crash, but does not verify that we provide any
particular encoding (it can be updated once someone more familiar with
ObjC steps in to define the encoding).

Fixes PR50503.

[flang] Add missing FIRBuilder library

Fix buildbot failure https://lab.llvm.org/buildbot/#/builders/160

[x86] add test for possible load scalarization fold; NFC

This is a minimal test to show a transform proposed in D118376.

[HWASan] Leave pointer tagged when calling memmove.

Fixes a false positive that occurs when a user-implemented memmove is
instrumented by HWASan.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D118180

[AArch64][SVE][VLS] Move extends into arguments of comparisons

When a comparison is extended and it would be free to extend the
arguments to that comparison, we can propagate the extend into those arguments.
This prevents extra instructions being generated to extend the result of the
comparison, which is not free to extend.

This is a resubmission of D116812 with fixes that need another review.

Differential Revision: https://reviews.llvm.org/D118139

[PowerPC] Update handling of splat loads for v4i32/v4f32/v2i64 to require non-extending loads.

This patch updates how splat loads handled and is an extension of D106555.

Particularly, for v2i64/v4f32/v4i32 types, they are updated to handle only
non-extending loads. For v8i16/v16i8 types, they are updated to handle extending
loads only if the memory VT is the same vector element VT type.

A test case has been added to illustrate a scenario where a PPCISD::LD_SPLAT
node should not be produced. In this test, it depicts the following f64
extending load used in a v2f64 build vector, but the extending load is actually
used in more places other than the build vector (such as in t12 and t16).
```
Type-legalized selection DAG: %bb.0 'test:entry'
SelectionDAG has 20 nodes:
  t0: ch = EntryToken
  t4: i64,ch = CopyFromReg t0, Register:i64 %1
  t6: i64,ch = CopyFromReg t0, Register:i64 %2
  t11: f64,ch = load<(load (s64) from %ir.b, !tbaa !7)> t0, t4, undef:i64
        t16: f64 = fadd t31, t37
      t34: ch = store<(store (s64) into %ir.c, !tbaa !7)> t31:1, t16, t6, undef:i64
    t36: ch = TokenFactor t34, t37:1
    t27: v2f64 = BUILD_VECTOR t37, t37
  t22: ch,glue = CopyToReg t36, Register:v2f64 $v2, t27
      t12: f64 = fadd t11, t37
    t28: ch = store<(store (s64) into %ir.b, !tbaa !7)> t11:1, t12, t4, undef:i64
  t31: f64,ch = load<(load (s64) from %ir.c, !tbaa !7)> t28, t6, undef:i64
    t2: i64,ch = CopyFromReg t0, Register:i64 %0
  t37: f64,ch = load<(load (s32) from %ir.a, !tbaa !3), anyext from f32> t0, t2, undef:i64
  t23: ch = PPCISD::RET_FLAG t22, Register:v2f64 $v2, t22:1
```

Differential Revision: https://reviews.llvm.org/D117803

[ArgPromotion] Make areFunctionArgsABICompatible() static (NFC)

This function used to be shared with the Attributor, but can now
be made private.

[Sema] Add signed/unsigned integer mismatch tests for min/max elementwise builtins

As suggested on D117898

Differential Revision: https://reviews.llvm.org/D118464

[X86] SimplifyDemandedBitsForTargetNode - fold MOVMSK(YMM) -> MOVMSK(XMM)

If we don't demand the upper elements of the 256-bit vector, then just perform as a 128-bit vector

[update_test_checks] Fix option name in warning message

[MVerifier] Don't check liveness of any debug instruction operands

Shiny new DBG_PHI instruction usually have physical registers as operands
-- however, the machine verifier checks to see whether they're live, and
occasionally this fails. There's a filter for DBG_VALUE instructions to not
get verified in this way: expand it to exempt all debug instructions from
liveness checking, which means DBG_PHIs get treated like DBG_VALUEs.

This also future proofs against us adding new debug instructions.

Differential Revision: https://reviews.llvm.org/D117891

[ArgPromotion] Add test for non-willreturn load hoisting (NFC)

In this case, we have no guarantee that the load is unconditionally
executed, so the argument promotion is not legal.

[ArgPromotion] Don't assume all entry block instrs are executed

We should abort this walk if we hit any instruction that is not
guaranteed to transfer.

[NFC][RISCV] Bundle up ISAInfo updates and checks

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D118334

[RISCV][NFC] Make Zb* instruction naming match the convention used elsewhere in the RISC-V backend

Where the instruction mnemonic contains a dot, we name the corresponding
instruction in the .td file using a _ in the place of the dot. e.g. LR_W
rather than LRW. This commit updates RISCVInstrInfoZb.td to follow that
convention.

[x86] try harder to scalarize a vector load with extracted integer op uses

extract_vec_elt (load X), C --> scalar load (X+C)

As noted in the comment, DAGCombiner has this fold -- and the code in this
patch is adapted from DAGCombiner::scalarizeExtractedVectorLoad() -- but
x86 should benefit even if the loaded vector has other uses as long as we
apply some other x86-specific conditions. The motivating example from #50310
is shown in vec_int_to_fp.ll.

Fixes #50310

Differential Revision: https://reviews.llvm.org/D118376

[Loads] Require Align in isDereferenceableAndAlignedPointer() (NFC)

Now that loads always have an alignment, we should not perform an
ABI alignment fallback here.

[BasicBlockUtils] Fix typo in API name (NFC)

detatch -> detach. As this requires touching all uses, also
lower-case it in accordance with the style guide.

[CodeExtractor] Fix warning in assert (NFC)

[RISCV] Use __extendhfsf2/__truncsfhf2 for fp16 <-> fp32

`__gnu_h2f_ieee` and `__gnu_f2h_ieee` are introduce by ARM and set that as
default name for fp16 and fp32 conversion in LLVM.

However RISC-V GCC using default naming scheme for that, which is
`__extendhfsf2` and `__truncsfhf2` for that, that cause runtime ABI
incompatible issue.

Although we didn't have formal runtime ABI spec to specify those naming
convention yet, but I think it would be great to fix the incompatible
issue first.

And I've plan to create a runtime ABI spec undere psABI spec this year.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D118207

[lldb] Make ReadCStringFromMemory default to read from the file-cache.

Differential Revision: https://reviews.llvm.org/D118265

[NFC][AIX][clang] un-XFAIL gcc profile flag compat test

We can pass this test now thanks to recent changes that allow us to use PGO without LTO, so un-XFAIL the test and update the comments.

Differential Revision: https://reviews.llvm.org/D118474

[MLIR] Introduce LexSimplex to support lexicographic optimization

This patch introduces a class LexSimplex that can currently be used to find the
lexicographically minimal rational point in an IntegerPolyhedron. This is a
series of patches leading to computing the lexicographically minimal integer
lattice point as well parametric lexicographic minimization.

Reviewed By: Groverkss

Differential Revision: https://reviews.llvm.org/D117437

[clang][deps] Adapt test to be compatible when the assembler is called by default

When `-fno-integrated-as` is in effect (the default on AIX) the cc1 job produces a `.s` file instead. This patch adapts the test to accept `.s` or `.o` files.

Reviewed By: jansvoboda11

Differential Revision: https://reviews.llvm.org/D118152

[libc][NFC] Create file with all permissions for the user in read_write_test.

[lldb] [gdb-remote] Support getting siginfo via API

Add Thread::GetSiginfo() and SBThread::GetSiginfo() methods to retrieve
the siginfo value from server.

Differential Revision: https://reviews.llvm.org/D118055

[DAGCombiner] Fix invalid size request in combineRepeatedFPDivisors

If we have a vector FP division with a splatted divisor, use
getVectorMinNumElements when scaling the num of uses by splat factor.

For AArch64 the combine kicks in for the <vscale x 4 x float> case since it's
above the fdiv threshold (3) when scaling num uses by splat factor, but the
codegen is worse (splat + vector fdiv + vector fmul) than the <vscale x 2 x
double> case (splat + vector fdiv).

If the combine could be converted into a scalar FP division by
scalarizeBinOpOfSplats it may be cheaper, but it looks like this is predicated
on the isExtractVecEltCheap TLI function which is implemented for x86 but not
AArch64. Perhaps for now combineRepeatedFPDivisors should only scale num uses
by splat if the division can be converted into scalar op.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D118343

[msan][tsan] Refine __fxstat{,at}{,64} condition

In glibc before 2.33, include/sys/stat.h defines fstat/fstat64 to
`__fxstat/__fxstat64` and provides `__fxstat/__fxstat64` in libc_nonshared.a.
The symbols are glibc specific and not needed on other systems.

Reviewed By: vitalybuka, #sanitizers

Differential Revision: https://reviews.llvm.org/D118423

[SLP]Do not reorder top nodes if they do not require reordering.

No need to reorder the top nodes, if they are not stores or
insertelement instructions and each node should be analized only
once, when the bottom-to-top analysis is performed.
We still endup with extractelements for the top node scalars and
the final shuffle just adds an extra cost and currently
crashes the compiler for PHI nodes.

Differential Revision: https://reviews.llvm.org/D116760

[RISCV] Use tablegen size for getInstSizeInBytes.

Fix the pseudos to have the correct size in the MCInstrDesc description.

Inspired by D118009 and D117970.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D118175

[InstrProf][NFC] Move function out of InstrProf.h

`createIRLevelProfileFlagVar()` seems to be only used in
`PGOInstrumentation.cpp` so we move it to that file. Then it can also
take advantage of directly using options rather than passing them as
arguments.

Reviewed By: kyulee, phosek

Differential Revision: https://reviews.llvm.org/D118097

[RISCV] Preserve VL when truncating i64 gather/scatter indices on RV32.

We were creating a truncate with the default for the type, but for
VP intrinsics we have a VL that we should use.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D118406

[NFC][AIX]Disable new pcm tests on AIX

Same as D114481, the PCH reader looks for a `__clangast` section in the precompiled module file, which isn't present on AIX, and we don't support writing this custom section in XCOFF yet.

Reviewed By: Jake-Egan, daltenty, sfertile

Differential Revision: https://reviews.llvm.org/D118477

[AIX] Limit parallel link jobs to 2 for AIX buildbot

Lowering the setting to 2 from 6 to improve stability of the machine.

Reviewed By: daltenty

Differential Revision: https://reviews.llvm.org/D118410

Reduce the amount of parallelism on lldb-matrix