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Changes

Summary

  1. Revert "Allow system header to provide their own implementation of some (details)
  2. [COFF] Warn that LLD does not support /PDBSTRIPPED: (details)
  3. [libcxx] Use mtx_plain | mtx_recursive following C11 API (details)
  4. [lldb/Utils] Patch all variables used by lldb-dotest (details)
  5. [IR] Module's NamedMD table needn't be 'void *' (details)
  6. GlobalISel: Handle more cases of G_SEXT narrowing (details)
  7. AMDGPU: Remove custom node for exports (details)
  8. AMDGPU/GlobalISel: Select exp with patterns (details)
  9. [CodeExtractor] Transfer debug info to extracted function (details)
  10. [OPENMP]Use regular processing of vtable used when TU is a prefix. (details)
  11. Revert "Further implement CWG 2292" (details)
  12. Process BUNDLE in tail duplication (details)
  13. [lldb/Utils] Patch all variables used by lldb-dotest (2/2) (details)
  14. [lldb/Utils] Patch all variables used by lit (3/3) (details)
  15. Fix pack deduction to only deduce the arity of packs that are actually (details)
  16. [LLDB] Add ObjectFileWasm plugin for WebAssembly debugging (details)
  17. llc: Change behavior of -mattr with existing attribute (details)
  18. [lldb/Tools] Remove lldb-mi.exports (details)
  19. [Support] make report_fatal_error `abort` instead of `exit` (details)
  20. debugserver: Cut dependency on intrinsics_gen (details)
  21. Revert "[Support] make report_fatal_error `abort` instead of `exit`" (details)
  22. llc: Don't overwrite frame-pointer attribute (details)
  23. Fix the macos build after D71575. (details)
  24. [X86] Add 32-bit mode sse1 command line to scalar-int-to-fp.ll. NFC (details)
  25. [X86] When handling i64->f32 sint_to_fp on 32-bit targets only bitcast (details)
  26. [SampleFDO] Fix invalid branch profile generated by indirect call (details)
  27. PR42694 Support explicit(bool) in older language modes as an extension. (details)
  28. [lldb/Reproducers] Extract function for reading environment override (details)
  29. Set some fast math attributes in setFunctionAttributes (details)
  30. [lldb/Reproducers] Add a flag to always generating a reproducer (details)
  31. Insert wait instruction after X87 instructions which could raise (details)
  32. [gn build] Port 8fdafb7dced (details)
  33. [lldb/Reproducers] Print more info for reproducer status (details)
  34. [mlir] fix broken links to Glossary (details)
  35. [LegalizeDAG][TargetLowering] Move vXi64/i64->vXf32/f32 uint_to_fp (details)
  36. [DebugInfo] Simplify the constructor of DWARFDebugAranges::Range. NFC. (details)
Commit 3d210ed3d1880c615776b07d1916edb400c245a6 by akhuang
Revert "Allow system header to provide their own implementation of some
builtin"
This reverts commit 921f871ac438175ca8fcfcafdfcfac4d7ddf3905 because it
causes libc++ code to trigger __warn_memset_zero_len.
See https://reviews.llvm.org/D71082.
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/lib/AST/Decl.cpp
The file was removedclang/test/CodeGen/memcpy-nobuiltin.inc
The file was modifiedclang/include/clang/AST/Decl.h
The file was removedclang/test/CodeGen/memcpy-nobuiltin.c
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
Commit 8045a8a7f184b682bfb4e729a986a3c2bd3a5b4e by rnk
[COFF] Warn that LLD does not support /PDBSTRIPPED:
Doesn't really fix PR44491, but it avoids treating it as an input.
The file was modifiedlld/COFF/Options.td
The file was addedlld/test/COFF/pdbstripped.test
The file was modifiedlld/COFF/Driver.cpp
Commit 3481e5d7ed08d068a4e3427cb1afcd8bf2acafdc by phosek
[libcxx] Use mtx_plain | mtx_recursive following C11 API
The C11 API specifies that to initialize a recursive mutex, mtx_plain |
mtx_recursive should be used with mtx_init.
Differential Revision: https://reviews.llvm.org/D72809
The file was modifiedlibcxx/include/__threading_support
Commit 81fc1be601e7a8b73b675d318af9b1ba046fb5f5 by Jonas Devlieghere
[lldb/Utils] Patch all variables used by lldb-dotest
Instead of passing all the arguments for dotest.py as a single CMake
variable, lldb-dotest now uses separate variables for the different test
binaries. Before this change they'd all get patched as part of the
LLDB_DOTEST_ARGS. We need to patch the new variables as well.
The file was modifiedlldb/utils/lldb-dotest/CMakeLists.txt
Commit daab9227ff013db431e4ab6045bdbba55b3dd4f3 by modocache
[IR] Module's NamedMD table needn't be 'void *'
Summary: In July 21 2010 `llvm::NamedMDNode` was refactored such that it
would no longer subclass `llvm::Value`:
https://github.com/llvm/llvm-project/commit/2637cc1a38d7336ea30caf
As part of this change, a map type from metadata names to their named
metadata, `llvm::MDSymbolTable`, was deleted. In its place, the type of
member `llvm::Module::NamedMDSymTab` was changed, from
`llvm::MDSymbolTable` to `void *`. The underlying memory allocations for
this pointer were changed to `new StringMap<NamedMDNode *>()`.
However, as far as I can tell, there's no need for obscuring the
underlying type being pointed to by the `void *`, and no need for static
casts from `void *` to `StringMap`. In fact, I don't think there's a
need for explicit calls to `new` and `delete` at all.
This commit changes `NamedMDSymTab` from a pointer to a reference, which
automatically couples its lifetime with the lifetime of its owning
`llvm::Module` instance, thus removing the explicit calls to `new` and
`delete` in the `llvm::Module` constructor and destructor. It also
changes the type from `void *` to a newly defined `NamedMDSymTabType`,
and removes the static casts.
Test Plan: An ASAN-enabled build and run of `check-all` succeeds with
this change
(aside from some tests that always fail for me in ASAN for some reason,
such as `check-clang` `SemaTemplate/stack-exhaustion.cpp`).
Reviewers: aprantl, dblaikie, chandlerc, pcc, echristo
Reviewed By: dblaikie
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72812
The file was modifiedllvm/lib/IR/Module.cpp
The file was modifiedllvm/include/llvm/IR/Module.h
Commit 25e9938a45e8dfde752a4e93c48ff0184d4784d9 by arsenm2
GlobalISel: Handle more cases of G_SEXT narrowing
This now develops the same problem G_ZEXT/G_ANYEXT have where the
requested type is assumed to be the source type. This will be fixed
separately by creating intermediate merges.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
Commit eef92f25ccf186935008c98f8147ad2ee178dcbb by arsenm2
AMDGPU: Remove custom node for exports
I'm mildly worried about potentially reordering exp/exp_done with
IntrWriteMem on the intrinsic.
Requires hacking out the illegal type on SI, so manually select that
case during lowering.
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
Commit 711a17afaff276f816aca5dc4a68fae4e17a2c12 by arsenm2
AMDGPU/GlobalISel: Select exp with patterns
This does produce slightly different code. Now a unique IMPLICIT_DEF is
emitted for each of the implicit_def operands, rather than reusing the
same one.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir
Commit 360abb7ee56f1524b6e2951a4fda36296d5b3582 by Vedant Kumar
[CodeExtractor] Transfer debug info to extracted function
After extracting, fix up debug info in both the old and new functions by
1) Pointing line locations and debug intrinsics to the new subprogram
  scope, and
2) Deleting intrinsics which point to values outside of the new
  function.
Depends on https://reviews.llvm.org/D72795.
Testing: check-llvm, check-clang, a build of LNT in the `-Os -g` config
with "-mllvm -hot-cold-split=1" set, and end-to-end debugging of a toy
program which undergoes splitting to verify that lldb can find
variables, single step, etc. in extracted code.
rdar://45507940
Differential Revision: https://reviews.llvm.org/D72801
The file was modifiedllvm/lib/Transforms/Utils/CodeExtractor.cpp
The file was addedllvm/test/Transforms/HotColdSplit/transfer-debug-info.ll
The file was addedllvm/test/Transforms/HotColdSplit/split-out-dbg-label.ll
The file was addedllvm/test/Transforms/HotColdSplit/update-split-loop-metadata.ll
Commit b841b9e96e605bed5a1f9b846a07aae88c65ce02 by a.bataev
[OPENMP]Use regular processing of vtable used when TU is a prefix.
If current kind of the translation unit is TU_Prefix and it is not
complete, cannot decide what to do with virtual members/table at that
time, need to delay it to later stages.
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/test/OpenMP/declare_target_codegen.cpp
Commit 44560762c62d72a103bdceff49ffa70451efd5f8 by akhuang
Revert "Further implement CWG 2292"
This reverts commit ee0f1f1edc3ec0d4e698d50cc3180217448802b7 because it
causes an error on valid code. See
https://reviews.llvm.org/rGee0f1f1edc3ec0d4e698d50cc3180217448802b7.
The file was removedclang/test/SemaCXX/pseudo-destructor-name.cpp
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
Commit 8b417dd3d6c6e4c83dee172e9b37cc2ba51c635a by Stanislav.Mekhanoshin
Process BUNDLE in tail duplication
When tail duplication estimates a size of tail it uses instruction
count. Account for a number of instrictions in a bundle too.
Differential Revision: https://reviews.llvm.org/D72783
The file was addedllvm/test/CodeGen/AMDGPU/tail-dup-bundle.mir
The file was modifiedllvm/lib/CodeGen/TailDuplicator.cpp
Commit cf958498c4b49447ab1ba6bb61a7d8816d306107 by Jonas Devlieghere
[lldb/Utils] Patch all variables used by lldb-dotest (2/2)
Instead of passing all the arguments for dotest.py as a single CMake
variable, lldb-dotest now uses separate variables for the different test
binaries. Before this change they'd all get patched as part of the
LLDB_DOTEST_ARGS. We need to patch the new variables as well.
The file was modifiedlldb/utils/lldb-dotest/CMakeLists.txt
Commit eac134ddf0344ff44bcd6a6285b6498e080cd1e3 by Jonas Devlieghere
[lldb/Utils] Patch all variables used by lit (3/3)
Instead of passing all the arguments for dotest.py as a single CMake
variable, lit now uses separate variables for the different test
binaries. Before this change they'd all get patched as part of the
LLDB_DOTEST_ARGS. We need to patch the new variables as well.
The file was modifiedlldb/test/API/CMakeLists.txt
Commit e8f198dd9e9dabed8d50276465906e7c8827cada by richard
Fix pack deduction to only deduce the arity of packs that are actually
expanded by the deduced pack.
We recently started also deducing the arity of separately-expanded packs
that are merely mentioned within the pack in question, which is
incorrect.
The file was modifiedclang/test/SemaTemplate/deduction.cpp
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
Commit 4bafceced6a7641be7b090229c6ccef22cf55bff by dschuff
[LLDB] Add ObjectFileWasm plugin for WebAssembly debugging
Summary: This is the first in a series of patches to enable LLDB
debugging of WebAssembly targets.
Current versions of Clang emit (partial) DWARF debug information in
WebAssembly modules and we can leverage this debug information to give
LLDB the ability to do source-level debugging of Wasm code that runs in
a WebAssembly engine.
A way to do this could be to use the remote debugging functionalities
provided by LLDB via the GDB-remote protocol. Remote debugging can
indeed be useful not only to connect a debugger to a process running on
a remote machine, but also to connect the debugger to a managed VM or
script engine that runs locally, provided that the engine implements a
GDB-remote stub that offers the ability to access the engine runtime
internal state.
To make this work, the GDB-remote protocol would need to be extended
with a few Wasm-specific custom query commands, used to access aspects
of the Wasm engine state (like the Wasm memory, Wasm local and global
variables, and so on). Furthermore, the DWARF format would need to be
enriched with a few Wasm-specific extensions, here detailed:
https://yurydelendik.github.io/webassembly-dwarf.
This CL introduce classes **ObjectFileWasm**, a file plugin to represent
a Wasm module loaded in a debuggee process. It knows how to parse Wasm
modules and store the Code section and the DWARF-specific sections.
Reviewers: jasonmolenda, clayborg, labath
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D71575
The file was modifiedlldb/tools/lldb-test/SystemInitializerTest.cpp
The file was modifiedlldb/source/Utility/ArchSpec.cpp
The file was addedlldb/test/Shell/ObjectFile/wasm/stripped-debug-sections.yaml
The file was modifiedlldb/include/lldb/Utility/ArchSpec.h
The file was addedlldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
The file was addedlldb/test/Shell/ObjectFile/wasm/basic.yaml
The file was modifiedlldb/source/Plugins/ObjectFile/CMakeLists.txt
The file was addedlldb/source/Plugins/ObjectFile/wasm/CMakeLists.txt
The file was addedlldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
The file was modifiedlldb/source/API/SystemInitializerFull.cpp
The file was addedlldb/test/Shell/ObjectFile/wasm/embedded-debug-sections.yaml
Commit 67ec8744d7e72b50a5db5038c9643584ce57cb0c by arsenm2
llc: Change behavior of -mattr with existing attribute
Append this to the existing target-features attribute on the function.
Some flags ignore existing attributes, and some overwrite them. Move
towards consistently respecting existing attributes if present. Since
target features act as a state machine on their own, append to the
function attribute. The backend default added feature list, function
attributes, and -mattr will all be appended together, and the later
features can individually toggle the earlier settings.
The file was modifiedllvm/test/CodeGen/WebAssembly/target-features.ll
The file was modifiedllvm/include/llvm/CodeGen/CommandFlags.inc
The file was modifiedllvm/test/Other/opt-override-mcpu-mattr.ll
Commit 9efd57e3b7daa7ebd891084b8564440c5ef297ad by Jonas Devlieghere
[lldb/Tools] Remove lldb-mi.exports
lldb-mi was removed from the repo a while ago.
The file was removedlldb/tools/lldb-mi/lldb-mi.exports
Commit 647c3f4e47de8a850ffcaa897db68702d8d2459a by Yuanfang Chen
[Support] make report_fatal_error `abort` instead of `exit`
Summary: This patch could be treated as a rebase of D33960. It also
fixes PR35547. A fix for `llvm/test/Other/close-stderr.ll` is proposed
in D68164. Seems the consensus is that the test is passing by chance and
I'm not sure how important it is for us. So it is removed like in D33960
for now. The rest of the test fixes are just adding `--crash` flag to
`not` tool.
** The reason it fixes PR35547 is
`exit` does cleanup including calling class destructor whereas `abort`
does not do any cleanup. In multithreading environment such as ThinLTO
or JIT, threads may share states which mostly are ManagedStatic<>. If
faulting thread tearing down a class when another thread is using it,
there are chances of memory corruption. This is bad 1. It will stop
error reporting like pretty stack printer; 2. The memory corruption is
distracting and nondeterministic in terms of error message, and
corruption type (depending one the timing, it could be double free, heap
free after use, etc.).
Reviewers: rnk, chandlerc, zturner, sepavloff, MaskRay, espindola
Reviewed By: rnk, MaskRay
Subscribers: wuzish, jholewinski, qcolombet, dschuff, jyknight, emaste,
sdardis, nemanjai, jvesely, nhaehnle, sbc100, arichardson,
jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso,
simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones,
atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei,
jsji, lenary, s.egerton, pzheng, cfe-commits, MaskRay, filcab, davide,
MatzeB, mehdi_amini, hiraditya, steven_wu, dexonsmith, rupprecht, seiya,
llvm-commits
Tags: #llvm, #clang
Differential Revision: https://reviews.llvm.org/D67847
The file was modifiedllvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
The file was modifiedllvm/test/MC/MachO/variable-errors.s
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir
The file was modifiedllvm/test/CodeGen/Lanai/codemodel.ll
The file was modifiedllvm/test/MachineVerifier/test_g_bitcast.mir
The file was modifiedllvm/test/MachineVerifier/test_phis_precede_nonphis.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
The file was modifiedllvm/test/CodeGen/XCore/codemodel.ll
The file was modifiedllvm/test/MC/WebAssembly/blockaddress.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
The file was modifiedllvm/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s
The file was modifiedllvm/test/CodeGen/ARM/named-reg-notareg.ll
The file was modifiedllvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll
The file was modifiedllvm/test/MC/X86/check-end-of-data-region.s
The file was modifiedllvm/test/CodeGen/Mips/micromips64-unsupported.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/ins-pos.mir
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-02.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-to-kernel.ll
The file was modifiedllvm/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s
The file was modifiedllvm/test/MachineVerifier/test_g_concat_vectors.mir
The file was modifiedllvm/test/CodeGen/Mips/cpus.ll
The file was modifiedllvm/test/CodeGen/PowerPC/codemodel.ll
The file was modifiedllvm/test/MachineVerifier/verifier-phi-fail0.mir
The file was modifiedllvm/test/CodeGen/X86/fast-isel-args-fail2.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout9.ll
The file was modifiedllvm/test/CodeGen/X86/equiv_with_fndef.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout4.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsu-size.mir
The file was modifiedllvm/test/CodeGen/ARM/stc2.ll
The file was modifiedllvm/test/MachineVerifier/test_g_sextload.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dins-pos.mir
The file was modifiedllvm/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s
The file was modifiedllvm/test/CodeGen/RISCV/get-register-invalid.ll
The file was modifiedllvm/include/llvm/Support/ErrorHandling.h
The file was modifiedllvm/test/CodeGen/RISCV/interrupt-attr-ret-error.ll
The file was modifiedllvm/test/CodeGen/X86/coff-comdat2.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll
The file was modifiedllvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
The file was modifiedllvm/test/Other/optimization-remarks-inline.ll
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-03.ll
The file was modifiedllvm/test/Bitcode/function-default-address-spaces.ll
The file was modifiedllvm/test/DebugInfo/COFF/types-recursive-unnamed.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout1.ll
The file was modifiedllvm/test/MachineVerifier/test_g_inttoptr.mir
The file was modifiedllvm/test/CodeGen/X86/macho-comdat.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout16.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll
The file was modifiedllvm/test/CodeGen/Mips/mips64r6/compatibility.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
The file was modifiedllvm/docs/ProgrammersManual.rst
The file was modifiedllvm/test/MachineVerifier/test_g_dyn_stackalloc.mir
The file was modifiedllvm/test/MachineVerifier/test_g_shuffle_vector.mir
The file was modifiedllvm/test/CodeGen/Mips/cpus-no-mips64.ll
The file was modifiedllvm/test/CodeGen/Mips/mips32r6/compatibility.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/cpus.ll
The file was modifiedllvm/test/CodeGen/X86/equiv_with_vardef.ll
The file was modifiedllvm/test/MachineVerifier/test_g_fcmp.mir
The file was modifiedclang/unittests/libclang/CrashTests/LibclangCrashTest.cpp
The file was modifiedllvm/test/Assembler/invalid-datalayout14.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-nest-param.ll
The file was modifiedllvm/test/CodeGen/ARM/usat-v4t.ll
The file was modifiedllvm/test/MachineVerifier/verifier-generic-types-1.mir
The file was modifiedllvm/test/MachineVerifier/test_g_build_vector_trunc.mir
The file was modifiedllvm/test/MachineVerifier/test_g_ptr_add.mir
The file was modifiedllvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/ext-pos.mir
The file was modifiedllvm/test/MachineVerifier/verifier-generic-extend-truncate.mir
The file was modifiedllvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
The file was modifiedllvm/test/MachineVerifier/test_g_add.mir
The file was modifiedllvm/test/CodeGen/PowerPC/aix-stackargs.ll
The file was modifiedllvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
The file was modifiedllvm/test/CodeGen/X86/segmented-stacks.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/ext-size.mir
The file was modifiedllvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
The file was modifiedllvm/test/CodeGen/WebAssembly/offset-atomics.ll
The file was modifiedllvm/test/CodeGen/RISCV/musttail-call.ll
The file was modifiedllvm/test/Transforms/FunctionImport/not-prevailing.ll
The file was modifiedllvm/test/MachineVerifier/test_g_ptrtoint.mir
The file was modifiedllvm/test/CodeGen/Generic/llc-start-stop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
The file was modifiedllvm/test/CodeGen/SPARC/codemodel.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
The file was modifiedllvm/test/Assembler/getInt.ll
The file was modifiedllvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-04.ll
The file was modifiedllvm/test/CodeGen/X86/invalid-liveness.mir
The file was modifiedllvm/test/MC/X86/invalid-sleb.s
The file was modifiedllvm/test/MachineVerifier/test_copy_mismatch_types.mir
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-07.ll
The file was modifiedllvm/test/MC/ELF/section-numeric-invalid-type.s
The file was modifiedllvm/test/MachineVerifier/test_g_sext_inreg.mir
The file was modifiedllvm/test/CodeGen/RISCV/rv32e.ll
The file was modifiedllvm/test/CodeGen/ARM/usat-upper.ll
The file was modifiedllvm/test/MachineVerifier/test_g_insert.mir
The file was modifiedllvm/test/CodeGen/PowerPC/aix-byval-param.ll
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/si-support.txt
The file was modifiedllvm/test/Assembler/datalayout-invalid-function-ptr-alignment.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
The file was modifiedllvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
The file was modifiedllvm/test/MachineVerifier/verifier-generic-types-2.mir
The file was modifiedllvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsm-size.mir
The file was modifiedllvm/test/CodeGen/SystemZ/mrecord-mcount-02.ll
The file was modifiedllvm/test/CodeGen/BPF/xadd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
The file was modifiedllvm/test/CodeGen/X86/llc-print-machineinstrs.mir
The file was modifiedllvm/test/CodeGen/X86/label-redefinition.ll
The file was modifiedllvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-neg-int-arith-imm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dext-pos.mir
The file was modifiedllvm/test/CodeGen/RISCV/interrupt-attr-invalid.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout22.ll
The file was modifiedllvm/test/Assembler/datalayout-invalid-stack-natural-alignment.ll
The file was modifiedllvm/test/CodeGen/Mips/msa/immediates-bad.ll
The file was modifiedllvm/test/MachineVerifier/test_g_merge_values.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
The file was modifiedllvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
The file was modifiedllvm/test/MachineVerifier/test_g_zextload.mir
The file was modifiedllvm/test/MachineVerifier/verify-selected.mir
The file was modifiedllvm/test/MC/COFF/section-comdat-conflict2.s
The file was modifiedllvm/test/CodeGen/X86/cpus-no-x86_64.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout6.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextm-pos.mir
The file was modifiedllvm/test/MachineVerifier/test_g_trunc.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextu-size.mir
The file was modifiedllvm/test/MC/ARM/Windows/invalid-relocation.s
The file was modifiedllvm/test/Bitcode/invalid.test
The file was modifiedllvm/test/Transforms/BlockExtractor/invalid-line.ll
The file was modifiedllvm/test/Transforms/BlockExtractor/invalid-block.ll
The file was modifiedllvm/test/CodeGen/ARM/machine-verifier.mir
The file was modifiedllvm/test/CodeGen/XCore/alignment.ll
The file was modifiedllvm/test/CodeGen/ARM/special-reg-mcore.ll
The file was modifiedllvm/test/CodeGen/X86/named-reg-notareg.ll
The file was modifiedllvm/test/MachineVerifier/live-ins-02.mir
The file was modifiedllvm/test/MachineVerifier/test_g_icmp.mir
The file was modifiedllvm/test/CodeGen/Mips/fp64a.ll
The file was modifiedclang-tools-extra/test/clang-tidy/infrastructure/empty-database.cpp
The file was modifiedllvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
The file was modifiedllvm/test/CodeGen/ARM/special-reg-v8m-main.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout-alloca-addrspace.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
The file was modifiedllvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextu-pos.mir
The file was modifiedllvm/test/MachineVerifier/test_g_select.mir
The file was modifiedllvm/test/CodeGen/ARM/named-reg-alloc.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
The file was modifiedllvm/test/CodeGen/AArch64/sve-neg-int-arith-imm-2.ll
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-04.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout18.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout20.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout8.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
The file was modifiedllvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout2.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
The file was modifiedllvm/test/CodeGen/X86/nonconst-static-iv.ll
The file was modifiedllvm/test/TableGen/HwModeSelect.td
The file was modifiedllvm/test/CodeGen/Mips/msa/3r-a.ll
The file was modifiedllvm/test/Transforms/InstCombine/limit-max-iterations.ll
The file was modifiedllvm/test/CodeGen/XCore/section-name.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/ins-size.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/div_i128.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
The file was modifiedllvm/test/CodeGen/RISCV/get-register-reserve.ll
The file was modifiedllvm/test/MC/Mips/micromips64r6-unsupported.s
The file was modifiedllvm/test/CodeGen/Mips/interrupt-attr-args-error.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-01.ll
The file was modifiedllvm/test/CodeGen/ARM/usat-lower.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-06.ll
The file was modifiedllvm/test/Object/elf-invalid-phdr.test
The file was modifiedllvm/test/MC/X86/AlignedBundling/unlock-without-lock-error.s
The file was modifiedllvm/test/CodeGen/ARM/codemodel.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/double-arg.ll
The file was modifiedllvm/test/CodeGen/X86/named-reg-alloc.ll
The file was modifiedllvm/test/MachineVerifier/test_memccpy_intrinsics.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout11.ll
The file was modifiedllvm/test/CodeGen/X86/inalloca-regparm.ll
The file was modifiedllvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-05.ll
The file was modifiedllvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
The file was modifiedllvm/test/LTO/X86/attrs.ll
The file was modifiedllvm/test/Object/wasm-string-outside-section.test
The file was modifiedllvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-03.ll
The file was modifiedllvm/test/CodeGen/RISCV/target-abi-valid.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
The file was modifiedllvm/test/CodeGen/SystemZ/codemodel.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout23.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout12.ll
The file was modifiedllvm/test/CodeGen/X86/nonconst-static-ev.ll
The file was modifiedllvm/test/CodeGen/RISCV/interrupt-attr-args-error.ll
The file was modifiedllvm/test/Object/coff-invalid.test
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dins-size.mir
The file was modifiedllvm/test/MachineVerifier/test_copy.mir
The file was modifiedllvm/test/MC/PowerPC/pr24686.s
The file was modifiedllvm/test/CodeGen/WebAssembly/exception.ll
The file was modifiedllvm/test/MachineVerifier/test_g_intrinsic.mir
The file was modifiedlld/test/ELF/lto/ltopasses-custom.ll
The file was modifiedllvm/test/MachineVerifier/verify-regbankselected.mir
The file was modifiedllvm/test/CodeGen/PowerPC/aix-trampoline.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout13.ll
The file was modifiedllvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll
The file was modifiedllvm/test/Bitcode/invalid-functionptr-align.ll
The file was modifiedllvm/test/CodeGen/X86/AppendingLinkage.ll
The file was modifiedllvm/test/MachineVerifier/test_g_addrspacecast.mir
The file was modifiedllvm/test/CodeGen/Mips/fpxx.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout5.ll
The file was modifiedllvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout24.ll
The file was modifiedllvm/test/MC/PowerPC/ppc64-localentry-error2.s
The file was modifiedllvm/test/CodeGen/NVPTX/alias.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir
The file was modifiedllvm/test/CodeGen/BPF/sdiv_error.ll
The file was modifiedllvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll
The file was modifiedllvm/test/CodeGen/SystemZ/mverify-optypes.mir
The file was modifiedllvm/test/MC/ELF/ARM/bss-non-zero-value.s
The file was modifiedllvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir
The file was modifiedllvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
The file was modifiedllvm/test/CodeGen/NVPTX/fcos-no-fast-math.ll
The file was modifiedllvm/test/MC/X86/encoder-fail.s
The file was modifiedllvm/test/MachineVerifier/test_g_brjt.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout15.ll
The file was modifiedllvm/test/CodeGen/NVPTX/global-dtor.ll
The file was modifiedllvm/test/CodeGen/NVPTX/libcall-intrinsic.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll
The file was modifiedllvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
The file was modifiedllvm/test/MC/Mips/micromips64-unsupported.s
The file was modifiedllvm/test/CodeGen/Generic/opt-codegen-no-target-machine.ll
The file was modifiedllvm/test/tools/llvm-lto2/X86/pipeline.ll
The file was modifiedllvm/test/CodeGen/Mips/interrupt-attr-error.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
The file was modifiedllvm/test/CodeGen/SystemZ/mnop-mcount-02.ll
The file was modifiedllvm/test/MachineVerifier/verify-regops.mir
The file was modifiedllvm/test/MachineVerifier/test_g_fconstant.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dext-size.mir
The file was modifiedllvm/test/MachineVerifier/test_g_build_vector.mir
The file was modifiedllvm/test/CodeGen/AArch64/tiny_supported.ll
The file was modifiedllvm/test/CodeGen/NVPTX/libcall-instruction.ll
The file was modifiedllvm/test/CodeGen/X86/coff-comdat3.ll
The file was modifiedllvm/test/CodeGen/MIR/X86/machine-verifier.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout10.ll
The file was modifiedllvm/test/CodeGen/SPARC/sret-secondary.ll
The file was modifiedllvm/test/MC/RISCV/mattr-invalid-combination.s
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-02.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/clear-cache.ll
The file was modifiedllvm/test/MC/PowerPC/ppc64-localentry-error1.s
The file was modifiedllvm/test/MachineVerifier/test_g_store.mir
The file was modifiedllvm/test/CodeGen/Mips/interrupt-attr-64-error.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll
The file was modifiedllvm/test/CodeGen/X86/codemodel.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout-program-addrspace.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
The file was modifiedllvm/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s
The file was modifiedllvm/test/CodeGen/SPARC/fail-alloca-align.ll
The file was modifiedllvm/test/CodeGen/Hexagon/misaligned-const-load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/verify-sop.mir
The file was modifiedllvm/test/MachineVerifier/live-ins-01.mir
The file was modifiedllvm/test/Transforms/BlockExtractor/invalid-function.ll
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-05.ll
The file was modifiedllvm/test/Object/wasm-invalid-file.yaml
The file was modifiedllvm/test/MC/Mips/nooddspreg-cmdarg.s
The file was modifiedllvm/test/CodeGen/X86/clwb.ll
The file was modifiedllvm/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-07.ll
The file was modifiedllvm/test/MachineVerifier/test_g_constant.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
The file was modifiedllvm/test/MachineVerifier/test_g_phi.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout7.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout21.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout19.ll
The file was modifiedllvm/test/MachineVerifier/test_g_extract.mir
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-06.ll
The file was modifiedllvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
The file was modifiedllvm/test/CodeGen/ARM/special-reg-v8m-base.ll
The file was modifiedllvm/test/MC/ELF/common-error3.s
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-08.ll
The file was modifiedllvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
The file was modifiedllvm/test/MC/X86/reloc-bss.s
The file was modifiedllvm/test/CodeGen/ARM/special-reg-acore.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout17.ll
The file was modifiedllvm/test/MachineVerifier/live-ins-03.mir
The file was modifiedllvm/test/CodeGen/ARM/ssat-upper.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-initializer.ll
The file was modifiedllvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll
The file was modifiedllvm/test/MachineVerifier/test_g_jump_table.mir
The file was modifiedllvm/test/Object/invalid.test
The file was modifiedllvm/test/CodeGen/ARM/ldc2l.ll
The file was modifiedllvm/lib/Support/ErrorHandling.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was modifiedllvm/test/CodeGen/Hexagon/misaligned-const-store.ll
The file was modifiedllvm/test/CodeGen/NVPTX/global-ctor.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
The file was modifiedllvm/test/CodeGen/ARM/ssat-lower.ll
The file was modifiedllvm/test/MachineVerifier/verifier-pseudo-terminators.mir
The file was modifiedllvm/test/MC/COFF/section-comdat-conflict.s
The file was modifiedllvm/test/MachineVerifier/test_g_load.mir
The file was modifiedllvm/test/CodeGen/NVPTX/fsin-no-fast-math.ll
The file was modifiedllvm/test/MC/X86/AlignedBundling/bundle-lock-option-error.s
The file was modifiedllvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
The file was modifiedllvm/test/CodeGen/ARM/ssat-v4t.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll
The file was modifiedllvm/test/CodeGen/RISCV/verify-instr.mir
The file was removedllvm/test/Other/close-stderr.ll
The file was modifiedllvm/test/tools/llvm-readobj/COFF/arm64-win-error2.s
The file was modifiedllvm/test/Assembler/invalid-datalayout3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
The file was modifiedllvm/test/MC/X86/AlignedBundling/switch-section-locked-error.s
The file was modifiedllvm/test/Transforms/GCOVProfiling/version.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextm-size.mir
Commit 1e89fb947ed1f8042e13b5840751b73b18cd6534 by Vedant Kumar
debugserver: Cut dependency on intrinsics_gen
debugserver does not depend on intrinsics_gen or on llvm.
The file was modifiedlldb/tools/debugserver/source/CMakeLists.txt
Commit 6e24c6037f7921923fdc4584eb4fce889cc1745e by Yuanfang Chen
Revert "[Support] make report_fatal_error `abort` instead of `exit`"
This reverts commit 647c3f4e47de8a850ffcaa897db68702d8d2459a.
Got bots failure from sanitizer-windows and maybe others.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dext-pos.mir
The file was modifiedllvm/test/MC/X86/reloc-bss.s
The file was modifiedllvm/test/CodeGen/Mips/msa/immediates-bad.ll
The file was modifiedllvm/test/CodeGen/X86/inalloca-regparm.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-05.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dins-size.mir
The file was modifiedllvm/test/MachineVerifier/test_g_zextload.mir
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll
The file was modifiedllvm/test/MC/ELF/section-numeric-invalid-type.s
The file was modifiedllvm/test/Transforms/BlockExtractor/invalid-function.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/ins-pos.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout6.ll
The file was modifiedllvm/test/MachineVerifier/test_g_intrinsic.mir
The file was modifiedllvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
The file was modifiedllvm/test/Assembler/datalayout-invalid-function-ptr-alignment.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-06.ll
The file was modifiedllvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
The file was modifiedllvm/test/CodeGen/ARM/ldc2l.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout4.ll
The file was modifiedllvm/test/CodeGen/Hexagon/misaligned-const-store.ll
The file was modifiedllvm/test/CodeGen/X86/llc-print-machineinstrs.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout5.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
The file was modifiedllvm/test/DebugInfo/COFF/types-recursive-unnamed.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
The file was modifiedllvm/test/CodeGen/SystemZ/codemodel.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
The file was modifiedllvm/test/CodeGen/X86/named-reg-notareg.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/double-arg.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/cpus.ll
The file was modifiedllvm/test/MachineVerifier/test_g_merge_values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-initializer.ll
The file was modifiedlld/test/ELF/lto/ltopasses-custom.ll
The file was modifiedllvm/test/MachineVerifier/test_g_constant.mir
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-07.ll
The file was modifiedllvm/test/MC/PowerPC/pr24686.s
The file was modifiedllvm/test/CodeGen/Mips/instverify/dext-size.mir
The file was modifiedllvm/test/CodeGen/Hexagon/misaligned-const-load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-to-kernel.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout19.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/ext-size.mir
The file was modifiedllvm/test/MC/PowerPC/ppc64-localentry-error1.s
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll
The file was modifiedllvm/test/CodeGen/RISCV/musttail-call.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll
The file was modifiedllvm/test/CodeGen/Generic/opt-codegen-no-target-machine.ll
The file was modifiedllvm/test/Object/invalid.test
The file was modifiedllvm/test/CodeGen/ARM/special-reg-v8m-base.ll
The file was modifiedllvm/test/MachineVerifier/verifier-generic-types-1.mir
The file was modifiedllvm/test/Assembler/datalayout-invalid-stack-natural-alignment.ll
The file was modifiedllvm/test/MachineVerifier/test_g_brjt.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
The file was modifiedllvm/test/MC/Mips/micromips64-unsupported.s
The file was modifiedllvm/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s
The file was modifiedllvm/test/LTO/X86/attrs.ll
The file was modifiedllvm/test/MC/COFF/section-comdat-conflict.s
The file was modifiedllvm/test/CodeGen/Mips/mips32r6/compatibility.ll
The file was modifiedllvm/test/CodeGen/NVPTX/libcall-intrinsic.ll
The file was modifiedllvm/test/MachineVerifier/test_g_extract.mir
The file was modifiedllvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
The file was modifiedllvm/test/MachineVerifier/live-ins-02.mir
The file was modifiedllvm/test/MachineVerifier/test_g_store.mir
The file was modifiedllvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
The file was modifiedllvm/test/MC/X86/AlignedBundling/unlock-without-lock-error.s
The file was modifiedllvm/test/MachineVerifier/test_g_concat_vectors.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextu-pos.mir
The file was modifiedllvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
The file was modifiedllvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
The file was modifiedllvm/test/CodeGen/RISCV/verify-instr.mir
The file was modifiedllvm/test/MachineVerifier/test_g_inttoptr.mir
The file was modifiedllvm/test/Assembler/getInt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
The file was modifiedllvm/test/MC/RISCV/mattr-invalid-combination.s
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
The file was modifiedllvm/test/MachineVerifier/test_phis_precede_nonphis.mir
The file was modifiedllvm/include/llvm/Support/ErrorHandling.h
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-04.ll
The file was modifiedllvm/test/MachineVerifier/test_g_build_vector_trunc.mir
The file was modifiedllvm/test/MachineVerifier/test_g_icmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
The file was modifiedllvm/test/CodeGen/AArch64/sve-neg-int-arith-imm.ll
The file was modifiedllvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-08.ll
The file was modifiedllvm/test/Transforms/GCOVProfiling/version.ll
The file was modifiedllvm/test/CodeGen/Mips/interrupt-attr-64-error.ll
The file was modifiedllvm/test/CodeGen/MIR/X86/machine-verifier.mir
The file was modifiedllvm/test/MachineVerifier/test_memccpy_intrinsics.mir
The file was modifiedllvm/test/CodeGen/SPARC/fail-alloca-align.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextu-size.mir
The file was modifiedllvm/test/Object/wasm-string-outside-section.test
The file was modifiedllvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout13.ll
The file was modifiedllvm/test/Bitcode/function-default-address-spaces.ll
The file was modifiedllvm/test/CodeGen/X86/nonconst-static-ev.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout21.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout15.ll
The file was modifiedllvm/test/CodeGen/Mips/fp64a.ll
The file was modifiedllvm/test/CodeGen/PowerPC/codemodel.ll
The file was modifiedllvm/test/Transforms/BlockExtractor/invalid-block.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout10.ll
The file was modifiedllvm/test/CodeGen/ARM/ssat-v4t.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
The file was modifiedllvm/test/MachineVerifier/verifier-pseudo-terminators.mir
The file was modifiedllvm/test/MachineVerifier/test_copy_mismatch_types.mir
The file was modifiedllvm/test/CodeGen/RISCV/target-abi-valid.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/exception.ll
The file was modifiedllvm/test/MC/ELF/ARM/bss-non-zero-value.s
The file was modifiedllvm/test/CodeGen/ARM/usat-upper.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-02.ll
The file was modifiedllvm/test/MachineVerifier/test_g_phi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
The file was modifiedllvm/test/CodeGen/RISCV/rv32e.ll
The file was modifiedllvm/test/CodeGen/RISCV/get-register-reserve.ll
The file was modifiedllvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
The file was modifiedllvm/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s
The file was modifiedllvm/test/CodeGen/WebAssembly/clear-cache.ll
The file was modifiedllvm/test/MC/Mips/nooddspreg-cmdarg.s
The file was modifiedllvm/test/MachineVerifier/test_g_fconstant.mir
The file was modifiedllvm/test/CodeGen/XCore/codemodel.ll
The file was modifiedllvm/test/MachineVerifier/test_g_bitcast.mir
The file was modifiedllvm/test/Bitcode/invalid.test
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
The file was modifiedllvm/test/CodeGen/SPARC/sret-secondary.ll
The file was modifiedllvm/test/CodeGen/ARM/ssat-lower.ll
The file was modifiedllvm/test/CodeGen/ARM/special-reg-acore.ll
The file was modifiedllvm/test/MC/X86/invalid-sleb.s
The file was modifiedllvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
The file was modifiedllvm/test/Transforms/BlockExtractor/invalid-line.ll
The file was modifiedllvm/test/CodeGen/ARM/named-reg-alloc.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout22.ll
The file was modifiedllvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll
The file was modifiedllvm/test/MachineVerifier/test_g_load.mir
The file was modifiedllvm/test/CodeGen/Mips/cpus-no-mips64.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
The file was modifiedllvm/test/MC/ELF/common-error3.s
The file was modifiedllvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
The file was modifiedllvm/test/CodeGen/RISCV/get-register-invalid.ll
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-03.ll
The file was modifiedllvm/test/CodeGen/Mips/cpus.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-args-fail2.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
The file was modifiedllvm/test/CodeGen/PowerPC/aix-byval-param.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-03.ll
The file was modifiedllvm/test/Object/coff-invalid.test
The file was modifiedllvm/test/MachineVerifier/test_g_sext_inreg.mir
The file was modifiedllvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
The file was modifiedllvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
The file was modifiedllvm/test/CodeGen/X86/segmented-stacks.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/verify-sop.mir
The file was modifiedllvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
The file was modifiedllvm/test/CodeGen/SystemZ/mnop-mcount-02.ll
The file was modifiedllvm/test/CodeGen/X86/macho-comdat.ll
The file was modifiedllvm/test/CodeGen/XCore/section-name.ll
The file was modifiedllvm/test/MachineVerifier/test_g_select.mir
The file was modifiedllvm/test/TableGen/HwModeSelect.td
The file was modifiedllvm/test/CodeGen/Mips/instverify/ins-size.mir
The file was modifiedllvm/docs/ProgrammersManual.rst
The file was modifiedllvm/test/Assembler/invalid-datalayout-alloca-addrspace.ll
The file was modifiedllvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
The file was modifiedclang/unittests/libclang/CrashTests/LibclangCrashTest.cpp
The file was modifiedllvm/test/Assembler/invalid-datalayout12.ll
The file was modifiedllvm/test/CodeGen/NVPTX/fsin-no-fast-math.ll
The file was modifiedllvm/test/MC/X86/encoder-fail.s
The file was modifiedllvm/test/CodeGen/X86/nonconst-static-iv.ll
The file was modifiedllvm/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s
The file was modifiedllvm/test/Assembler/invalid-datalayout7.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
The file was modifiedllvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout2.ll
The file was modifiedllvm/test/CodeGen/ARM/usat-lower.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout-program-addrspace.ll
The file was modifiedllvm/test/MachineVerifier/test_g_shuffle_vector.mir
The file was modifiedllvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
The file was modifiedclang-tools-extra/test/clang-tidy/infrastructure/empty-database.cpp
The file was modifiedllvm/test/CodeGen/Mips/micromips64-unsupported.ll
The file was modifiedllvm/test/CodeGen/NVPTX/libcall-instruction.ll
The file was modifiedllvm/test/CodeGen/X86/equiv_with_vardef.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-05.ll
The file was modifiedllvm/test/MachineVerifier/test_g_trunc.mir
The file was modifiedllvm/test/CodeGen/NVPTX/global-ctor.ll
The file was modifiedllvm/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s
The file was modifiedllvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll
The file was modifiedllvm/test/MachineVerifier/verifier-generic-extend-truncate.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout11.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout16.ll
The file was modifiedllvm/test/CodeGen/X86/cpus-no-x86_64.ll
The file was modifiedllvm/test/CodeGen/Mips/msa/3r-a.ll
The file was modifiedllvm/test/Object/wasm-invalid-file.yaml
The file was modifiedllvm/test/Assembler/invalid-datalayout14.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout3.ll
The file was modifiedllvm/test/MC/X86/AlignedBundling/bundle-lock-option-error.s
The file was modifiedllvm/test/CodeGen/AArch64/tiny_supported.ll
The file was modifiedllvm/test/MachineVerifier/test_g_jump_table.mir
The file was modifiedllvm/lib/Support/ErrorHandling.cpp
The file was modifiedllvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
The file was modifiedllvm/test/MachineVerifier/verify-regbankselected.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextm-size.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/ext-pos.mir
The file was modifiedllvm/test/CodeGen/Lanai/codemodel.ll
The file was modifiedllvm/test/MachineVerifier/test_g_addrspacecast.mir
The file was modifiedllvm/test/CodeGen/X86/coff-comdat2.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-nest-param.ll
The file was modifiedllvm/test/Transforms/FunctionImport/not-prevailing.ll
The file was modifiedllvm/test/MC/PowerPC/ppc64-localentry-error2.s
The file was modifiedllvm/test/MachineVerifier/test_g_ptr_add.mir
The file was modifiedllvm/test/CodeGen/ARM/usat-v4t.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dins-pos.mir
The file was modifiedllvm/test/CodeGen/ARM/ssat-upper.ll
The file was modifiedllvm/test/CodeGen/X86/AppendingLinkage.ll
The file was modifiedllvm/test/MachineVerifier/verify-selected.mir
The file was modifiedllvm/test/CodeGen/RISCV/interrupt-attr-invalid.ll
The file was modifiedllvm/test/MachineVerifier/test_g_dyn_stackalloc.mir
The file was modifiedllvm/test/CodeGen/X86/equiv_with_fndef.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll
The file was modifiedllvm/test/CodeGen/ARM/stc2.ll
The file was modifiedllvm/test/MachineVerifier/test_g_fcmp.mir
The file was modifiedllvm/test/tools/llvm-readobj/COFF/arm64-win-error2.s
The file was modifiedllvm/test/Object/elf-invalid-phdr.test
The file was modifiedllvm/test/Bitcode/invalid-functionptr-align.ll
The file was modifiedllvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
The file was modifiedllvm/test/MC/WebAssembly/blockaddress.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
The file was modifiedllvm/test/MachineVerifier/test_g_ptrtoint.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout20.ll
The file was modifiedllvm/test/CodeGen/ARM/named-reg-notareg.ll
The file was modifiedllvm/test/CodeGen/BPF/sdiv_error.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout8.ll
The file was modifiedllvm/test/CodeGen/X86/invalid-liveness.mir
The file was modifiedllvm/test/CodeGen/Mips/interrupt-attr-error.ll
The file was modifiedllvm/test/CodeGen/SystemZ/mverify-optypes.mir
The file was modifiedllvm/test/CodeGen/Mips/fpxx.ll
The file was modifiedllvm/test/MachineVerifier/live-ins-03.mir
The file was modifiedllvm/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s
The file was modifiedllvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsm-size.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout17.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-trampoline.ll
The file was modifiedllvm/test/CodeGen/SPARC/codemodel.ll
The file was modifiedllvm/test/CodeGen/ARM/codemodel.ll
The file was modifiedllvm/test/Transforms/InstCombine/limit-max-iterations.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/si-support.txt
The file was modifiedllvm/test/MachineVerifier/verify-regops.mir
The file was modifiedllvm/test/MachineVerifier/test_g_sextload.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout23.ll
The file was modifiedllvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir
The file was modifiedllvm/test/Assembler/invalid-datalayout24.ll
The file was modifiedllvm/test/CodeGen/X86/codemodel.ll
The file was modifiedllvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
The file was modifiedllvm/test/MachineVerifier/test_g_insert.mir
The file was modifiedllvm/test/CodeGen/BPF/xadd.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
The file was modifiedllvm/test/CodeGen/WebAssembly/offset-atomics.ll
The file was modifiedllvm/test/CodeGen/Mips/mips64r6/compatibility.ll
The file was modifiedllvm/test/MachineVerifier/verifier-generic-types-2.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/div_i128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
The file was modifiedllvm/test/MC/Mips/micromips64r6-unsupported.s
The file was modifiedllvm/test/CodeGen/Mips/instverify/dinsu-size.mir
The file was modifiedllvm/test/MC/ARM/Windows/invalid-relocation.s
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
The file was modifiedllvm/test/CodeGen/X86/clwb.ll
The file was modifiedllvm/test/MC/MachO/variable-errors.s
The file was modifiedllvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
The file was modifiedllvm/test/CodeGen/NVPTX/fcos-no-fast-math.ll
The file was modifiedllvm/test/MC/X86/check-end-of-data-region.s
The file was modifiedllvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
The file was modifiedllvm/test/Other/optimization-remarks-inline.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-01.ll
The file was modifiedllvm/test/MachineVerifier/verifier-phi-fail0.mir
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-06.ll
The file was modifiedllvm/test/MachineVerifier/test_copy.mir
The file was modifiedllvm/test/CodeGen/NVPTX/global-dtor.ll
The file was modifiedllvm/test/MachineVerifier/live-ins-01.mir
The file was modifiedllvm/test/CodeGen/SystemZ/vec-args-error-04.ll
The file was modifiedllvm/test/CodeGen/X86/coff-comdat3.ll
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-02.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout9.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
The file was modifiedllvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
The file was modifiedllvm/test/MachineVerifier/test_g_add.mir
The file was modifiedllvm/test/CodeGen/X86/label-redefinition.ll
The file was modifiedllvm/test/CodeGen/ARM/special-reg-mcore.ll
The file was modifiedllvm/test/CodeGen/RISCV/interrupt-attr-args-error.ll
The file was modifiedllvm/test/CodeGen/Mips/interrupt-attr-args-error.ll
The file was modifiedllvm/test/CodeGen/XCore/alignment.ll
The file was modifiedllvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-stackargs.ll
The file was modifiedllvm/test/CodeGen/X86/named-reg-alloc.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout18.ll
The file was modifiedllvm/test/Assembler/invalid-datalayout1.ll
The file was modifiedllvm/test/MC/X86/AlignedBundling/switch-section-locked-error.s
The file was modifiedllvm/test/MC/COFF/section-comdat-conflict2.s
The file was modifiedllvm/test/tools/llvm-lto2/X86/pipeline.ll
The file was modifiedllvm/test/CodeGen/Generic/llc-start-stop.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-neg-int-arith-imm-2.ll
The file was modifiedllvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll
The file was modifiedllvm/test/CodeGen/ARM/machine-verifier.mir
The file was modifiedllvm/test/MachineVerifier/test_g_build_vector.mir
The file was modifiedllvm/test/CodeGen/ARM/special-reg-v8m-main.ll
The file was modifiedllvm/test/CodeGen/RISCV/interrupt-attr-ret-error.ll
The file was addedllvm/test/Other/close-stderr.ll
The file was modifiedllvm/test/CodeGen/Mips/instverify/dextm-pos.mir
The file was modifiedllvm/test/CodeGen/SystemZ/mrecord-mcount-02.ll
The file was modifiedllvm/test/CodeGen/SystemZ/ghc-cc-07.ll
The file was modifiedllvm/test/CodeGen/NVPTX/alias.ll
Commit 77eb1b8f63c120f90ba529a5da2d392e165a4bc4 by arsenm2
llc: Don't overwrite frame-pointer attribute
Continue making command line flags with matching attribute behavior
consistent.
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/tail-call-no-save-fp-lr.ll
The file was modifiedllvm/test/CodeGen/ARM/disable-fp-elim.ll
The file was modifiedllvm/test/CodeGen/X86/fp-elim.ll
The file was modifiedllvm/include/llvm/CodeGen/CommandFlags.inc
The file was modifiedllvm/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll
The file was addedllvm/test/Other/opt-override-frame-pointer.ll
Commit cd9e5c32302cd3b34b796683eedb072c6a1cfdc1 by jingham
Fix the macos build after D71575.
size_t and uint64_t are spelled slightly differently on macOS, which was
causing the compiler to error out calling std::min - since the two types
have to be the same.
I fixed this by casting the uint64_t computation to a size_t.  That's
probably not the cleanest solution, but it gets us back to building.
The file was modifiedlldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
Commit bff9f84dc85b2b4ef0d5efe2691d3411d2abcb60 by craig.topper
[X86] Add 32-bit mode sse1 command line to scalar-int-to-fp.ll. NFC
The file was modifiedllvm/test/CodeGen/X86/scalar-int-to-fp.ll
Commit e4454479212b28532909e0a0782b0102e9bcd1c4 by craig.topper
[X86] When handling i64->f32 sint_to_fp on 32-bit targets only bitcast
to f64 if sse2 is enabled.
The code is trying to copy the i64 value to an xmm register to use a
64-bit store so that the 64-bit fild can benefit from store forwarding.
But this trick only works if f64 is going to be stored in an XMM
register. If we only have SSE1 then only float is in xmm register. So
this trick just causes 2 stores i32 stores, an f64 load into the x87, an
f64 from x87, and a 64-bit fild. So we end up with an extra stack
temporary and still didn't get store forwarding.
We might be able to use v2f32 here instead, but I didn't check. I just
wanted the code to make sense.
Found by inspection as I continue to stare too hard at our int_to_fp
conversions.
The file was modifiedllvm/test/CodeGen/X86/scalar-int-to-fp.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 154cd6de513e1e9ce794ba2d1eae1647c873f812 by wmi
[SampleFDO] Fix invalid branch profile generated by indirect call
promotion.
Suppose an inline instance has hot total sample count but 0 entry count,
and it is an indirect call target. If the indirect call has no other
call target and inline instance associated with it and it is promoted,
currently the conditional branch generated by indirect call promotion
will have invalid branch profile which is !{!"branch_weights", i32 0,
i32 0} -- because the entry count of the promoted target is 0 and the
total entry count of all targets is also 0. This caused a SEGV in
Control Height Reduction and may cause problem in other passes.
Function entry count of an inline instance is computed by a heuristic --
using either the sample of the starting line or starting inner inline
instance. The patch changes the heuristic a little bit so that when
total sample count is larger than 0, the computed entry count will be at
least 1. Then the new branch profile will be !{!"branch_weights", i32 1,
i32 0}.
Differential Revision: https://reviews.llvm.org/D72790
The file was modifiedllvm/test/Transforms/SampleProfile/inline-callee-update.ll
The file was modifiedllvm/test/Transforms/SampleProfile/indirect-call.ll
The file was modifiedllvm/include/llvm/ProfileData/SampleProf.h
The file was modifiedllvm/test/Transforms/SampleProfile/Inputs/indirect-call.prof
The file was modifiedllvm/test/Transforms/SampleProfile/Inputs/indirect-call.compact.afdo
Commit 45d70806f4386adfb62b0d75949a8aad58e0576f by richard
PR42694 Support explicit(bool) in older language modes as an extension.
This needs somewhat careful disambiguation, as C++2a explicit(bool) is a
breaking change. We only enable it in cases where the source construct
could not possibly be anything else.
The file was modifiedclang/lib/Parse/ParseTentative.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td
The file was modifiedclang/lib/Parse/ParseDecl.cpp
The file was modifiedclang/lib/Parse/Parser.cpp
The file was modifiedclang/test/SemaCXX/cxx2a-explicit-bool.cpp
The file was modifiedclang/include/clang/Parse/Parser.h
Commit b54a50f52e9427f250c192a8618b881732e5d7a4 by Jonas Devlieghere
[lldb/Reproducers] Extract function for reading environment override
(NFC)
Create a helper function for reading reproducer overrides from
environment variables.
The file was modifiedlldb/source/Utility/Reproducer.cpp
Commit c378e52cb9d1197bd828008ffdeaf3cebdca1506 by arsenm2
Set some fast math attributes in setFunctionAttributes
This will provide a more consistent view to codegen for these
attributes. The current system is somewhat awkward, and the fields in
TargetOptions are reset based on the command line flag if the attribute
isn't set. By forcing these attributes with the flag, there can never be
an inconsistency in the behavior if code directly inspects the attribute
on the function without considering the command line flags.
The file was modifiedllvm/include/llvm/CodeGen/CommandFlags.inc
The file was modifiedllvm/lib/Target/TargetMachine.cpp
Commit 066e817b421e8502a72735988e14713940517aaa by Jonas Devlieghere
[lldb/Reproducers] Add a flag to always generating a reproducer
Add a flag which always generates a reproducer when normally it would be
discarded. This is meant for testing purposes to capture a debugger
session without modification the session itself.
The file was modifiedlldb/test/Shell/Reproducer/TestDriverOptions.test
The file was modifiedlldb/tools/driver/Options.td
The file was modifiedlldb/source/API/SBReproducer.cpp
The file was modifiedlldb/tools/driver/Driver.cpp
The file was modifiedlldb/include/lldb/Utility/Reproducer.h
The file was modifiedlldb/source/Utility/Reproducer.cpp
The file was modifiedlldb/include/lldb/API/SBReproducer.h
Commit 8fdafb7dced812b2dc0af77f9668bfe23b4ffb0b by chen3.liu
Insert wait instruction after X87 instructions which could raise
float-point exception.
This patch also modify some mayRaiseFPException flag which set in
D68854.
Differential Revision: https://reviews.llvm.org/D72750
The file was modifiedllvm/lib/Target/X86/X86InstrFPStack.td
The file was modifiedllvm/test/CodeGen/X86/vec-strict-128.ll
The file was modifiedllvm/test/CodeGen/X86/fp-strict-scalar.ll
The file was modifiedllvm/test/CodeGen/X86/fp80-strict-scalar.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
The file was modifiedllvm/lib/Target/X86/X86.h
The file was addedllvm/lib/Target/X86/X86InsertWait.cpp
The file was modifiedllvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
The file was modifiedllvm/lib/Target/X86/CMakeLists.txt
The file was modifiedllvm/test/CodeGen/X86/fp-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
The file was modifiedllvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll
The file was modifiedllvm/test/CodeGen/X86/fp-strict-scalar-round.ll
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
The file was modifiedllvm/test/CodeGen/X86/vec-strict-fptoint-512.ll
The file was modifiedllvm/test/CodeGen/X86/fp-strict-scalar-fptoint.ll
The file was modifiedllvm/test/CodeGen/X86/fp-strict-libcalls-msvc32.ll
The file was modifiedllvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-512.ll
The file was modifiedllvm/lib/Target/X86/X86FloatingPoint.cpp
The file was modifiedllvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll
The file was modifiedllvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/fp128-cast-strict.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-fptoint-128.ll
Commit cc5efa213d98f614989edd121f2a966fb53a7f54 by llvmgnsyncbot
[gn build] Port 8fdafb7dced
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Commit 982a77b69408d6d54526b331046b4508a68ef459 by Jonas Devlieghere
[lldb/Reproducers] Print more info for reproducer status
Reproducer status now prints the capture/replay path. It will also print
the status of auto generation when enabled.
The file was modifiedlldb/include/lldb/Utility/Reproducer.h
The file was modifiedlldb/test/Shell/Reproducer/TestDriverOptions.test
The file was modifiedlldb/source/Commands/CommandObjectReproducer.cpp
The file was modifiedlldb/source/Utility/Reproducer.cpp
Commit 58265ad42a90ae8905be6a447cb42e53529a54a0 by inouehrs
[mlir] fix broken links to Glossary
Differential Revision: https://reviews.llvm.org/D72697
The file was modifiedmlir/docs/Tutorials/Toy/Ch-5.md
The file was modifiedmlir/docs/Tutorials/Toy/Ch-2.md
The file was modifiedmlir/docs/Tutorials/Toy/Ch-6.md
The file was modifiedmlir/docs/LangRef.md
Commit 5cf1b01a01179e3ede446ae6064c6f3bece46987 by craig.topper
[LegalizeDAG][TargetLowering] Move vXi64/i64->vXf32/f32 uint_to_fp
legalizing code from TargetLowering::expandUINT_TO_FP back to
LegalizeDAG.
This was moved in October 2018, but we don't appear to be using this for
vectors on any in tree target.
Moving it back simplifies D72794 so we can share the code for i32->f32.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Commit afb22d7c33a246967d5f21d5ab3c83c148178564 by ikudrin
[DebugInfo] Simplify the constructor of DWARFDebugAranges::Range. NFC.
This removes the default values of the arguments. The only caller,
DWARFDebugAranges::construct(), provides all three parameters.
Differential Revision: https://reviews.llvm.org/D72757
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugAranges.h