Changes

Summary

  1. [PowerPC] Implement a TestSuiteBuilder (details)
Commit 9d4301d25f098f5efcf2a56c9c5d16645e3957d5 by albionapc
[PowerPC] Implement a TestSuiteBuilder

This patch implements TestSuiteBuilder, which utilises
UnifiedTreeBuilder to build with ninja, and then checks
out llvm-test-suite, builds it and runs it.

The patch also changes the PPC RHEL bot to this new builder.

Differential revision: https://reviews.llvm.org/D109628
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)
The file was addedzorg/buildbot/builders/TestSuiteBuilder.py

Summary

  1. [MLIR] NFC. gpu.launch op argument const folder cleanup (details)
  2. [OpenCL] Test case for C++ for OpenCL 2021 in OpenCL C header test (details)
  3. [LowerConstantIntrinsics] Fix heap-use-after-free bug in worklist (details)
  4. [SCEV] Add some asserts on availability of arguments of isLoopEntryGuardedByCond (details)
  5. GlobalISel/Utils: Refactor constant splat match functions (details)
  6. [SCEV] Use isAvailableAtLoopEntry in the asserts (details)
  7. [AArch64] Regenerate test lines in sve-implicit-zero-filling.ll (details)
  8. [AMDGPU] Prefer v_fmac over v_fma only when no source modifiers are used (details)
  9. [AMDGPU] Prefer fmac over fma when selecting FMA_W_CHAIN (details)
  10. tsan: fix debug format strings (details)
  11. tsan: rearrange thread state callbacks (NFC) (details)
  12. tsan: simplify thread context setting (details)
  13. [CodeGen] SDDbgValue::getSDNodes() - use const-ref to avoid unnecessary copies. NFCI. (details)
  14. RewriteStatepointsForGC - Use const-ref iterator in for-range loops. NFCI. (details)
  15. [CodeGen] SelectionDAGBuilder - Use const-ref iterator in for-range loops. NFCI. (details)
  16. [InstCombine] foldConstantInsEltIntoShuffle - bail if we fail to find constant element (PR51824) (details)
  17. [AArch64] Improve schedule modelling on the Cortex-A55 (details)
  18. [VectorCombine] Add tests which require DT to use info from assumes. (details)
  19. [SystemZ]  Emit EXRL target instructions before text section is ended. (details)
  20. [llvm] Pass LLVM_CHECK_ENABLED_PROJECTS through in cross builds (details)
  21. [IR] Add the constructor of ShuffleVector for one-input-vector. (details)
  22. [AMDGPU][MC][GFX10] Enabled dlc for FLAT and GLOBAL atomics (details)
  23. [InstCombine] add tests for mask-shift with trunc; NFC (details)
  24. [NFC] Update the list of subprojects in docs. (details)
  25. [clang-offload-bundler][docs][NFC] Add archive unbundling documentation (details)
  26. [InstCombine] Improve TryToSinkInstruction with multiple uses (details)
  27. [OpenCL] Defines helper function for OpenCL default address space (details)
  28. [RISCV] Optimize (add (mul x, c0), c1) (details)
  29. [NFC] `goto fail` has failed us in the past... (details)
  30. [mlir][linalg] Assert tile loop nest invariants in fusion. (details)
  31. [mlir][Linalg] Revisit RAW dependence interference in comprehensive bufferize. (details)
  32. [mlir][Linalg] Revisit heuristic ordering of tensor.insert_slice in comprehensive bufferize. (details)
  33. [AArch64] Regenerate test lines in and-mask-removal.ll (details)
  34. [clang][NFC] Fix needless double-parenthisation (details)
  35. AMDGPU/GlobalISel: Restore run line erased in D109154 by mistake (details)
  36. [AMDGPU][MC][GFX7][GFX10] Corrected image_atomic_fcmpswap (details)
  37. [mlir][linalg] Add isPermutation helper (NFC). (details)
  38. [mlir][linalg] Simplify slice dim computation for fusion on tensors (NFC). (details)
  39. [GlobalISel] Support ConstantAsMetadata in IRTranslator (details)
  40. [SelectionDAG] Re-calculate scoped AA metadata when merging stores. (details)
  41. [ValueTracking,VectorCombine] Allow passing DT to computeConstantRange. (details)
  42. [sanitizer coverage] write the pc-table at the process exit (details)
  43. [InstCombine] move/add tests for trunc-of-lshr; NFC (details)
  44. [CodeGen] Remove redundant declaration getFileType (NFC) (details)
  45. [PowerPC] Fix signature of lxvp and stxvp builtins (details)
  46. [InstCombine] powi(x, y) * powi(x, z) -> powi(x, y + z) (details)
  47. Revert "Diagnose -Wunused-value based on CFG reachability" (details)
  48. [OpenMP][NFC] Add declare variant and metadirective to support page (details)
  49. [libc++][format] Adds parser std-format-spec. (details)
  50. [gn build] Port a04a6ce7726b (details)
Commit 5c77ed0330c47ad8fa4b229bceb6c33c76536961 by uday
[MLIR] NFC. gpu.launch op argument const folder cleanup

NFC updates to gpu.launch op argument const folder.

Differential Revision: https://reviews.llvm.org/D110136
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
Commit 57b8b5c114b6e595f8d9118807d741ef30518777 by Justas.Janickas
[OpenCL] Test case for C++ for OpenCL 2021 in OpenCL C header test

RUN line representing C++ for OpenCL 2021 added to the test. This
should have been done as part of earlier commit fb321c2ea274 but
was missed during rebasing.

Differential Revision: https://reviews.llvm.org/D109492
The file was modifiedclang/test/Headers/opencl-c-header.cl
Commit 7b4cc09b1424c7f53051f971347c00d5f27fbb4e by david.stenberg
[LowerConstantIntrinsics] Fix heap-use-after-free bug in worklist

This fixes PR51730, a heap-use-after-free bug in
replaceConditionalBranchesOnConstant().

With the attached reproducer we were left with a function looking
something like this after replaceAndRecursivelySimplify():

  [...]

  cont2.i:
    br i1 %.not1.i, label %handler.type_mismatch3.i, label %cont4.i

  handler.type_mismatch3.i:
    %3 = phi i1 [ %2, %cont2.thread.i ], [ false, %cont2.i ]
    unreachable

  cont4.i:
    unreachable

  [...]

with both the branch instruction and PHI node being in the worklist. As
a result of replacing the branch instruction with an unconditional
branch, the PHI node in %handler.type_mismatch3.i would be removed. This
then resulted in a heap-use-after-free bug due to accessing that removed
PHI node in the next worklist iteration.

This is solved by using a value handle worklist. I am a unsure if this
is the most idiomatic solution. Another solution could have been to
produce a worklist just containing the interesting branch instructions,
but I thought that it perhaps was a bit cleaner to keep all worklist
filtering in the loop that does the rewrites.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D109221
The file was addedllvm/test/Transforms/LowerConstantIntrinsics/stale-worklist-phi.ll
The file was modifiedllvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
Commit 4d5d72542839b11455a0c261b66a0426c1530d52 by mkazantsev
[SCEV] Add some asserts on availability of arguments of isLoopEntryGuardedByCond

The logic in howManyLessThans is fishy. It first checks invariance of
RHS, and then uses OrigRHS as argument for isLoopEntryGuardedByCond, which
is, strictly saying, a different thing. We are seeing a very rare intermittent
failure of availability checks, and it looks like this precondition is
sometimes broken. Before we can figure out what's going on, adding asserts
that all involved values that may possibly to to isLoopEntryGuardedByCond
are available at loop entry.

If either of these asserts fails (OrigRHS is the most likely suspect), it
means that the logic here is flawed.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 8bc71856681c235a3192813947308a19577c9236 by petar.avramovic
GlobalISel/Utils: Refactor constant splat match functions

Add generic helper function that matches constant splat. It has option to
match constant splat with undef (some elements can be undef but not all).
Add util function and matcher for G_FCONSTANT splat.

Differential Revision: https://reviews.llvm.org/D104410
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
The file was modifiedllvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
Commit cd166fb2ef9c8fde374cb5de9c57802536d9b79e by mkazantsev
[SCEV] Use isAvailableAtLoopEntry in the asserts

This is what is supposed to be there.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit e83629280f32102cd93a216490188922843af06c by david.green
[AArch64] Regenerate test lines in sve-implicit-zero-filling.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-implicit-zero-filling.ll
Commit 86dcb592069f2d18a183fa1daa611029ae80ef4c by jay.foad
[AMDGPU] Prefer v_fmac over v_fma only when no source modifiers are used

v_fmac with source modifiers forces VOP3 encoding, but it is strictly
better to use the VOP3-only v_fma instead, because $dst and $src2 are
not tied so it gives the register allocator more freedom and avoids a
copy in some cases.

This is the same strategy we already use for v_mad vs v_mac and
v_fma_legacy vs v_fmac_legacy.

Differential Revision: https://reviews.llvm.org/D110070
The file was modifiedllvm/test/CodeGen/AMDGPU/frem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mad-mix.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/fdiv.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/strict_fma.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/udiv.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fma.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
Commit 598bebeaa645049d13f1d3d1c8b8b821bb97283f by jay.foad
[AMDGPU] Prefer fmac over fma when selecting FMA_W_CHAIN

FMA_W_CHAIN is used when lowering fdiv f32. Prefer to select it to fmac
if there are no source modifiers, just like we do for other mad/mac and
fma/fmac cases.

Differential Revision: https://reviews.llvm.org/D110074
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/fdiv.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/frem.ll
Commit 6fe35ef419391215e21e51b859f74e6b7b8819d4 by dvyukov
tsan: fix debug format strings

Some of the DPrintf's currently produce -Wformat warnings if enabled.
Fix these format strings.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110131
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_java.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
Commit 908256b0ea3e3ba3b80dbe9c81fc68a1ee35ac33 by dvyukov
tsan: rearrange thread state callbacks (NFC)

Thread state functions are split into 2 parts:
tsan entry function (e.g. ThreadStart) and thread registry
state change callback (e.g. OnStart). Currently these
pairs of functions are located far from each other and
in reverse order. This makes it hard to read and follow the logic.
Reorder the code so that OnFoo directly follows ThreadFoo.
No other code changes.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110132
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
Commit 9d7b7350c9e00e2a43585328e875bec11c8c8c17 by dvyukov
tsan: simplify thread context setting

Currently we set thr->tctx after OnStarted callback
taking thread registry mutex again and searching for the context.
But OnStarted already runs under the thread registry mutex
and has access to the context, so set it in the OnStarted.
This makes code simpler and faster.

Depends on D110132.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D110133
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
Commit 0f83456cf5bfaa731f9d5aa2500a5f10dd9de1b7 by llvm-dev
[CodeGen] SDDbgValue::getSDNodes() - use const-ref to avoid unnecessary copies. NFCI.

Reported by MSVC static analyzer.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
Commit f5d23d36de87f0cef3117df657d4f1d9133749c0 by llvm-dev
RewriteStatepointsForGC - Use const-ref iterator in for-range loops. NFCI.

Avoid unnecessary copies, reported by MSVC static analyzer.
The file was modifiedllvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
Commit 20b58855e0cfc263d609e8bb59e692024ecb42aa by llvm-dev
[CodeGen] SelectionDAGBuilder - Use const-ref iterator in for-range loops. NFCI.

Avoid unnecessary copies, reported by MSVC static analyzer.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit fc8f1e4419d338a347bade7cfc76f73052f00739 by llvm-dev
[InstCombine] foldConstantInsEltIntoShuffle - bail if we fail to find constant element (PR51824)

If getAggregateElement() returns null for any element, early out as otherwise we will assert when creating a new constant vector

Fixes PR51824 + ; OSS-Fuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=38057
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
The file was addedllvm/test/Transforms/InstCombine/pr51824.ll
Commit 9e4d72675f476386cf6555cd5a1014cdd8d9facb by nicholas.guy
[AArch64] Improve schedule modelling on the Cortex-A55

Enables the FuseAddress feature in the Cortex-A55 scheduling model

Differential Revision: https://reviews.llvm.org/D109323
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was addedllvm/test/CodeGen/AArch64/a55-fuse-address.mir
Commit ea27dd74972e95e513fefcf96067522364f4e3d7 by flo
[VectorCombine] Add tests which require DT to use info from assumes.
The file was modifiedllvm/test/Transforms/VectorCombine/AArch64/load-extract-insert-store-scalarization.ll
The file was modifiedllvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll
Commit a48b43f9816aa3a3ccc9ca13e7767ccf70756729 by paulsson
[SystemZ]  Emit EXRL target instructions before text section is ended.

SystemZ adds the EXRL target instructions in the end of each file. This must
be done before debug info emission since that may end the text section, and
therefore this is now done in emitConstantPools() (instead of in
emitEndOfAsmFile).

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D109513
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetStreamer.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZAsmPrinter.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
The file was addedllvm/test/CodeGen/SystemZ/memset-06.ll
Commit e9ea03c62ccc1ed4e3ed4f20e37640cfdd76cbcf by thakis
[llvm] Pass LLVM_CHECK_ENABLED_PROJECTS through in cross builds
The file was modifiedllvm/cmake/modules/CrossCompile.cmake
Commit 043733d677310d6b0ac465b938e82733a9f4cfce by gusrb406
[IR] Add the constructor of ShuffleVector for one-input-vector.

One of the two inputs of the Shufflevector is often a placeholder.
Previously, there were cases where the placeholder was undef, and there were cases where it was poison.
I added these constructors to create a placeholder consistently.

Changing to use the newly added constructor will be written in a separate patch.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D110146
The file was modifiedllvm/lib/IR/Instructions.cpp
The file was modifiedllvm/include/llvm/IR/Instructions.h
Commit b8e7f5320825812fc4b597ee5df3dccc53fe78bb by dmitry.preobrazhensky
[AMDGPU][MC][GFX10] Enabled dlc for FLAT and GLOBAL atomics

Differential Revision: https://reviews.llvm.org/D109614
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_flat.s
The file was modifiedllvm/lib/Target/AMDGPU/FLATInstructions.td
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/flat_gfx10.txt
Commit af1c5312d76000bf134d8b81cdb7343607c6ee64 by spatel
[InstCombine] add tests for mask-shift with trunc; NFC
The file was modifiedllvm/test/Transforms/InstCombine/and-narrow.ll
Commit 17a26f585127fde64fdf1b2393e90454e81f143c by diana.picus
[NFC] Update the list of subprojects in docs.

The updated list is based on the output of
cmake -G Ninja -S llvm -B build -DLLVM_ENABLE_PROJECTS='foo'.

Differential Revision: https://reviews.llvm.org/D110124
The file was modifiedREADME.md
The file was modifiedllvm/docs/GettingStarted.rst
Commit ee31ad0ab5f7d443b0bd582582a3524dcf7f13f0 by Saiyedul.Islam
[clang-offload-bundler][docs][NFC] Add archive unbundling documentation

Add documentation of unbundling of heterogeneous device archives to
create device specific archives, as introduced by D93525. Also, add
documentation for supported text file formats.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D110083
The file was modifiedclang/docs/ClangOffloadBundler.rst
Commit 69921f6f4558a2c5c8e48c5b12d83a65127bfecc by anna
[InstCombine] Improve TryToSinkInstruction with multiple uses

This patch allows sinking an instruction which can have multiple uses in a
single user. We were previously over-restrictive by looking for exactly one use,
rather than one user.

Also added an API for retrieving a unique undroppable user.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D109700
The file was modifiedllvm/test/Transforms/InstCombine/sink_instruction.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/lib/IR/Value.cpp
The file was modifiedllvm/test/Transforms/InstCombine/icmp-mul-zext.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll
The file was modifiedllvm/include/llvm/IR/Value.h
Commit 32b994bca66641cdac8586f25315daf349921ebc by Justas.Janickas
[OpenCL] Defines helper function for OpenCL default address space

Helper function `getDefaultOpenCLPointeeAddrSpace()` introduced to
`ASTContext` class. It returns default OpenCL address space
depending on language version and enabled features. If generic
address space is supported, the helper function returns value
`LangAS::opencl_generic`. Otherwise, value `LangAS::opencl_private`
is returned. Code refactoring changes performed in several suitable
places.

Differential Revision: https://reviews.llvm.org/D109874
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was modifiedclang/lib/Sema/Sema.cpp
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
The file was modifiedclang/lib/AST/Expr.cpp
Commit b3052013b43617defd777b1f3b4339540c4c07df by powerman1st
[RISCV] Optimize (add (mul x, c0), c1)

Optimize (add (mul x, c0), c1) -> (ADDI (MUL (ADDI, c1/c0), c0), c1%c0),
if c1/c0 and c1%c0 are simm12, while c1 is not.

Optimize (add (mul x, c0), c1) -> (MUL (ADDI, c1/c0), c0),
if c1%c0 is zero, and c1/c0 is simm12 while c1 is not.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D108607
The file was modifiedllvm/test/CodeGen/RISCV/addimm-mulimm.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 744ec74b305a5039dc74e2d043e1c136e06beac1 by chris.bieneman
[NFC] `goto fail` has failed us in the past...

This patch replaces reliance on `goto failure` pattern with
`llvm::scope_exit`.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D109865
The file was modifiedclang/lib/Frontend/FrontendAction.cpp
Commit c8eed8f9a7e019382ab236c90ac1ee0f5d81c54f by gysit
[mlir][linalg] Assert tile loop nest invariants in fusion.

Assert the tile loop nest invariants are satisfied instead of failing silently.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D110137
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
Commit 0d2c54e851f12594b38f45e76ced03e3f5cc5443 by nicolas.vasilache
[mlir][Linalg] Revisit RAW dependence interference in comprehensive bufferize.

Previously, comprehensive bufferize would consider all aliasing reads and writes to
the result buffer and matching operand. This resulted in spurious dependences
being considered and resulted in too many unnecessary copies.

Instead, this revision revisits the gathering of read and write alias sets.
This results in fewer alloc and copies.
An exhaustive test cases is added that considers all possible permutations of
`matmul(extract_slice(fill), extract_slice(fill), ...)`.
The file was addedmlir/test/Dialect/Linalg/comprehensive-bufferize-analysis-2fill-extract-matmul-all-perms.mlir
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize-analysis.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
Commit 101d017a643845b537687467e3f7c2a5d963df6e by nicolas.vasilache
[mlir][Linalg] Revisit heuristic ordering of tensor.insert_slice in comprehensive bufferize.

It was previously assumed that tensor.insert_slice should be bufferized first in a greedy fashion to avoid out-of-place bufferization of the large tensor. This heuristic does not hold upon further inspection.

This CL removes the special handling of such ops and adds a test that exhibits better behavior and appears in real use cases.

The only test adversely affected is an artificial test which results in a returned memref: this pattern is not allowed by comprehensive bufferization in real scenarios anyway and the offending test is deleted.

Differential Revision: https://reviews.llvm.org/D110072
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize.mlir
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize-analysis.mlir
Commit a502294b2d9594e06be01fab344e937ddae22cd1 by david.green
[AArch64] Regenerate test lines in and-mask-removal.ll
The file was modifiedllvm/test/CodeGen/AArch64/and-mask-removal.ll
Commit 9ae4275557ca10f79af91ca99a2aa79d5dfd7ed3 by wingo
[clang][NFC] Fix needless double-parenthisation

Strip a layer of parentheses in TreeTransform::RebuildQualifiedType.

Differential Revision: https://reviews.llvm.org/D108359
The file was modifiedclang/lib/Sema/TreeTransform.h
Commit f3366983f0aa81f5fc5361392a6fcec05157b851 by petar.avramovic
AMDGPU/GlobalISel: Restore run line erased in D109154 by mistake
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
Commit 3500e7d2b0f1c3f508f384ba9223e879c103b0ab by dmitry.preobrazhensky
[AMDGPU][MC][GFX7][GFX10] Corrected image_atomic_fcmpswap

Differential Revision: https://reviews.llvm.org/D109616
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
The file was modifiedllvm/test/MC/AMDGPU/gfx7_asm_mimg.s
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_mimg.s
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
Commit 9072f1b5f81347b36f0668e8cc10802fedbc6cfd by gysit
[mlir][linalg] Add isPermutation helper (NFC).

Add a helper method to check if an index vector contains a permutation of its indices. Additionally, refactor applyPermutationToVector to take int64_t.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D110135
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Interchange.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
Commit 8b5236def5a1adc55f649f125d2582254b80f699 by gysit
[mlir][linalg] Simplify slice dim computation for fusion on tensors (NFC).

Compute the tiled producer slice dimensions directly starting from the consumer not using the producer at all.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D110147
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir
Commit 624e4d087efdb2f26a9a618dd0e2da99782e6308 by Matthew.Arsenault
[GlobalISel] Support ConstantAsMetadata in IRTranslator

When using instructions which have a MetadataAsValue argument
(e.g. some target-specific intrinsics) MD canonicalization strips
internal MDNodes with a single ConstantAsMetadata child. That
prevented IRTranslator from the proper translation of such a calls.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Commit 5fb3ae525ffa7fc9e09e0c10de02ecc003c3adae by michael.hliao
[SelectionDAG] Re-calculate scoped AA metadata when merging stores.

Reviewed By: jeroen.dobbelaere

Differential Revision: https://reviews.llvm.org/D102821
The file was modifiedllvm/include/llvm/IR/Metadata.h
The file was modifiedllvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was addedllvm/test/CodeGen/AArch64/merge-scoped-aa-store.ll
Commit 5131037ea96f9e2bc863557ba6d6dc63f46a94ab by flo
[ValueTracking,VectorCombine] Allow passing DT to computeConstantRange.

isValidAssumeForContext can provide better results with access to the
dominator tree in some cases. This patch adjusts computeConstantRange to
allow passing through a dominator tree.

The use VectorCombine is updated to pass through the DT to enable
additional scalarization.

Note that similar APIs like computeKnownBits already accept optional dominator
tree arguments.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D110175
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
The file was modifiedllvm/include/llvm/Analysis/ValueTracking.h
The file was modifiedllvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
The file was modifiedllvm/test/Transforms/VectorCombine/AArch64/load-extract-insert-store-scalarization.ll
Commit 11c533e1ea38381726ed04ab65937a03fbfb3e19 by kcc
[sanitizer coverage] write the pc-table at the process exit

The current code writes the pc-table at the process startup,
which may happen before the common_flags() are initialized.
Move writing to the process end.
This is consistent with how we write the counters and avoids the problem with the uninitalized flags.
Add prints if verbosity>=1.

Reviewed By: kostik

Differential Revision: https://reviews.llvm.org/D110119
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_coverage_libcdep_new.cpp
The file was modifiedcompiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
Commit 08ef71ca92d9bd474ac4bbb5109e9ced19c77f0e by spatel
[InstCombine] move/add tests for trunc-of-lshr; NFC

Planning to reframe a proposed transform in terms of
demanded bits as suggested in D110170.
The new tests end with an 'or'.
The file was modifiedllvm/test/Transforms/InstCombine/and-narrow.ll
The file was addedllvm/test/Transforms/InstCombine/trunc-demand.ll
Commit 54229cd9e44f70de09ffa0c55ad35317c521adc0 by kazu
[CodeGen] Remove redundant declaration getFileType (NFC)
The file was modifiedllvm/include/llvm/CodeGen/CommandFlags.h
Commit 57939309501c33b264b777e04186c7747ebc3de1 by quinn.pham
[PowerPC] Fix signature of lxvp and stxvp builtins

This patch changes the signature of the load and store vector pair
builtins to match their documentation. The type of the `signed long long`
argument is changed to `signed long`. This patch also changes existing testcases
to match the signature change.

Reviewed By: lei, Conanap

Differential Revision: https://reviews.llvm.org/D109996
The file was modifiedclang/test/Sema/ppc-pair-mma-types.c
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedclang/test/CodeGen/builtins-ppc-pair-mma.c
Commit c0fdfc9af2338fa84f1b65dda8f1649c0ec1ebf1 by Dávid Bolvanský
[InstCombine] powi(x, y) * powi(x, z) -> powi(x, y + z)

We already have pow(x, y) * pow(x, z) -> pow(x, y + z) transformation, but we are missing same transformation for powi (power is integer).

Requires reassoc.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D109954
The file was modifiedllvm/test/Transforms/InstCombine/powi.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
Commit 73a8bcd78921d38130fc42c90fd75d47b05b063d by aaron
Revert "Diagnose -Wunused-value based on CFG reachability"

This reverts commit 63e0d038fc20c894a3d541effa1bc2b1fdea37b9.

It causes test failures:

http://lab.llvm.org:8011/#/builders/119/builds/5612
https://logs.chromium.org/logs/fuchsia/buildbucket/cr-buildbucket/8835548361443044001/+/u/clang/test/stdout
The file was modifiedclang/test/Sema/warn-type-safety.c
The file was modifiedclang/test/CXX/drs/dr20xx.cpp
The file was modifiedclang/test/SemaCXX/attr-annotate.cpp
The file was modifiedclang/test/Parser/cxx-ambig-decl-expr.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/Parser/objc-try-catch-1.m
The file was modifiedclang/test/Frontend/fixed_point_crash.c
The file was modifiedclang/test/Sema/const-eval.c
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/SemaCXX/sizeless-1.cpp
The file was modifiedclang/test/SemaTemplate/lambda-capture-pack.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/PCH/cxx-explicit-specifier.cpp
The file was modifiedclang/test/CXX/basic/basic.link/p8.cpp
The file was modifiedclang/test/CXX/drs/dr7xx.cpp
The file was modifiedclang/test/CodeCompletion/pragma-macro-token-caching.c
The file was modifiedclang/test/Parser/cxx1z-init-statement.cpp
The file was modifiedclang/test/SemaCXX/expression-traits.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/SemaCXX/matrix-type-operators.cpp
The file was modifiedclang/test/SemaCXX/constant-expression.cpp
The file was modifiedclang/test/SemaCXX/builtin-constant-p.cpp
The file was modifiedclang/test/CXX/drs/dr14xx.cpp
The file was modifiedclang/test/Sema/warn-unused-value.c
The file was modifiedclang/test/SemaCXX/warn-unused-value.cpp
The file was modifiedclang/test/Sema/switch-1.c
The file was modifiedclang/test/Sema/vla-2.c
The file was modifiedclang/test/Parser/objc-messaging-1.m
The file was modifiedclang/test/Sema/i-c-e.c
The file was modifiedclang/test/Parser/objcxx11-attributes.mm
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.constr/partial-specializations.cpp
The file was modifiedclang/test/Parser/cxx0x-ambig.cpp
The file was modifiedclang/test/SemaCXX/vector.cpp
The file was modifiedclang/test/Sema/exprs.c
The file was modifiedclang/test/SemaTemplate/derived.cpp
The file was modifiedclang/test/Analysis/dead-stores.c
The file was modifiedclang/test/SemaCXX/overloaded-operator.cpp
The file was modifiedclang/test/Sema/sizeless-1.c
The file was modifiedclang/test/SemaCXX/constant-expression-cxx2a.cpp
The file was modifiedclang/test/SemaCXX/warn-comma-operator.cpp
Commit 8c68bd480f3d8a5bf6087f47837d320f9d6dba2d by cchen
[OpenMP][NFC] Add declare variant and metadirective to support page
The file was modifiedclang/docs/OpenMPSupport.rst
Commit a04a6ce7726b51c4f503c8de899362bee40d4e04 by koraq
[libc++][format] Adds parser std-format-spec.

This implements the generic std.format.spec framework for all types.

The Unicode support will be added in a separate patch.

Implements parts of:
- P0645 Text Formatting

Completes:
- LWG-3242 std::format: missing rules for arg-id in width and precision
- P1892 Extended locale-specific presentation specifiers for std::format

Reviewed By: #libc, ldionne, vitaut

Differential Revision: https://reviews.llvm.org/D103368
The file was modifiedlibcxx/docs/Status/Cxx20Issues.csv
The file was modifiedlibcxx/docs/Status/Cxx20Papers.csv
The file was modifiedlibcxx/include/module.modulemap
The file was modifiedlibcxx/include/CMakeLists.txt
The file was addedlibcxx/test/libcxx/utilities/format/format.string/format.string.std/std_format_spec_integral.pass.cpp
The file was modifiedlibcxx/include/format
The file was addedlibcxx/test/libcxx/utilities/format/format.string/format.string.std/concepts_precision.h
The file was modifiedlibcxx/include/__format/formatter.h
The file was addedlibcxx/include/__format/parser_std_format_spec.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/format/parser_std_format_spec.module.verify.cpp
The file was addedlibcxx/test/libcxx/utilities/format/format.string/format.string.std/test_exception.h
The file was addedlibcxx/test/libcxx/utilities/format/format.string/format.string.std/std_format_spec_string.pass.cpp
Commit a3bb4f145599c7c4147fd60ea15cb09cd68e50d9 by llvmgnsyncbot
[gn build] Port a04a6ce7726b
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn

Summary

  1. [PowerPC] Implement a TestSuiteBuilder (details)
Commit 9d4301d25f098f5efcf2a56c9c5d16645e3957d5 by albionapc
[PowerPC] Implement a TestSuiteBuilder

This patch implements TestSuiteBuilder, which utilises
UnifiedTreeBuilder to build with ninja, and then checks
out llvm-test-suite, builds it and runs it.

The patch also changes the PPC RHEL bot to this new builder.

Differential revision: https://reviews.llvm.org/D109628
The file was modifiedbuildbot/osuosl/master/config/builders.py
The file was addedzorg/buildbot/builders/TestSuiteBuilder.py