Started 2 mo 22 days ago
Took 2 hr 3 min

Build #33921 (Jul 26, 2021 4:12:13 AM)

  1. Revert "Revert D106562 "[clangd] Get rid of arg adjusters in CommandMangler"" (details)
  2. [SelectionDAG] Support scalable-vector splats in yet more cases (details)
  3. [Analysis] Add simple cost model for strict (in-order) reductions (details)
  4. [AArch64][AsmParser] NFC: Parser.getTok().getLoc() -> getLoc() (details)
  5. Revert "[clangd] Avoid range-loop init-list lifetime subtleties." (details)
  6. [X86][SSE] Don't scrub address math from interleaved shuffle tests (details)
  7. [X86][AVX] Prefer vinsertf128 to vperm2f128 on AVX1 targets (details)
  8. [AArch64][SVE] Improve code generation for vector_splice for Imm == -1 (details)
  9. Fix test failures caused by 0aff1798b5721d5f95d16f465b99d357012bb8d1 (details)
  10. [SVE][AArch64] Improve code generation for vector_splice for Imm > 0 (details)
  11. [SVE] Add support for folding for select + masked loads (details)
  12. [VPlan] Use stored value from recipes for interleave groups. (details)
  13. [Inliner] Make the CallPenalty configurable (details)

Started by timer (12 times)

This run spent:

  • 1 hr 58 min waiting;
  • 2 hr 3 min build duration;
  • 4 hr 1 min total from scheduled to completion.
Revision: 0b9e49366d6c3c39fabf7a20123cb37eac6297ca
  • refs/remotes/origin/main
Revision: 46c03668774c27877bd96957931fafae24383e3f
Repository: http://labmaster3.local/git/llvm-project.git
  • refs/remotes/origin/main
Revision: 0b9e49366d6c3c39fabf7a20123cb37eac6297ca
Repository: http://labmaster3.local/git/llvm-zorg.git
  • refs/remotes/origin/main
Test Result (no failures)