1. [lldb] Always set the minimum OS version in the Darwin builder (details)
  2. [DebugInfo] Expand ability to load 2-byte addresses in dwarf sections (details)
  3. [lldb] Include unistd.h for sleep in profile_vrs_detach (details)
  4. [Demangle] Rename OutputStream to OutputString (details)
  5. [gn build] Make 'compiler-rt' depend on include dir (details)
  6. [mlir][linalg][bufferize] Support scf::IfOp (details)
  7. [AMDGPU] Allow to use a whole register file on gfx90a for VGPRs (details)
  8. [msan] Don't use TLS slots of noundef args (details)
  9. [libcxxabi] Fix build after D111947 (details)
  10. [gn build] Port 2e97236aacbb (details)
  11. [Coroutines] Ignore partial lifetime markers refer of an alloca (details)
Commit 09b95b9dc9afb0c12e7d10faea17ed0cb6920b9f by Jonas Devlieghere
[lldb] Always set the minimum OS version in the Darwin builder
The file was modifiedlldb/packages/Python/lldbsuite/test/builders/
Commit d7733f84228bde1079117e82b36fac94e9b323ed by dblaikie
[DebugInfo] Expand ability to load 2-byte addresses in dwarf sections

Some dwarf loaders in LLVM are hard-coded to only accept 4-byte and 8-byte address sizes. This patch generalizes acceptance into `DWARFContext::isAddressSizeSupported` and provides a common way to generate rejection errors.

The MSP430 target has been given new tests to cover dwarf loading cases that previously failed due to 2-byte addresses.

Reviewed By: dblaikie

Differential Revision:
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugArangeSetTest.cpp
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugRangeList.h
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp
The file was addedllvm/test/DebugInfo/MSP430/dwarf-basics-v5.ll
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFListTable.cpp
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugAddr.cpp
The file was addedllvm/test/DebugInfo/MSP430/cu-ranges.ll
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_addr_invalid_addr_size.s
The file was addedllvm/test/DebugInfo/MSP430/ranges_always.ll
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFUnit.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_rnglists_invalid.s
Commit 08f4b56fb9795b5d271378fb62c3fed67ab1b754 by Jonas Devlieghere
[lldb] Include unistd.h for sleep in profile_vrs_detach
The file was modifiedlldb/test/API/macosx/profile_vrs_detach/main.c
Commit 2e97236aacbbcd58873826deb9a0e6a0704be8db by dblaikie
[Demangle] Rename OutputStream to OutputString

This patch is a refactor to implement prepend afterwards. Since this changes a lot of files and to conform with guidelines, I will separate this from the implementation of prepend. Related to the discussion in , so please read it for more context.

Reviewed By: #libc_abi, dblaikie, ldionne

Differential Revision:
The file was modifiedllvm/include/llvm/Demangle/Utility.h
The file was addedllvm/unittests/Demangle/OutputBufferTest.cpp
The file was modifiedllvm/unittests/Demangle/ItaniumDemangleTest.cpp
The file was modifiedllvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
The file was modifiedllvm/lib/Demangle/RustDemangle.cpp
The file was modifiedlibcxxabi/src/demangle/Utility.h
The file was modifiedllvm/unittests/Demangle/CMakeLists.txt
The file was modifiedlibcxxabi/src/demangle/ItaniumDemangle.h
The file was modifiedllvm/lib/Demangle/ItaniumDemangle.cpp
The file was modifiedllvm/lib/Demangle/MicrosoftDemangleNodes.cpp
The file was modifiedllvm/include/llvm/Demangle/ItaniumDemangle.h
The file was removedllvm/unittests/Demangle/OutputStreamTest.cpp
The file was modifiedllvm/lib/Demangle/MicrosoftDemangle.cpp
Commit 4976be1e955d2f5ebd4e28df07235d86e9228e09 by thakis
[gn build] Make 'compiler-rt' depend on include dir

That way, the headers in llvm/utils/gn/secondary/compiler-rt/include
are copied when running `ninja compiler-rt`. (Previously, they were
only copied when running `check-hwasan` or when building the
compiler-rt/include target.)

(Since they should be copied only once, depend on the target in the
host toolchain. I think default_toolchain should work just as well,
it just needs to be a single fixed toolchain. check-hwasan depends
through host_toolchain, so let's use that here too.)

Prevents errors like

    testing/fuzzed_data_provider.h:8:10: fatal error: 'fuzzer/FuzzedDataProvider.h' file not found

when building with locally-built clang. (For now, you still have to
explicitly build the 'compiler-rt' target. Maybe we should make the
clang target depend on that in the GN build?)

Differential Revision:
The file was modifiedllvm/utils/gn/secondary/compiler-rt/
Commit 3bbc869e2ef26f3bc296d5b4e23ee8678a20fc0b by springerm
[mlir][linalg][bufferize] Support scf::IfOp

This commit adds support for scf::IfOp to comprehensive bufferization. Support is currently limited to cases where both branches yield tensors that bufferize to the same buffer.

To keep the analysis simple, scf::IfOp are treated as memory writes for analysis purposes, even if no op inside any branch is writing. (scf::ForOps are handled in the same way.)

Differential Revision:
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize-analysis.mlir
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize-invalid.mlir
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize.mlir
Commit ca0c92d6a1cc93ea83411511848644cb217c31ce by Stanislav.Mekhanoshin
[AMDGPU] Allow to use a whole register file on gfx90a for VGPRs

In a kernel which does not have calls or AGPR usage we can allocate
the whole vector register budget for VGPRs and have no AGPRs as
long as VGPRs stay addressable (i.e. below 256).

Differential Revision:
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
The file was addedllvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Commit b7ea298dfd835a9ff4e5e97d4f145099240ba3aa by Vitaly Buka
[msan] Don't use TLS slots of noundef args

Transformations may strip the attribute from the
argument, e.g. for unused, which will result in
shadow offsets mismatch between caller and

Stripping noundef for used arguments can be
a problem, as TLS is not going to be set
by caller. However this is not the goal of the
patch and I am not aware if that's even

Differential Revision:
The file was modifiedllvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/msan_eager.ll
Commit 34c97d5ae35405106b7e34763882756a65ff2d67 by Vitaly Buka
[libcxxabi] Fix build after D111947
The file was modifiedlibcxxabi/src/cxa_demangle.cpp
Commit a48bfc2c09ac13091154adbe5c9d842637f09ee4 by llvmgnsyncbot
[gn build] Port 2e97236aacbb
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Demangle/
Commit ddbf1961941b86a61e824fb6bab1ab11f8b3ea90 by yedeng.yd
[Coroutines] Ignore partial lifetime markers refer of an alloca

When I playing with Coroutines, I found that it is possible to generate
following IR:
%struct = alloca ...
%sub.element = getelementptr %struct, i64 0, i64 index ; index is not
% use of %sub.element
store %struct to xxx ;  %struct is escaping!

<suspend points>

Then the AllocaUseVisitor would collect the lifetime marker for
sub.element and treat it as the lifetime markers of the alloca! So it
judges that the alloca could be put on the stack instead of the frame by
judging the lifetime markers only.
The root cause for the bug is that AllocaUseVisitor collects wrong
lifetime markers.

This patch fixes this.

Reviewed By: lxfind

Differential Revision:
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was addedllvm/test/Transforms/Coroutines/coro-alloca-09.ll