1. [WebAssembly] Implementation of table.get/set for reftypes in LLVM IR (details)
  2. [AArch64] Improve div and rem costmodel tests. NFC (details)
  3. [SPARC] Recognize the prefetch instruction (details)
  4. [AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions. (details)
  5. [lldb/DWARF] Ignore debug info pointing to the low addresses (details)
  6. [docs] Fix hyperlink (details)
  7. [lldb/test] Remove quote/unquote steps from the make invocations (details)
  8. [lldb] Improve assert message in TestCPPAccelerator (details)
  9. [X86] Remove X86ProcFamilyEnum::IntelSLM (details)
  10. [lldb] [Process/Utility] Define qN regs on ARM via helper macro (details)
  11. consteval if does not form a discarded statement (details)
  12. [CostModel][X86] Add costs for multiply-by-pow2 constants (details)
Commit 6d0c7bc17de85807c286f78571235b6658999faf by pmatos
[WebAssembly] Implementation of table.get/set for reftypes in LLVM IR

This change implements new DAG nodes TABLE_GET/TABLE_SET, and lowering
methods for load and stores of reference types from IR arrays. These
global LLVM IR arrays represent tables at the Wasm level.

Differential Revision:
The file was modifiedlld/test/wasm/lto/Inputs/libcall-truncsfhf2.ll
The file was modifiedlld/test/wasm/lto/weak-undefined.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
The file was modifiedlld/test/wasm/lto/Inputs/thinlto.ll
The file was modifiedlld/test/wasm/lto/diagnostics.ll
The file was modifiedlld/test/wasm/lto/verify-invalid.ll
The file was modifiedlld/test/wasm/lto/save-temps.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
The file was modifiedlld/test/wasm/lto/lto-start.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedlld/test/wasm/lto/Inputs/libcall-archive.ll
The file was modifiedlld/test/wasm/lto/internalize-basic.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
The file was addedllvm/test/CodeGen/WebAssembly/externref-tableset.ll
The file was modifiedlld/test/wasm/lto/tls.ll
The file was modifiedlld/test/wasm/lto/export.ll
The file was addedllvm/test/CodeGen/WebAssembly/funcref-tableset.ll
The file was modifiedlld/test/wasm/lto/weak.ll
The file was modifiedllvm/lib/Target/WebAssembly/
The file was modifiedlld/test/wasm/lto/Inputs/cache.ll
The file was modifiedlld/test/wasm/lto/opt-level.ll
The file was modifiedlld/test/wasm/lto/atomics.ll
The file was modifiedlld/test/wasm/lto/Inputs/used.ll
The file was modifiedclang/lib/Basic/Targets/WebAssembly.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISD.def
The file was modifiedlld/test/wasm/lto/libcall-truncsfhf2.ll
The file was addedllvm/test/CodeGen/WebAssembly/funcref-table_call.ll
The file was modifiedlld/test/wasm/lto/archive.ll
The file was modifiedlld/test/wasm/lto/used.ll
The file was addedllvm/test/CodeGen/WebAssembly/funcref-tableget.ll
The file was modifiedlld/test/wasm/lto/Inputs/archive.ll
The file was modifiedlld/test/wasm/lto/undef.ll
The file was addedllvm/test/CodeGen/WebAssembly/externref-tableget.ll
The file was modifiedlld/test/wasm/lto/import-attributes.ll
The file was modifiedlld/test/wasm/lto/cache.ll
The file was modifiedlld/test/wasm/lto/relocatable-undefined.ll
The file was modifiedlld/test/wasm/lto/Inputs/save-temps.ll
The file was modifiedlld/test/wasm/lto/comdat.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
The file was modifiedclang/test/CodeGen/target-data.c
The file was modifiedlld/test/wasm/lto/parallel.ll
The file was modifiedlld/test/wasm/lto/relocatable.ll
The file was modifiedlld/test/wasm/lto/libcall-archive.ll
The file was modifiedlld/test/wasm/lto/thinlto.ll
The file was modifiedlld/test/wasm/lto/new-pass-manager.ll
Commit 862e8d7e55206b6ae7270033cb5609477d0512ad by
[AArch64] Improve div and rem costmodel tests. NFC

Copied from the X86 tests, these give a better test coveraged than the
existing tests.
The file was addedllvm/test/Analysis/CostModel/AArch64/rem.ll
The file was modifiedllvm/test/Analysis/CostModel/AArch64/div.ll
Commit ec428f7b780615769b7ca712ff67d05c2c957946 by cederman
[SPARC] Recognize the prefetch instruction

Reviewed By: LemonBoy

Differential Revision:
The file was modifiedllvm/lib/Target/Sparc/
The file was modifiedllvm/test/MC/Sparc/sparcv9-instructions.s
Commit f903c8505515f15e956febbd8cdfa0037fbaf689 by daniel.kiss
[AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions.

autiasp, autibsp instructions are the counterpart of paciasp/pacibsp instructions
therefore let's emit .cfi_negate_ra_state for these too.
In case of Armv8.3 instruction set the retaa/retbb will do the return and authentication
in one step here we can't emit the . cfi_negate_ra_state because that would be point after
the ret* instruction.

Reviewed By: nickdesaulniers, MaskRay

Differential Revision:
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
The file was modifiedllvm/test/CodeGen/AArch64/sign-return-address.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
Commit ffbff6c511ba230954013eca8d824a66f6b4f9a5 by pavel
[lldb/DWARF] Ignore debug info pointing to the low addresses

specifically, ignore addresses that point before the first code section.

This resurrects D87172 with several notable changes:
- it fixes a bug where the early exits in InitializeObject left
  m_first_code_address "initialized" to LLDB_INVALID_ADDRESS (0xfff..f),
  which caused _everything_ to be ignored.
- it extends the line table fix to function parsing as well, where it
  replaces a similar check which was checking the executable permissions
  of the section. This was insufficient because some
  position-independent elf executables can have an executable segment
  mapped at file address zero. (What makes this fix different is that it
  checks for the executable-ness of the sections contained within that
  segment, and those will not be at address zero.)
- It uses a different test case, with an elf file with near-zero
  addresses, and checks for both line table and function parsing.

Differential Revision:
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/lit.local.cfg
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
The file was addedlldb/test/Shell/SymbolFile/DWARF/x86/dead-code-filtering.yaml
Commit f45d7407168d08c4d80216ca13feb1e1c21ad6bb by sven.vanhaastregt
[docs] Fix hyperlink
The file was modifiedclang/docs/UsersManual.rst
Commit 551d118805c808936956e464dc21e05acb478f78 by pavel
[lldb/test] Remove quote/unquote steps from the make invocations

None of the commands we run really rely on shell features. Running them
with shell=False, simplifies the code as there is no need for elaborate

Differential Revision:
The file was modifiedlldb/packages/Python/lldbsuite/test/builders/
The file was modifiedlldb/packages/Python/lldbsuite/test/
The file was modifiedlldb/packages/Python/lldbsuite/test/builders/
Commit 956df6fa620a0ca75fd6e62b5318fb4d14304a4f by Raphael Isemann
[lldb] Improve assert message in TestCPPAccelerator

`log` is just some IO object that gets printed as `<_io.TextIOWrapper = filename`
but the intention here was to print the actual found log contents.
The file was modifiedlldb/test/API/lang/cpp/accelerator-table/
Commit 9fc523d114085d194da90ef108c16c931c40ae38 by llvm-dev
[X86] Remove X86ProcFamilyEnum::IntelSLM

Replace X86ProcFamilyEnum::IntelSLM enum with a TuningUseSLMArithCosts flag instead, matching what we already do for Goldmont.

This just leaves X86ProcFamilyEnum::IntelAtom to replace with general Tuning/Feature flags and we can finally get rid of the old X86ProcFamilyEnum enum.

Differential Revision:
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86Subtarget.h
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Target/X86/
Commit 6561c074c072beb6c8e400a62bd5943a1f26a72a by mgorny
[lldb] [Process/Utility] Define qN regs on ARM via helper macro

Add a FPU_QREG macro to define qN registers.  This is a piece-wise
attempt of reconstructing D112066 with the goal of figuring out which
part of the larger change breaks the buildbot.

Differential Revision:
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
Commit ab2ca8496d54573de1c8bec204009567ba2b4086 by aaron
consteval if does not form a discarded statement

When we added support for if consteval, we accidentally formed a discarded
statement evaluation context for the branch-not-taken. However, a discarded
statement is a property of an if constexpr statement, not an if consteval
statement ( This turned out to
cause issues when deducing the return type from a function with a consteval if
statement -- we wouldn't consider the branch-not-taken when deducing the return

This fixes PR52206.

Note, there is additional work left to be done. We need to track discarded
statement and immediate evaluation contexts separately rather than as being
mutually exclusive.
The file was addedclang/test/SemaCXX/cxx2b-consteval-if.cpp
The file was modifiedclang/lib/Parse/ParseStmt.cpp
Commit 5b395bd633632b9f87f4d853095cb1a090a1efe6 by llvm-dev
[CostModel][X86] Add costs for multiply-by-pow2 constants

These are folded to left shifts in the backend.

We should be able to extend this for multiply-by-negpow2 after D111968 has landed to resolve PR51436
The file was modifiedllvm/test/Analysis/CostModel/X86/mul.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp