Changes

Summary

  1. [mlir][OpDSL] Update op definitions to make shapes more concise (NFC). (details)
  2. [flang][driver] Add documentation for Plugins (details)
  3. [AArch64] Regenerate some test checks. NFC (details)
  4. [HardwareLoops] Loop guard intrinsic to recognise zext (details)
  5. [AMDGPU] Fix upcoming TableGen warnings on unused template arguments. NFC. (details)
  6. [FuncSpec] Add a test for specialising on a non-constant global argument. NFC. (details)
  7. [lldb] [gdb-remote] Try using <architecture/> for remote arch unconditionally (details)
  8. [lldb] [ABI/AArch64] Recognize special regs by their xN names too (details)
  9. [Test][AggressiveInstCombine] Add test for truncation of vector instructions (details)
  10. [AggressiveInstCombine] Add `{insert/extract}element` to `TruncInstCombine` DAG (details)
  11. [clangd] Fix clangd crash when including a header (details)
Commit 8f2db36b01c043570e36a85c45b87c6df402d3ee by gysit
[mlir][OpDSL] Update op definitions to make shapes more concise (NFC).

Express the input shape definitions of convolution and pooling operations in terms of the output shapes, filter shapes, strides, and dilations.

Reviewed By: shabalin, rsuderman, stellaraccident

Differential Revision: https://reviews.llvm.org/D109815
The file was modifiedmlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
Commit 7acf92943b78611e1194687de37eebf83ba97430 by andrzej.warzynski
[flang][driver] Add documentation for Plugins

Adding documentation covering the Frontend Driver Plugins

Reviewed By: awarzynski, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D108283
The file was modifiedflang/docs/FlangDriver.md
Commit e06767fdcbe3215773c53166b25e2bf24110119f by david.green
[AArch64] Regenerate some test checks. NFC

This regenerates some of the tests that had very-close-to-updated check
line already, in order to make them more maintainable.
The file was modifiedllvm/test/CodeGen/AArch64/sve-split-fp-reduce.ll
The file was modifiedllvm/test/CodeGen/AArch64/i128_volatile_load_store.ll
The file was modifiedllvm/test/CodeGen/AArch64/fdiv_combine.ll
Commit c98a8a09b5eb04882dddd02346e5c3b4c90f038c by sam.parker
[HardwareLoops] Loop guard intrinsic to recognise zext

If a loop count was initially represented by a 32b unsigned int in C
then the hardware-loop pass can recognise the loop guard and insert
the llvm.test.set.loop.iterations intrinsic. If this was instead a
unsigned short/char then clang inserts a zext instruction to expand
the loop count to an i32. This patch adds the necessary pattern
matching to enable the use of lvm.test.set.loop.iterations in those
cases.

Patch by: sherwin-dc

Differential Revision: https://reviews.llvm.org/D109631
The file was modifiedllvm/lib/CodeGen/HardwareLoops.cpp
The file was modifiedllvm/test/Transforms/HardwareLoops/loop-guards.ll
Commit 128a49727a4565617fab3d72e2fe2fe2d8f87ff6 by jay.foad
[AMDGPU] Fix upcoming TableGen warnings on unused template arguments. NFC.

The warning is implemented by D109359 which is still in review.

Differential Revision: https://reviews.llvm.org/D109826
The file was modifiedllvm/lib/Target/AMDGPU/VOPInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/EvergreenInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP3PInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/FLATInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/R600Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.td
Commit a4e437e3c959ac0cb2edb733d081edc95a4fff22 by sjoerd.meijer
[FuncSpec] Add a test for specialising on a non-constant global argument. NFC.
The file was addedllvm/test/Transforms/FunctionSpecialization/function-specialization-nonconst-glob.ll
Commit 66249323d25f6db1dc76bd9fb3b9eebe436519a6 by mgorny
[lldb] [gdb-remote] Try using <architecture/> for remote arch unconditionally

Try determining the process architecture from <architecture/> tag
unconditionally, rather than for very specific cases.  Generic gdbserver
implementations do not support LLDB-specific packets used to determine
the process architecture, therefore this fallback is necessary to
support architecture-specific behavior on these targets.  Rather than
maintaining a mapping of all known architectures, just try mapping
the GDB values into triplets, as that is going to work most of the time.

This change is confirmed to fix LLDB against gdbserver when debugging
i386 and aarch64 executables.

Differential Revision: https://reviews.llvm.org/D109272
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was addedlldb/test/API/functionalities/gdb_remote_client/basic_eh_frame-i386.yaml
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
Commit c208deb9008260d3effc00c98493434a65af4b8d by mgorny
[lldb] [ABI/AArch64] Recognize special regs by their xN names too

Recognize lr/sp/fp by their numeric register names in the ABI plugin.
This is necessary to mark them appropriately when interfacing with
gdbserver.

Differential Revision: https://reviews.llvm.org/D109691
The file was modifiedlldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
Commit 8371a4c9d55997fdc45effbfa5d38d1f19ae3473 by anton.a.afanasyev
[Test][AggressiveInstCombine] Add test for truncation of vector instructions

Precommit test for D109236
The file was addedllvm/test/Transforms/AggressiveInstCombine/trunc_vector_instrs.ll
Commit 6a5f49a1acf861357b9ccb8495e4416878a2a7ad by anton.a.afanasyev
[AggressiveInstCombine] Add `{insert/extract}element` to `TruncInstCombine` DAG

Alive2 for `{insert/extract}element`: https://alive2.llvm.org/ce/z/hwy_E-

Actually, no one file of test suite is touched by this change,
which means that is rare pattern not generated by frontend. But
it's worth being in place.

Differential Revision: https://reviews.llvm.org/D109236
The file was modifiedllvm/test/Transforms/AggressiveInstCombine/trunc_vector_instrs.ll
The file was modifiedllvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
Commit 9c4a1686d7c487fff8e63fa67e64623eea8986d5 by kadircet
[clangd] Fix clangd crash when including a header

Fixes https://github.com/clangd/clangd/issues/819

SourceLocation of macros change when a header file is included above it. This is not checked when creating a PreamblePatch, resulting in reusing previously built preamble with an incorrect source location for the macro in the example test case.
This patch stores the SourceLocation in the struct TextualPPDirective so that it gets checked when comparing old vs new preambles.

Also creates a preamble patch for code completion parsing so that clangd does not crash when following the example test case with a large file.

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D108045
The file was modifiedclang-tools-extra/clangd/Preamble.h
The file was modifiedclang-tools-extra/clangd/Preamble.cpp
The file was modifiedclang-tools-extra/clangd/CodeComplete.cpp
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
The file was modifiedclang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/PreambleTests.cpp

Summary

  1. Fixed relative address in LNT profile control-flow graph. (details)
Commit 6ba06570364b936c6bfb631e9d2e4f1374446bad by slydiman
Fixed relative address in LNT profile control-flow graph.

It seems the relative address in AArch64 disassembly is dec, not hex.
The file was modifiedlnt/server/ui/static/lnt_profile.js (diff)