Changes

Summary

  1. [RISCV] Fix typo in comment. NFC (details)
  2. [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols (details)
  3. [RISCV][TableGen] Remove HasMaskedOffOperand as a member of RVVIntrinsic. NFC (details)
  4. [libc] add atof, strtof and strtod (details)
  5. [mlir][tosa] Adds a canonicalization to the transpose op if the perms are a no op (details)
  6. [test] Remove tests pinned to the legacy PM (details)
  7. [opt] Directly translate -O# to -passes='default<O#>' (details)
  8. Follow-on to fix a test from c5011aed9c297d6ddd8ee4f77453b215aa27554a. (details)
  9. [mlir] Add enclosingOpOk parameter to properlyDominates (details)
  10. [mlir][scf] Add insideMutuallyExclusiveBranches helper (details)
  11. Simplify the TableManager class and move it into a public header. (details)
  12. [mlir] fix bugs with NamedAttrList (details)
  13. [RISCV] Reorder the vector register allocation order. (details)
  14. [Support][ThinLTO] Move ThinLTO caching to LLVM Support library (details)
Commit b477b927749707982414d06674c7d2af276e046c by craig.topper
[RISCV] Fix typo in comment. NFC
The file was modifiedclang/utils/TableGen/RISCVVEmitter.cpp
Commit 0567f0333176e476e15b7f32b463f58f7475ff22 by Anshil.Gandhi
[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols

By default clang emits complete contructors as alias of base constructors if they are the same.
The backend is supposed to emit symbols for the alias, otherwise it causes undefined symbols.
@yaxunl observed that this issue is related to the llvm options `-amdgpu-early-inline-all=true`
and `-amdgpu-function-calls=false`. This issue is resolved by only inlining global values
with internal linkage. The `getCalleeFunction()` in AMDGPUResourceUsageAnalysis also had
to be extended to support aliases to functions. inline-calls.ll was corrected appropriately.

Reviewed By: yaxunl, #amdgpu

Differential Revision: https://reviews.llvm.org/D109707
The file was modifiedllvm/test/CodeGen/AMDGPU/inline-calls.ll
The file was addedclang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
Commit 684b6265b31cabf422b01cd8937a3641c6df914f by craig.topper
[RISCV][TableGen] Remove HasMaskedOffOperand as a member of RVVIntrinsic. NFC

This value is only used by the RVVIntrinsic constructor. We don't
need it to be a member.
The file was modifiedclang/utils/TableGen/RISCVVEmitter.cpp
Commit 87c016078ad72c46505461e4ff8bfa04819fe7ba by michaelrj
[libc] add atof, strtof and strtod

Add the string to floating point conversion functions.
Long doubles aren't supported yet, but floats and doubles are. The
primary algorithm used is the Eisel-Lemire ParseNumberF64 algorithm,
with the Simple Decimal Conversion algorithm as backup.

Links for more information on the algorithms:

Number Parsing at a Gigabyte per Second, Software: Practice and
Experience 51 (8), 2021 (https://arxiv.org/abs/2101.11408)
https://nigeltao.github.io/blog/2020/eisel-lemire.html
https://nigeltao.github.io/blog/2020/parse-number-f64-simple.html

Differential Revision: https://reviews.llvm.org/D109261
The file was addedlibc/src/stdlib/strtof.h
The file was addedlibc/src/stdlib/strtof.cpp
The file was modifiedlibc/fuzzing/stdlib/CMakeLists.txt
The file was addedlibc/src/stdlib/atof.h
The file was addedlibc/test/src/__support/str_to_float_test.cpp
The file was addedlibc/test/src/stdlib/atof_test.cpp
The file was addedlibc/test/src/stdlib/strtod_test.cpp
The file was addedlibc/test/src/__support/str_to_float_comparison_test.cpp
The file was addedlibc/fuzzing/stdlib/atof_fuzz.cpp
The file was addedlibc/src/__support/str_to_float.h
The file was modifiedlibc/src/stdlib/CMakeLists.txt
The file was modifiedlibc/test/src/__support/CMakeLists.txt
The file was addedlibc/src/stdlib/strtod.cpp
The file was modifiedlibc/spec/stdc.td
The file was modifiedlibc/src/__support/CMakeLists.txt
The file was modifiedlibc/test/src/stdlib/CMakeLists.txt
The file was addedlibc/src/__support/detailed_powers_of_ten.h
The file was addedlibc/src/stdlib/strtod.h
The file was addedlibc/fuzzing/stdlib/StringParserOutputDiff.h
The file was modifiedlibc/src/__support/high_precision_decimal.h
The file was addedlibc/src/stdlib/atof.cpp
The file was addedlibc/test/src/stdlib/strtof_test.cpp
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt
The file was addedlibc/test/src/__support/str_to_float_comparison_data.txt
Commit 4ada6c2aafffd90c87900cab0adbb4d43c874b9b by rob.suderman
[mlir][tosa] Adds a canonicalization to the transpose op if the perms are a no op

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D112037
The file was modifiedmlir/test/Dialect/Tosa/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/Tosa/IR/TosaOps.cpp
Commit cb5a10199b32b5e1104ed36a490be73fa3bdf5ca by aeubanks
[test] Remove tests pinned to the legacy PM

Now that the legacy PM is deprecated for the optimization pipeline, we
can start deleting legacy PM tests.

For tests that test both PMs, merge the RUN lines.
Delete tests specific to the legacy PM.
The file was modifiedclang/test/CodeGen/cspgo-instrumentation_lto.c
The file was modifiedclang/test/CodeGen/aggregate-assign-call.c
The file was modifiedclang/test/CodeGen/callback_annotated.c
The file was modifiedclang/test/CodeGenCXX/conditional-temporaries.cpp
The file was modifiedclang/test/CodeGen/X86/avx512fp16-complex.c
The file was modifiedclang/test/CodeGen/X86/x86_64-instrument-functions.c
The file was modifiedclang/test/CodeGen/pgo-instrumentation.c
The file was modifiedclang/test/Frontend/optimization-remark-line-directive.c
The file was modifiedclang/test/CodeGen/split-lto-unit.c
The file was modifiedclang/test/CodeGen/complex-math.c
The file was modifiedclang/test/Profile/gcc-flag-compatibility.c
The file was modifiedclang/test/CodeGenCXX/member-function-pointer-calls.cpp
The file was modifiedclang/test/CodeGenCXX/merge-functions.cpp
The file was modifiedclang/test/Driver/msan.c
The file was modifiedclang/test/CodeGen/split-debug-single-file.c
The file was modifiedclang/test/Driver/memtag.c
The file was modifiedclang/test/CodeGen/X86/builtin-movdir.c
The file was modifiedclang/test/CodeGen/thinlto-debug-pm.c
The file was removedclang/test/Misc/pr32207.c
The file was modifiedclang/test/Profile/gcc-flag-compatibility-aix.c
The file was modifiedclang/test/CodeGen/pgo-sample.c
The file was modifiedclang/test/CodeGen/cspgo-instrumentation.c
The file was modifiedclang/test/Driver/sancov.c
The file was modifiedclang/test/CodeGen/available-externally-suppress.c
The file was modifiedclang/test/Driver/asan.c
The file was modifiedclang/test/CodeGen/lifetime.c
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-call.c
The file was modifiedclang/test/Driver/dfsan.c
The file was modifiedclang/test/CodeGen/use-sample-profile-attr.c
The file was modifiedclang/test/CodeGenCXX/ubsan-coroutines.cpp
The file was modifiedclang/test/Driver/memtag_lto.c
The file was modifiedclang/test/Driver/tsan.c
The file was modifiedclang/test/CodeGenCXX/nrvo.cpp
The file was modifiedclang/test/CodeGenOpenCL/convergent.cl
Commit 15fefcb9eb3a2b9080b44e3784608597666000ec by aeubanks
[opt] Directly translate -O# to -passes='default<O#>'

Right now when we see -O# we add the corresponding 'default<O#>' into
the list of passes to run when translating legacy -pass-name. This has
the side effect of not using the default AA pipeline.

Instead, treat -O# as -passes='default<O#>', but don't allow any other
-passes or -pass-name. I think we can keep `opt -O#` as shorthand for
`opt -passes='default<O#>` but disallow anything more than just -O#.

Tests need to be updated to not use `opt -O# -pass-name`.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D112036
The file was modifiedllvm/test/CodeGen/NVPTX/nvvm-reflect.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
The file was modifiedllvm/tools/opt/opt.cpp
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/msan_llvm_strip_invariant.ll
The file was modifiedllvm/test/Transforms/MergeFunc/mergefunc-preserve-debug-info.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/extra-sroa-after-unroll.ll
The file was modifiedllvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
The file was modifiedllvm/test/Transforms/GlobalOpt/long-compilation-global-sra.ll
The file was modifiedllvm/test/Transforms/LoopVersioningLICM/loopversioningLICM3.ll
The file was addedllvm/test/Other/opt-On.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/msan_llvm_launder_invariant.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll
The file was modifiedllvm/test/Transforms/LoopVersioningLICM/metadata.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/global_alias.ll
The file was modifiedllvm/test/Transforms/Inline/devirtualize-3.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
Commit f24532ae91d540bcc2a6a5f29f89c8ea42907ef3 by jingham
Follow-on to fix a test from c5011aed9c297d6ddd8ee4f77453b215aa27554a.

I need to set a fake default platform for the UnitTest test to run on other
systems.
The file was modifiedlldb/unittests/Interpreter/TestCommandPaths.cpp
Commit 252386ac81f944ab713dfd5158e67cd547fba53c by springerm
[mlir] Add enclosingOpOk parameter to properlyDominates

Differential Revision: https://reviews.llvm.org/D111959
The file was modifiedmlir/include/mlir/IR/Dominance.h
Commit fd26ca4e7515e7dd32ae02e777bd21693afc68ff by springerm
[mlir][scf] Add insideMutuallyExclusiveBranches helper

This helper function checks if two given ops are in mutually exclusive branches of the same scf::IfOp.

Differential Revision: https://reviews.llvm.org/D111957
The file was modifiedmlir/lib/Dialect/SCF/SCF.cpp
The file was modifiedmlir/include/mlir/Dialect/SCF/SCF.h
Commit bc03a9c066bf9990a1d595cb80ad51ae40fb759a by Lang Hames
Simplify the TableManager class and move it into a public header.

Moves visitEdge into the TableManager derivatives, replacing the fixEdgeKind
methods in those classes. The visitEdge method takes on responsibility for
updating the edge target, as well as its kind.
The file was removedllvm/lib/ExecutionEngine/JITLink/TableManager.h
The file was addedllvm/include/llvm/ExecutionEngine/JITLink/TableManager.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
Commit 21bb463e9639719f1aae9535825a40732eda487b by jeffniu22
[mlir] fix bugs with NamedAttrList

- `assign` with ArrayRef was calling `append`
- `assign` with empty ArrayRef was not clearing storage

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D112043
The file was modifiedmlir/include/mlir/IR/OperationSupport.h
The file was modifiedmlir/lib/IR/BuiltinAttributes.cpp
The file was modifiedmlir/unittests/IR/OperationSupportTest.cpp
Commit facff468b6c47b954aebd297c90bd44accaa54c6 by kai.wang
[RISCV] Reorder the vector register allocation order.

GPR uses argument registers as the first group of registers to allocate.
This patch uses vector argument registers, v8 to v23, as the first group
to allocate.

Differential Revision: https://reviews.llvm.org/D111304
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/select-sra.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsm-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/select-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulh-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/byval.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/select-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-optimize-multiple.mir
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVRegisterInfo.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll
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Commit e678c51177102845c93529d457b020f969125373 by phosek
[Support][ThinLTO] Move ThinLTO caching to LLVM Support library

We would like to move ThinLTO’s battle-tested file caching mechanism to
the LLVM Support library so that we can use it elsewhere in LLVM.

Patch By: noajshu

Differential Revision: https://reviews.llvm.org/D111371
The file was removedllvm/include/llvm/LTO/Caching.h
The file was modifiedllvm/utils/gn/secondary/llvm/lib/LTO/BUILD.gn
The file was modifiedlld/MachO/LTO.cpp
The file was removedllvm/lib/LTO/Caching.cpp
The file was modifiedclang/docs/tools/clang-formatted-files.txt
The file was modifiedllvm/include/llvm/LTO/legacy/LTOCodeGenerator.h
The file was modifiedllvm/lib/LTO/CMakeLists.txt
The file was modifiedllvm/include/llvm/LTO/LTO.h
The file was modifiedllvm/tools/llvm-lto/llvm-lto.cpp
The file was addedllvm/lib/Support/Caching.cpp
The file was modifiedllvm/lib/LTO/LTOCodeGenerator.cpp
The file was modifiedlld/COFF/LTO.cpp
The file was modifiedlld/ELF/LTO.cpp
The file was addedllvm/include/llvm/Support/Caching.h
The file was modifiedllvm/tools/llvm-lto2/llvm-lto2.cpp
The file was modifiedlld/wasm/LTO.cpp
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/tools/gold/gold-plugin.cpp
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
The file was modifiedllvm/lib/Support/CMakeLists.txt