Commit
7539c75bb438f185575573ed4ea8da7cb37d3f2a
by qshanz[DAGCombine] Remove the check for unsafe-fp-math when we are checking the AFN
We are checking the unsafe-fp-math for sqrt but not for fpow, which behaves inconsistent. As the direction is to remove this global option, we need to remove the unsafe-fp-math check for sqrt and update the test with afn fast-math flags.
Reviewed By: Spatel
Differential Revision: https://reviews.llvm.org/D93891
|
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/test/CodeGen/AMDGPU/frem.ll |
 | llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll |
 | llvm/test/CodeGen/NVPTX/fast-math.ll |
 | llvm/test/CodeGen/AMDGPU/fneg-combines.ll |
 | llvm/test/CodeGen/NVPTX/sqrt-approx.ll |
 | llvm/test/CodeGen/X86/sqrt-fastmath.ll |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
Commit
5cf73dca77e52f54c893d2c5fc2f56a5f2764f7d
by craig.topper[RISCV] Convert most of the information about RVV Pseudos into bits in TSFlags.
This patch moves all but the BaseInstr to bits in TSFlags.
For the index fields, we can just use a bit to indicate their presence. The locations of the operands are well defined.
This reduces the llc binary by about 32K on my build. It also removes the binary search of the table from the custom inserter. Instead we just check that the SEW op is present.
Reviewed By: rogfer01
Differential Revision: https://reviews.llvm.org/D94375
|
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/lib/Target/RISCV/RISCVMCInstLower.cpp |
 | llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
 | llvm/lib/Target/RISCV/RISCVInstrFormats.td |
Commit
7f69860243e8933c3da1177afde0d3cb6544d04e
by serguei.katkov[LoopUnroll] Fix a crash
Loop peeling as a last step triggers loop simplification and this can change the loop structure. As a result all cashed values like latch branch becomes invalid.
Patch re-structure the code to take into account the possible changes caused by peeling.
Reviewers: dmgreen, Meinersbur, etiotto, fhahn, efriedma, bmahjour Reviewed By: Meinersbur, fhahn Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D93686
|
 | llvm/lib/Transforms/Utils/LoopUnroll.cpp |
 | llvm/test/Transforms/LoopUnroll/unroll-after-peel.ll |
Commit
ffa67873a3f93a6baa0046221edd08a90b0db6f8
by esme.yi[PowerPC] Add variants of 64-bit vector types for vec_sel.
Summary: This patch added variants of vec_sel and fixed bugzilla 46770.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D94162
|
 | clang/test/CodeGen/builtins-ppc-vsx.c |
 | clang/lib/Headers/altivec.h |
Commit
dcac2da10632c83737fce6da60fbc4dd09c01034
by clattner[IR Parser] Fix a crash handling zero width integer attributes.
llvm::APInt cannot hold zero bit values, therefore we shouldn't try to form them.
Differential Revision: https://reviews.llvm.org/D94384
|
 | mlir/lib/Parser/AttributeParser.cpp |
 | mlir/test/IR/invalid-ops.mlir |
Commit
6215c1b778f62433f3d79addc299a1bbd0e524d0
by iCGDebugInfo: Delete redundant test
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 | clang/lib/CodeGen/CGDebugInfo.cpp |
Commit
b8d28420885a42d16a57e02c28129d0eb92474a1
by iCGDebugInfo: Delete unneeded UnwrapTypeForDebugInfo
Tested with stage 2 -DCMAKE_BUILD_TYPE=Debug clang, byte identical.
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 | clang/lib/CodeGen/CGDebugInfo.cpp |
Commit
a40767ec8851b997e4dcc9987078bd02670f8c7f
by kareem.ergawy[MLIR][SPIRV] Add (de-)serialization support for SpecConstantOpeation.
This commit adds support for (de-)serializing SpecConstantOpeation. One thing worth noting is that during deserialization, we assign a fake ID to enclosed ops inside SpecConstantOpeation. We need to do this in order for deserialization logic to properly update ID to value map and to later reference the created value from the sibling 'spv::YieldOp'.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D93591
|
 | mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp |
 | mlir/lib/Target/SPIRV/Serialization.cpp |
 | mlir/test/Dialect/SPIRV/IR/structure-ops.mlir |
 | mlir/test/Target/SPIRV/spec-constant.mlir |
 | mlir/lib/Target/SPIRV/Deserialization.cpp |
 | mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td |
Commit
5e476061deb82ed4e6d440445f8830e1c7bccaa6
by kai.wang[NFC][AsmPrinter] Make comments for spill/reload more precise.
The size of spill/reload may be unknown for scalable vector types. When the size is unknown, print it as "Unknown-size" instead of a very large number.
Differential Revision: https://reviews.llvm.org/D94299
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 | llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp |
Commit
7b11f564dcfc867c3e7a2075e8a943014fe30780
by Lang Hames[JITLink] Rename PostAllocationPasses to PreFixupPasses.
PreFixupPasses better reflects when these passes will run.
A future patch will (re)introduce a PostAllocationPasses list that will run after allocation, but before JITLinkContext::notifyResolved is called to notify the rest of the JIT about the resolved symbol addresses.
|
 | llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp |
 | llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp |
 | llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp |
 | llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h |
Commit
131ce834e4bbe443a0da0e0ce00c8d0fa4412458
by craig.topper[RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instructions. Remove InstAliases that duplicate the asm strings in the pseudos.
The Pseudo class sets isCodeGenOnly=1 which causes the asm strings in the pseudos to be ignored. I think this is why the aliases are needed at all.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D94024
|
 | llvm/lib/Target/RISCV/RISCVInstrInfoV.td |
Commit
af339f89a142622b6fc56c5f79d19e568af5287a
by akuegelRemove redundant casts.
Differential Revision: https://reviews.llvm.org/D94305
|
 | mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp |
Commit
cddd3faf5debdfd2c09bb5b723f579fa8c8d5027
by zixuan.wu[CSKY] Add visibility macro to fix link error
Add LLVM_EXTERNAL_VISIBILITY macro to fix link error of https://reviews.llvm.org/D88466#2476378
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 | llvm/lib/Target/CSKY/TargetInfo/CSKYTargetInfo.cpp |
Commit
ee27c767bd2062c81f0affc0e8992f60a755f099
by marek.kurdej[clang-format] Skip UTF8 Byte Order Mark while sorting includes
If file contain BOM then first instruction (include or clang-format off) is ignored
Reviewed By: MyDeveloperDay
Differential Revision: https://reviews.llvm.org/D94201
|
 | clang/lib/Format/Format.cpp |
 | clang/unittests/Format/SortIncludesTest.cpp |
Commit
0c8b748f321736d016da0f6d710778f503a89b51
by david.green[ARM] Additional trunc cost tests. NFC
|
 | llvm/test/Analysis/CostModel/ARM/cast.ll |
Commit
7473940bae0f263832456d2c99a4bd606ed0d76e
by marek.kurdej[clang-format] turn on formatting after "clang-format on" while sorting includes
Formatting is not active after "clang-format on" due to merging lines while formatting is off. Also, use trimmed line. Behaviour with LF is different than with CRLF.
Reviewed By: curdeius, MyDeveloperDay
Differential Revision: https://reviews.llvm.org/D94206
|
 | clang/unittests/Format/SortIncludesTest.cpp |
 | clang/lib/Format/Format.cpp |
Commit
89878e8c966a82ed6b7f0254700017f0a97fb7d7
by marek.kurdej[clang-format] Find main include after block ended with #pragma hdrstop
Find main include in first include block not ended with #pragma hdrstop
Reviewed By: curdeius
Differential Revision: https://reviews.llvm.org/D94217
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 | clang/lib/Format/Format.cpp |
 | clang/unittests/Format/SortIncludesTest.cpp |
Commit
dcefcd51e01741c79c9d9a729fe803b13287a372
by david.green[ARM] Update trunc costs
We did not have specific costs for larger than legal truncates that were not otherwise cheap (where they were next to stores, for example). As MVE does not have a dedicated instruction for them (and we do not use loads/stores yet), they should be expensive as they get expanded to a series of lane moves.
Differential Revision: https://reviews.llvm.org/D94260
|
 | llvm/test/Analysis/CostModel/ARM/arith-overflow.ll |
 | llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp |
 | llvm/test/Analysis/CostModel/ARM/cast.ll |
 | llvm/test/Analysis/CostModel/ARM/mve-gather-scatter-cost.ll |
Commit
b7ccaca53700fce21b0e8e5d7bd2a956bd391fee
by david.sherwood[NFC] Remove min/max functions from InstructionCost
Removed the InstructionCost::min/max functions because it's fine to use std::min/max instead.
Differential Revision: https://reviews.llvm.org/D94301
|
 | llvm/unittests/Support/InstructionCostTest.cpp |
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
 | llvm/include/llvm/Support/InstructionCost.h |
Commit
97100646d1b4526de1eac3aacdb0b098739c6ec9
by Jan SvobodaReapply "[clang][cli] Port DiagnosticOpts to new option parsing system"
This reverts commit 8e3e148c
This commit fixes two issues with the original patch: * The sanitizer build bot reported an uninitialized value. This was caused by normalizeStringIntegral not returning None on failure. * Some build bots complained about inaccessible keypaths. To mitigate that, "this->" was added back to the keypath to restore the previous behavior.
|
 | llvm/utils/TableGen/OptParserEmitter.cpp |
 | clang/include/clang/Driver/Options.td |
 | clang/include/clang/Basic/DiagnosticOptions.h |
 | clang/unittests/Frontend/CompilerInvocationTest.cpp |
 | clang/lib/Frontend/CompilerInvocation.cpp |
 | llvm/include/llvm/Option/OptParser.td |
Commit
40abeb11f4584e8a07163d6c7e24011ac45f104c
by david.sherwood[NFC][InstructionCost] Change LoopVectorizationCostModel::getInstructionCost to return InstructionCost
This patch is part of a series of patches that migrate integer instruction costs to use InstructionCost. In the function selectVectorizationFactor I have simply asserted that the cost is valid and extracted the value as is. In future we expect to encounter invalid costs, but we should filter out those vectorization factors that lead to such invalid costs.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174 See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Differential Revision: https://reviews.llvm.org/D92178
|
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
Commit
8165a0342033e58ce6090fbc425ebdc7c455469f
by david.green[ARM] Add debug messages for the load store optimizer. NFC
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 | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp |
Commit
1677c86124e5b82a8dbf991f2d5fc450d06db4ad
by hokein.wu[clangd] Add metrics for go-to-implementation.
Differential Revision: https://reviews.llvm.org/D94393
|
 | clang-tools-extra/clangd/XRefs.cpp |
Commit
c5be0e0cc0e2fca19a5d130b742ae16c66f99111
by yuanke.luo[X86] Fix tile register spill issue.
The tile register spill need 2 instructions. %46:gr64_nosp = MOV64ri 64 TILESTORED %stack.2, 1, killed %46:gr64_nosp, 0, $noreg, %43:tile The first instruction load the stride to a GPR, and the second instruction store tile register to stack slot. The optimization of merge spill instruction is done after register allocation. And spill tile register need create a new virtual register to for stride, so we can't hoist tile spill instruction in postOptimization() of register allocation. We can't hoist TILESTORED alone and we can't hoist the 2 instuctions together because MOV64ri will clobber some GPR. This patch is to disble the spill merge for any spill which need 2 instructions.
Differential Revision: https://reviews.llvm.org/D93898
|
 | llvm/lib/CodeGen/InlineSpiller.cpp |
 | llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll |
Commit
675be651062476cd0cd4b491b35c275bb03d7b2c
by bjorn.a.petterssonRequire chained analyses in BasicAA and AAResults to be transitive
This patch fixes a bug that could result in miscompiles (at least in an OOT target). The problem could be seen by adding checks that the DominatorTree used in BasicAliasAnalysis and ValueTracking was valid (e.g. by adding DT->verify() call before every DT dereference and then running all tests in test/CodeGen).
Problem was that the LegacyPassManager calculated "last user" incorrectly for passes such as the DominatorTree when not telling the pass manager that there was a transitive dependency between the different analyses. And then it could happen that an incorrect dominator tree was used when doing alias analysis (which was a pretty serious bug as the alias analysis result could be invalid).
Fixes: https://bugs.llvm.org/show_bug.cgi?id=48709
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D94138
|
 | llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp |
 | llvm/lib/Analysis/AliasAnalysis.cpp |
 | llvm/lib/Transforms/Scalar/GVNHoist.cpp |
 | llvm/lib/Analysis/BasicAliasAnalysis.cpp |
Commit
c37f68a8885cf55e9a6603613a918c4e7474e9af
by kerry.mclaughlin[SVE][CodeGen] Fix legalisation of floating-point masked gathers
Changes in this patch: - When lowering floating-point masked gathers, cast the result of the gather back to the original type with reinterpret_cast before returning. - Added patterns for reinterpret_casts from integer to floating point, and concat_vector patterns for bfloat16. - Tests for various legalisation scenarios with floating point types.
Reviewed By: sdesmalen, david-arm
Differential Revision: https://reviews.llvm.org/D94171
|
 | llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll |
Commit
41bf338dd1e7f07c1e89f171ff6d53578f5125be
by llvm-devRevert rGd43a264a5dd3 "Revert "[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())""
This reapplies commit rG80dee7965dffdfb866afa9d74f3a4a97453708b2.
[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())
UNPCKL/UNPCKH only uses one op from each hop, so we can merge the hops and then permute the result.
REAPPLIED with a fix for unary unpacks of HOP.
|
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/horizontal-shuffle-2.ll |
Commit
5963229266303d83b2e9de09bce7e063276e41d0
by llvm-dev[X86][SSE] Add missing SSE test coverage for permute(hop,hop) folds
Should help avoid bugs like reported in rG80dee7965dff
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 | llvm/test/CodeGen/X86/horizontal-shuffle-3.ll |
 | llvm/test/CodeGen/X86/horizontal-shuffle-2.ll |
Commit
b72ca799823e97b94ac0144bb87c094fb2db7324
by marukawa[VE] Support intrinsic to isnert/extract_subreg of v512i1
Support insert/extract_subreg intrinsic instructions for v512i1 registers and add regression tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D94298
|
 | llvm/include/llvm/IR/IntrinsicsVE.td |
 | llvm/test/CodeGen/VE/VELIntrinsics/extract.ll |
 | llvm/lib/Target/VE/VEInstrIntrinsicVL.td |
 | llvm/test/CodeGen/VE/VELIntrinsics/insert.ll |
Commit
d02de13932488841eb104ad2a5665fdf7db4026b
by marukawa[VE] Support additional VMRGW and VMV intrinsic instructions
Support missing VMRGW and VMV intrinsic instructions and add regression tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D94300
|
 | llvm/lib/Target/VE/VEInstrIntrinsicVL.td |
 | llvm/test/CodeGen/VE/VELIntrinsics/vmrg.ll |
 | llvm/test/CodeGen/VE/VELIntrinsics/vmv.ll |
Commit
c74751d4b5bd8e6753ba8dbc5baa88d7c8929c5c
by grimar[obj2yaml] - Fix the crash in getUniquedSectionName().
`getUniquedSectionName(const Elf_Shdr *Sec)` assumes that `Sec` is not `nullptr`.
I've found one place in `getUniquedSymbolName` where it is not true (because of that we crash when trying to dump unnamed null section symbols).
Patch fixes the crash and changes the signature of the `getUniquedSectionName` section to accept a reference.
Differential revision: https://reviews.llvm.org/D93754
|
 | llvm/tools/obj2yaml/elf2yaml.cpp |
 | llvm/test/tools/obj2yaml/ELF/symbol.yaml |
Commit
8ea72b388734ce660f861e0dfbe53d203e94876a
by joe.ellis[clang][AArch64][SVE] Avoid going through memory for coerced VLST return values
VLST return values are coerced to VLATs in the function epilog for consistency with the VLAT ABI. Previously, this coercion was done through memory. It is preferable to use the llvm.experimental.vector.insert intrinsic to avoid going through memory here.
Reviewed By: c-rhodes
Differential Revision: https://reviews.llvm.org/D94290
|
 | clang/lib/CodeGen/CGCall.cpp |
 | clang/test/CodeGen/attr-arm-sve-vector-bits-call.c |
 | clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c |
 | clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp |
 | clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c |
Commit
a6db7cf1ce7f3523adb132819c1697a572bdcfde
by grimar[llvm-readelf/obj] - Index phdrs and relocations from 0 when reporting warnings.
As was mentioned in comments here: https://reviews.llvm.org/D92636#inline-864967
we are not consistent and sometimes index things from 0, but sometimes from 1 in warnings.
This patch fixes 2 places: messages reported for program headers and messages reported for relocations.
Differential revision: https://reviews.llvm.org/D93805
|
 | llvm/test/tools/llvm-readobj/ELF/gnu-notes.test |
 | llvm/test/tools/llvm-readobj/ELF/relocations.test |
 | llvm/test/tools/llvm-readobj/ELF/note-core-ntfile-bad.test |
 | llvm/test/tools/llvm-readobj/ELF/stack-sizes.test |
 | llvm/test/tools/llvm-readobj/ELF/relocation-errors.test |
 | llvm/tools/llvm-readobj/ELFDumper.cpp |
Commit
a94497a34290bea077398c83d3031179c08ec2e7
by flo[VPlan] Move initial quote emission from ::print to ::dumpBasicBlock.
This means there will be no stray " when printing individual recipes using print()/dump() in a debugger, for example.
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 | llvm/lib/Transforms/Vectorize/VPlan.cpp |
Commit
a5b484c4d41a7452b590a2c1c98dc31f43d3dc1a
by grimar[obj2yaml][test] - Improve and fix section-group.yaml test.
It has multiple issues fixed by this patch: 1) It shouldn't test how llvm-readelf/yaml2obj works. 2) It should use "-NEXT" prefix for check lines. 3) It can use YAML macros, that allows to use a single YAML. 4) It should probably test the case when a group member is a null section.
Differential revision: https://reviews.llvm.org/D93753
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 | llvm/test/tools/obj2yaml/ELF/section-group.yaml |
Commit
d36e879c21c9620c9b6a1a8f45afe46379142d2f
by pavel[lldb] Disable PipeTest.OpenAsReader on windows
This test seems to be broken there (which is not totally surprising as this functionality was never used on windows). Disable the test while I investigate.
|
 | lldb/unittests/Host/PipeTest.cpp |
Commit
8112a2598ce180ab4cd106f154a71e813fc28d91
by llvm-dev[X86][SSE] Add 'vectorized sum' test patterns
These are often generated when building a vector from the reduction sums of independent vectors.
I've implemented some typical patterns from various v4f32/v4i32 based off current codegen emitted from the vectorizers, although these tests are more about tweaking some hadd style backend folds to handle whatever the vectorizers/vectorcombine throws at us...
|
 | llvm/test/CodeGen/X86/horizontal-sum.ll |
Commit
2e17d9c0ee7a0ba2aff7dd449005e4d0fd10fe57
by herhut[ARM] Add uses for locals introduced for debug messages. NFC.
This adds uses for locals introduced for new debug messages for the load store optimizer. Those locals are only used on debug statements and otherwise create unused variable warnings.
Differential Revision: https://reviews.llvm.org/D94398
|
 | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp |
Commit
6dcf9207df11f5cdb0126e5c5632e93532642ed9
by jay.foad[AMDGPU] Fix a urem combine test to test what it was supposed to
|
 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir |
Commit
4fe7b16ae3f48a36967e58ab753381cb34295962
by csigg[mlir] Remove unnecessary llvm.mlir.cast in AsyncToLLVM lowering.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D94400
|
 | mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp |
Commit
4c372a35cd892c0847da45540057447633a31d99
by csigg[mlir] Make GpuAsyncRegion pass depend on async dialect.
Do not cache gpu.async.token type so that the pass can be created before the GPU dialect is registered.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D94397
|
 | mlir/lib/Dialect/GPU/Transforms/PassDetail.h |
 | mlir/lib/Dialect/GPU/Transforms/AsyncRegionRewriter.cpp |
 | mlir/include/mlir/Dialect/GPU/Passes.td |
Commit
8298ec2d6299a95d2920cb8ee993ac6c5e604097
by andrzej.warzynski[flang][driver] Copy input files into a temp dir when testing
The following frontend driver invocation will generate 2 output files in the same directory as the input files: ``` flang-new -fc1 input-1.f input-2.f ``` This is the desired behaviour. However, when testing we need to make sure that we don't pollute the source directory. To this end, copy test input files into a temporary directory.
Differential Revision: https://reviews.llvm.org/D94243
|
 | flang/test/Frontend/multiple-input-files.f90 |
Commit
df86f15f0c53c395dac5a14aba08745bc12b9b9b
by antiagainst[mlir][linalg] Support parsing attributes in named op spec
With this, now we can specify a list of attributes on named ops generated from the spec. The format is defined as
``` attr-id ::= bare-id (`?`)? attr-typedef ::= type (`[` `]`)? attr-def ::= attr-id `:` attr-typedef
tc-attr-def ::= `attr` `(` attr-def-list `)` tc-def ::= `def` bare-id `(`tensor-def-list`)` `->` `(` tensor-def-list`)` (tc-attr-def)? ```
For example,
``` ods_def<SomeCppOp> def some_op(...) -> (...) attr( f32_attr: f32, i32_attr: i32, array_attr : f32[], optional_attr? : f32 ) ```
where `?` means optional attribute and `[]` means array type.
Reviewed By: hanchung, nicolasvasilache
Differential Revision: https://reviews.llvm.org/D94240
|
 | mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc |
 | mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp |
Commit
55225471d9838e452cfb31e0edae6162b7226221
by antiagainst[mlir][linalg] Support permutation when lowering to loop nests
Linalg ops are perfect loop nests. When materializing the concrete loop nest, the default order specified by the Linalg op's iterators may not be the best for further CodeGen: targets frequently need to plan the loop order in order to gain better data access. And different targets can have different preferences. So there should exist a way to control the order.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D91795
|
 | mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h |
 | mlir/lib/Dialect/Linalg/Transforms/Loops.cpp |
 | mlir/include/mlir/Dialect/Linalg/Passes.td |
 | mlir/test/Dialect/Linalg/loop-order.mlir |
Commit
007358239decd45819a6fa44eb2a2e07fd85e796
by joe.ellis[DAGCombiner] Use getVectorElementCount inside visitINSERT_SUBVECTOR
This avoids TypeSize-/ElementCount-related warnings.
Differential Revision: https://reviews.llvm.org/D92747
|
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll |
Commit
c163aae45ef6b7f3bd99601195d3ce4aad5850c6
by Artem Dergachev[attributes] Add a facility for enforcing a Trusted Computing Base.
Introduce a function attribute 'enforce_tcb' that prevents the function from calling other functions without the same attribute. This allows isolating code that's considered to be somehow privileged so that it could not use its privileges to exhibit arbitrary behavior.
Introduce an on-by-default warning '-Wtcb-enforcement' that warns about violations of the above rule.
Introduce a function attribute 'enforce_tcb_leaf' that suppresses the new warning within the function it is attached to. Such leaf functions may implement common functionality between the trusted and the untrusted code but they require extra careful audit with respect to their capabilities.
Differential Revision: https://reviews.llvm.org/D91898
|
 | clang/test/Sema/attr-enforce-tcb.c |
 | clang/lib/Sema/SemaChecking.cpp |
 | clang/test/Sema/attr-enforce-tcb.cpp |
 | clang/include/clang/Basic/AttrDocs.td |
 | clang/lib/Sema/SemaDecl.cpp |
 | clang/test/Sema/attr-enforce-tcb-errors.cpp |
 | clang/include/clang/Basic/Attr.td |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/include/clang/Sema/Sema.h |
 | clang/lib/Sema/SemaDeclAttr.cpp |
Commit
eb0371e403a67fdb580e24b9911107bfc9a828b3
by flo[VPlan] Unify value/recipe printing after VPDef transition.
This patch unifies the way recipes and VPValues are printed after the transition to VPDef.
VPSlotTracker has been updated to iterate over all recipes and all their defined values to number those. There is no need to number values in Value2VPValue.
It also updates a few places that only used slot numbers for VPInstruction. All recipes now can produce numbered VPValues.
|
 | llvm/lib/Transforms/Vectorize/VPlanValue.h |
 | llvm/unittests/Transforms/Vectorize/VPlanTest.cpp |
 | llvm/lib/Transforms/Vectorize/VPlan.h |
 | llvm/lib/Transforms/Vectorize/VPlan.cpp |
 | llvm/test/Transforms/LoopVectorize/vplan-printing.ll |
 | llvm/lib/Transforms/Vectorize/VPlanSLP.cpp |
Commit
419ef38a50293c58078f830517f5e305068dbee6
by thakisRevert "[attributes] Add a facility for enforcing a Trusted Computing Base."
This reverts commit c163aae45ef6b7f3bd99601195d3ce4aad5850c6. Doesn't compile on some bots (http://lab.llvm.org:8011/#/builders/98/builds/3387/steps/9/logs/stdio), breaks tests on bots where it does compile (http://45.33.8.238/linux/36843/step_7.txt).
|
 | clang/test/Sema/attr-enforce-tcb.c |
 | clang/test/Sema/attr-enforce-tcb.cpp |
 | clang/test/Sema/attr-enforce-tcb-errors.cpp |
 | clang/include/clang/Basic/Attr.td |
 | clang/include/clang/Sema/Sema.h |
 | clang/lib/Sema/SemaChecking.cpp |
 | clang/lib/Sema/SemaDeclAttr.cpp |
 | clang/lib/Sema/SemaDecl.cpp |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/include/clang/Basic/AttrDocs.td |
Commit
d59ddba777251c59a667d03021900c72f9882a4b
by csigg[mlir] Fix gpu-to-llvm lowering for gpu.alloc with dynamic sizes.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D94402
|
 | mlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp |
 | mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp |
 | mlir/test/Conversion/GPUCommon/lower-alloc-to-gpu-runtime-calls.mlir |
 | mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp |
 | mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h |
Commit
a46982a25511bd0da82f3f2637912dfd86042929
by llvm-dev[X86] Add nounwind to lzcnt-cmp tests
Remove unnecessary cfi markup
|
 | llvm/test/CodeGen/X86/lzcnt-cmp.ll |
Commit
a0f82749f4f3373ba85de40c69b866081f77abce
by llvm-dev[X86] Extend lzcnt-cmp tests to test on non-lzcnt targets
|
 | llvm/test/CodeGen/X86/lzcnt-cmp.ll |
Commit
dbd5fa1e75d812ab31b1d71b23f506c2cbc7a93d
by ranjeet.singh[ARM] Update existing test case with +pauth targets
Differential Revision: https://reviews.llvm.org/D94414
|
 | llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt |
Commit
a2dbf3443af79426c80e8a808821236c5a2b305e
by hokein.wu[clangd] Fix -check mode doesn't respect any tidy configs.
Differential Revision: https://reviews.llvm.org/D94411
|
 | clang-tools-extra/clangd/tool/Check.cpp |
Commit
975170551283559ebe5052b6f83b2cc9e50132db
by georgakoudis1[OpenMPOpt][WIP] Expand parallel region merging
The existing implementation of parallel region merging applies only to consecutive parallel regions that have speculatable sequential instructions in-between. This patch lifts this limitation to expand merging with any sequential instructions in-between, except calls to unmergable OpenMP runtime functions. In-between sequential instructions in the merged region are sequentialized in a "master" region and any output values are broadcasted to the following parallel regions and the sequential region continuation of the merged region.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D90909
|
 | llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp |
 | llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h |
 | llvm/lib/Transforms/IPO/OpenMPOpt.cpp |
 | llvm/test/Transforms/OpenMP/parallel_region_merging.ll |
Commit
31732e6f52c8e5e722d3e4cca053db793dae3b8c
by n.james93[clangd] Remove ScratchFS from tests
This can lead to issues if files in the tmp directory we don't care about / control are found. This was partially addressed in D94321, but this is a more permanent fix. Fixes https://github.com/clangd/clangd/issues/354
Reviewed By: adamcz, sammccall
Differential Revision: https://reviews.llvm.org/D94359
|
 | clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp |
Commit
e5eb5c8a7f30ddb01b7e00a010714ac9711f29de
by paul.robinsonNFC: Use -LABEL more
There were a number of tests needing updates for D91734, and I added a bunch of LABEL directives to help track down where those had to go. These directives are an improvement independent of the functional patch, so I'm committing them as their own separate patch.
|
 | llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel.ll |
 | llvm/test/CodeGen/ARM/fast-isel-call.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll |
 | llvm/test/CodeGen/ARM/fast-isel-select.ll |
 | llvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll |
 | llvm/test/CodeGen/AArch64/elf-globals-static.ll |
Commit
c161775decddcc86fbbfefd7485a5d0ef5842aec
by paul.robinson[FastISel] Flush local value map on every instruction
Local values are constants or addresses that can't be folded into the instruction that uses them. FastISel materializes these in a "local value" area that always dominates the current insertion point, to try to avoid materializing these values more than once (per block).
https://reviews.llvm.org/D43093 added code to sink these local value instructions to their first use, which has two beneficial effects. One, it is likely to avoid some unnecessary spills and reloads; two, it allows us to attach the debug location of the user to the local value instruction. The latter effect can improve the debugging experience for debuggers with a "set next statement" feature, such as the Visual Studio debugger and PS4 debugger, because instructions to set up constants for a given statement will be associated with the appropriate source line.
There are also some constants (primarily addresses) that could be produced by no-op casts or GEP instructions; the main difference from "local value" instructions is that these are values from separate IR instructions, and therefore could have multiple users across multiple basic blocks. D43093 avoided sinking these, even though they were emitted to the same "local value" area as the other instructions. The patch comment for D43093 states:
Local values may also be used by no-op casts, which adds the register to the RegFixups table. Without reversing the RegFixups map direction, we don't have enough information to sink these instructions.
This patch undoes most of D43093, and instead flushes the local value map after(*) every IR instruction, using that instruction's debug location. This avoids sometimes incorrect locations used previously, and emits instructions in a more natural order.
In addition, constants materialized due to PHI instructions are not assigned a debug location immediately; instead, when the local value map is flushed, if the first local value instruction has no debug location, it is given the same location as the first non-local-value-map instruction. This prevents PHIs from introducing unattributed instructions, which would either be implicitly attributed to the location for the preceding IR instruction, or given line 0 if they are at the beginning of a machine basic block. Neither of those consequences is good for debugging.
This does mean materialized values are not re-used across IR instruction boundaries; however, only about 5% of those values were reused in an experimental self-build of clang.
(*) Actually, just prior to the next instruction. It seems like it would be cleaner the other way, but I was having trouble getting that to work.
This reapplies commits cf1c774d and dc35368c, and adds the modification to PHI handling, which should avoid problems with debugging under gdb.
Differential Revision: https://reviews.llvm.org/D91734
|
 | llvm/test/CodeGen/X86/membarrier.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel.ll |
 | llvm/test/CodeGen/PowerPC/mcm-6.ll |
 | llvm/test/CodeGen/ARM/fast-isel-ldr-str-thumb-neg-index.ll |
 | llvm/test/CodeGen/X86/crash-O0.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll |
 | llvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll |
 | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp |
 | llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll |
 | llvm/test/CodeGen/X86/fast-isel-mem.ll |
 | llvm/test/CodeGen/ARM/fast-isel-select.ll |
 | lldb/test/Shell/SymbolFile/NativePDB/disassembly.cpp |
 | llvm/test/DebugInfo/COFF/lines-bb-start.ll |
 | llvm/test/CodeGen/X86/pr44749.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll |
 | llvm/test/CodeGen/X86/pr32340.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll |
 | llvm/test/DebugInfo/Mips/delay-slot.ll |
 | llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll |
 | llvm/test/CodeGen/X86/fast-isel-constant.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/shftopm.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/icmpa.ll |
 | llvm/test/CodeGen/X86/lvi-hardening-loads.ll |
 | llvm/test/CodeGen/X86/atomic64.ll |
 | llvm/test/CodeGen/X86/volatile.ll |
 | llvm/test/CodeGen/PowerPC/mcm-9.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll |
 | llvm/test/CodeGen/PowerPC/mcm-3.ll |
 | llvm/test/CodeGen/X86/pr32256.ll |
 | llvm/test/CodeGen/PowerPC/mcm-1.ll |
 | lld/test/wasm/debug-removed-fn.ll |
 | llvm/test/CodeGen/X86/pr32241.ll |
 | lldb/test/Shell/SymbolFile/NativePDB/load-pdb.cpp |
 | llvm/test/CodeGen/PowerPC/mcm-13.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll |
 | llvm/test/CodeGen/X86/fast-isel-prolog-dbgloc.ll |
 | llvm/test/CodeGen/X86/pr32284.ll |
 | llvm/test/CodeGen/AArch64/arm64-abi_align.ll |
 | llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll |
 | llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll |
 | llvm/include/llvm/CodeGen/FastISel.h |
 | llvm/test/DebugInfo/X86/fission-ranges.ll |
 | llvm/test/CodeGen/PowerPC/mcm-default.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll |
 | llvm/test/CodeGen/X86/atomic-unordered.ll |
 | llvm/test/CodeGen/PowerPC/mcm-2.ll |
 | llvm/test/CodeGen/ARM/fast-isel-call.ll |
 | llvm/test/CodeGen/X86/fast-isel-select.ll |
 | llvm/test/CodeGen/AArch64/elf-globals-static.ll |
 | llvm/test/CodeGen/ARM/fast-isel.ll |
 | llvm/test/CodeGen/AArch64/cfguard-checks.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll |
 | llvm/test/CodeGen/PowerPC/elf-common.ll |
 | llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/overflt.ll |
 | llvm/test/CodeGen/AArch64/large-stack.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll |
Commit
4214ca96145c9487407925b121b85fafb1179209
by llvm-dev[X86][AVX] Attempt to fold vpermf128(op(x,i),op(y,i)) -> op(vpermf128(x,y),i)
If vpermf128/vpermi128 is acting on 2 similar 'inlane' ops, then try to perform the vpermf128 first which will allow us to merge the ops.
This will help us fix one of the regressions in D56387
|
 | llvm/test/CodeGen/X86/vector-trunc.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
9c0dc0b2c1cc973056237bdd80dbba749941ea63
by ravishankarm[mlir][Linalg] Fold init_tensor -> linalg.tensor_reshape.
Reshaping an init_tensor can be folded to a init_tensor op of the final type.
Differential Revision: https://reviews.llvm.org/D93773
|
 | mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp |
 | mlir/test/Dialect/Linalg/canonicalize.mlir |
Commit
c15b0e2229ea04d1c36fafaa1f717f433a995e9a
by scott.linder[Clang][Docs] Fix ambiguity in clang-offload-bundler docs
Differential Revision: https://reviews.llvm.org/D94338
|
 | clang/docs/ClangOffloadBundler.rst |
Commit
7200d2cf0891ef56607fd0336029b33bd4097eed
by mtrofin[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
Also removed where applicable.
Differential Revision: https://reviews.llvm.org/D94385
|
 | llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllgeull.ll |
 | llvm/test/CodeGen/PowerPC/testComparesileui.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllgeui.ll |
 | llvm/test/CodeGen/PowerPC/urem-lkk.ll |
 | llvm/test/CodeGen/PowerPC/testComparesiltui.ll |
 | llvm/test/CodeGen/PowerPC/testComparesigeuc.ll |
 | llvm/test/CodeGen/PowerPC/testComparesiltsll.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllleull.ll |
 | llvm/test/CodeGen/PowerPC/srem-lkk.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllgeus.ll |
 | llvm/test/CodeGen/PowerPC/testComparesigeui.ll |
 | llvm/test/CodeGen/PowerPC/testComparesileuc.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllleui.ll |
 | llvm/test/CodeGen/PowerPC/lower-massv.ll |
 | llvm/test/CodeGen/PowerPC/testComparesileus.ll |
 | llvm/test/CodeGen/PowerPC/testComparesiltuc.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllgeuc.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllltsll.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllleuc.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllltus.ll |
 | llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllleus.ll |
 | llvm/test/CodeGen/PowerPC/ppc32-pic.ll |
 | llvm/test/CodeGen/PowerPC/testComparesllltuc.ll |
 | llvm/test/CodeGen/PowerPC/vmladduhm.ll |
 | llvm/test/CodeGen/PowerPC/testComparesiltus.ll |
 | llvm/test/CodeGen/PowerPC/vec_splat.ll |
 | llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll |
 | llvm/test/CodeGen/PowerPC/testComparesigeus.ll |
 | llvm/test/CodeGen/PowerPC/testComparesileull.ll |
 | llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll |
 | llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll |
 | llvm/test/CodeGen/PowerPC/testComparesigeull.ll |
 | llvm/test/CodeGen/PowerPC/testComparesiltss.ll |
 | llvm/test/CodeGen/PowerPC/testComparesiltsc.ll |
 | llvm/test/CodeGen/PowerPC/lit.local.cfg |
 | llvm/test/CodeGen/PowerPC/popcnt-zext.ll |
 | llvm/test/CodeGen/PowerPC/testComparesiltsi.ll |
Commit
3d693bd0bd77fe6f0dd922be374b7ba74739871a
by thomasraoux[mlir][vector] Add memory effects to transfer_read transfer_write ops
This allow more accurate modeling of the side effects and allow dead code elimination to remove dead transfer ops.
Differential Revision: https://reviews.llvm.org/D94318
|
 | mlir/include/mlir/Dialect/Vector/VectorOps.td |
 | mlir/lib/Dialect/Vector/VectorOps.cpp |
 | mlir/test/Dialect/Vector/canonicalize.mlir |
 | mlir/test/Conversion/VectorToSCF/vector-to-loops.mlir |
Commit
c4486cfd556869a837911c7719fb6c36018bbd1f
by ravishankarm[mlir][Linalg] Fix reshape fusion to reshape the outs instead of creating new tensors.
When fusing tensor_reshape ops with generic/indexed_Generic op, new linalg.init_tensor operations were created for the `outs` of the fused op. While correct (technically) it is better to just reshape the original `outs` operands and rely on canonicalization of init_tensor -> tensor_reshape to achieve the same effect.
Differential Revision: https://reviews.llvm.org/D93774
|
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
 | mlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp |
 | mlir/test/Dialect/Linalg/reshape_fusion.mlir |
 | mlir/test/Dialect/Linalg/reshape_linearization_fusion.mlir |
Commit
be179b9946f6dfd6e3d957d9f7a6ee992d1f69d2
by paul.robinson[FastISel] NFC: Remove obsolete -fast-isel-sink-local-values option
This option is not used for anything after #c161665 (D91737). This commit reapplies #a474657.
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 | llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll |
 | llvm/test/CodeGen/X86/pr32241.ll |
 | llvm/test/CodeGen/X86/pr32340.ll |
 | llvm/test/DebugInfo/X86/prologue-stack.ll |
 | llvm/test/CodeGen/X86/inreg.ll |
 | llvm/test/CodeGen/X86/fast-isel-call-cleanup.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll |
 | llvm/test/CodeGen/ARM/fast-isel-select.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel.ll |
 | llvm/test/CodeGen/ARM/fast-isel-call.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll |
 | llvm/test/CodeGen/X86/sink-local-value.ll |
 | llvm/test/CodeGen/AArch64/swifterror.ll |
 | llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll |
 | llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll |
 | llvm/test/CodeGen/X86/pr32284.ll |
 | llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll |
 | llvm/test/CodeGen/AArch64/arm64-abi_align.ll |
 | llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll |
 | llvm/test/CodeGen/X86/pr32345.ll |
 | llvm/test/CodeGen/ARM/fast-isel-vararg.ll |
 | llvm/test/DebugInfo/Mips/delay-slot.ll |
 | llvm/test/CodeGen/ARM/swifterror.ll |
 | llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll |
 | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp |
 | llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll |
 | llvm/test/CodeGen/X86/pr32484.ll |
 | llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll |
Commit
ac2224c02282039f41294842396cbbe47ea29a23
by i[ELF] --exclude-libs: localize defined libcall symbols referenced by lto.tmp
Fixes PR48681: after LTO, lto.tmp may reference a libcall symbol not in an IR symbol table of any bitcode file. If such a symbol is defined in an archive matched by a --exclude-libs, we don't correctly localize the symbol.
Add another `excludeLibs` after `compileBitcodeFiles` to localize such libcall symbols. Unfortunately we have keep the existing one for D43126.
Using VER_NDX_LOCAL is an implementation detail of `--exclude-libs`, it does not necessarily tie to the "localize" behavior. `local:` patterns in a version script can be omitted. The `symbol ... has undefined version ...` error should not be exempted. Ideally we should error as GNU ld does. https://issuetracker.google.com/issues/73020933
Reviewed By: psmith
Differential Revision: https://reviews.llvm.org/D94280
|
 | lld/ELF/Driver.cpp |
 | lld/test/ELF/lto/exclude-libs-libcall.ll |
Commit
171771e0780fd5d028a24f8650a11299478df266
by paulsson[SystemZ] Minor NFC fix in SchedModels.
The unused LRMux opcode was removed by 8f8c381, but a regexp still matched for it in the scheduler files which is now removed.
Review: Ulrich Weigand
|
 | llvm/lib/Target/SystemZ/SystemZScheduleZ15.td |
 | llvm/lib/Target/SystemZ/SystemZScheduleZ196.td |
 | llvm/lib/Target/SystemZ/SystemZScheduleZ13.td |
 | llvm/lib/Target/SystemZ/SystemZScheduleZ14.td |
 | llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td |
Commit
1f9c29228cecfde9e993cd2818d9cd3119189163
by paul.robinson[FastISel] NFC: Clean up unnecessary bookkeeping
Now that we flush the local value map for every instruction, we don't need any extra flushes for specific cases. Also, LastFlushPoint is not used for anything. Follow-ups to #c161665 (D91734).
This reapplies #3fd39d3.
Differential Revision: https://reviews.llvm.org/D92338
|
 | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp |
 | llvm/include/llvm/CodeGen/FastISel.h |
Commit
072714b961980af720440bf286f7cc4a1746e929
by llvm-dev[X86] Regenerate vector-constrained-fp-intrinsics.ll tests
Adding missing libcall PLT qualifier
|
 | llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll |
Commit
35c9baa11e4be6ae570674eec2de8bd928639b18
by Artem Dergachev[attributes] Add a facility for enforcing a Trusted Computing Base.
Introduce a function attribute 'enforce_tcb' that prevents the function from calling other functions without the same attribute. This allows isolating code that's considered to be somehow privileged so that it could not use its privileges to exhibit arbitrary behavior.
Introduce an on-by-default warning '-Wtcb-enforcement' that warns about violations of the above rule.
Introduce a function attribute 'enforce_tcb_leaf' that suppresses the new warning within the function it is attached to. Such leaf functions may implement common functionality between the trusted and the untrusted code but they require extra careful audit with respect to their capabilities.
Fixes after a revert in 419ef38a50293c58078f830517f5e305068dbee6: Fix a test. Add workaround for GCC bug (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67274). Attribute the patch appropriately!
Differential Revision: https://reviews.llvm.org/D91898
|
 | clang/test/Misc/pragma-attribute-supported-attributes-list.test |
 | clang/include/clang/Sema/Sema.h |
 | clang/include/clang/Basic/AttrDocs.td |
 | clang/test/Sema/attr-enforce-tcb-errors.cpp |
 | clang/test/Sema/attr-enforce-tcb.c |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/lib/Sema/SemaDeclAttr.cpp |
 | clang/lib/Sema/SemaDecl.cpp |
 | clang/include/clang/Basic/Attr.td |
 | clang/test/Sema/attr-enforce-tcb.cpp |
 | clang/lib/Sema/SemaChecking.cpp |
Commit
a90214760d0414912953e77b5b314be2b8e7df77
by kparzysz[Hexagon] Custom-widen SETCC's operands
The result cannot be widened, unfortunately, because widening vNi1 would depend on the context in which it appears (i.e. the type alone is not sufficient to tell if it needs to be widened).
|
 | llvm/lib/Target/Hexagon/HexagonISelLowering.h |
 | llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp |
 | llvm/test/CodeGen/Hexagon/autohvx/widen-setcc.ll |
Commit
bcec0f27a2c37b64d5e8b84bbbfa563edae6affe
by Joseph.Nash[AMDGPU] Deduplicate VOP tablegen asm & ins
VOP3 and VOP DPP subroutines to generate input operands and asm strings were essentially copy pasted several times. They are deduplicated to reduce the maintenance burden and allow faster development.
Reviewed By: dp
Differential Revision: https://reviews.llvm.org/D94102
Change-Id: I76225eed3c33239d9573351e0c8a0abfad0146ea
|
 | llvm/lib/Target/AMDGPU/VOP3Instructions.td |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.td |
Commit
74628c43053b482f35f0f1e6b4eac743fbe425e5
by zinenko[mlir] Add Python bindings for AffineExpr
This adds the Python bindings for AffineExpr and a couple of utility functions to the C API. AffineExpr is a top-level context-owned object and is modeled similarly to attributes and types. It is required, e.g., to build layout maps of the built-in memref type.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D94225
|
 | mlir/include/mlir-c/AffineExpr.h |
 | mlir/lib/CAPI/IR/AffineExpr.cpp |
 | mlir/test/Bindings/Python/ir_affine_expr.py |
 | mlir/test/CAPI/ir.c |
 | mlir/lib/Bindings/Python/IRModules.h |
 | mlir/lib/Bindings/Python/IRModules.cpp |
 | mlir/include/mlir-c/Bindings/Python/Interop.h |
Commit
e79bd0b4f25e68130a2ac273d6508ea322028b61
by zinenko[mlir] More Python bindings for AffineMap
Now that the bindings for AffineExpr have been added, add more bindings for constructing and inspecting AffineMap that consists of AffineExprs.
Depends On D94225
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D94297
|
 | mlir/include/mlir-c/AffineExpr.h |
 | mlir/test/Bindings/Python/ir_affine_map.py |
 | mlir/test/CAPI/ir.c |
 | mlir/lib/CAPI/IR/AffineMap.cpp |
 | mlir/lib/Bindings/Python/IRModules.cpp |
 | mlir/include/mlir-c/AffineMap.h |
Commit
547e3eef14a8e75a867dfcc6b45cd1f0547d4e07
by zinenko[mlir] Expose MemRef layout in Python bindings
This wasn't possible before because there was no support for affine expressions as maps. Now that this support is available, provide the mechanism for constructing maps with a layout and inspecting it.
Rework the `get` method on MemRefType in Python to avoid needing an explicit memory space or layout map. Remove the `get_num_maps`, it is too low-level, using the length of the now-avaiable pseudo-list of layout maps is more pythonic.
Depends On D94297
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D94302
|
 | mlir/test/Bindings/Python/ir_types.py |
 | mlir/include/mlir-c/BuiltinTypes.h |
 | mlir/lib/Bindings/Python/IRModules.cpp |
 | mlir/lib/CAPI/IR/BuiltinTypes.cpp |
Commit
47567ca5faca147bcc28bcbbaa6bf448354bb5d4
by clementval[flang][openxx][NFC] Remove duplicated function to check required clauses
Remove duplicated function to check for required clauses on a directive. This was still there from the merging of OpenACC and OpenMP common semantic checks and it can now be removed so we use only one function.
Reviewed By: sameeranjoshi
Differential Revision: https://reviews.llvm.org/D93575
|
 | flang/lib/Semantics/check-directive-structure.h |
 | flang/test/Semantics/omp-device-constructs.f90 |
 | flang/lib/Semantics/check-omp-structure.cpp |
Commit
d8c6d24359f17c55a8966231ef74e8f4b03ad282
by tmsriram-funique-internal-linkage-names appends a hex md5hash suffix to the symbol name which is not demangler friendly, convert it to decimal.
Please see D93747 for more context which tries to make linkage names of internal linkage functions to be the uniqueified names. This causes a problem with gdb because breaking using the demangled function name will not work if the new uniqueified name cannot be demangled. The problem is the generated suffix which is a mix of integers and letters which do not demangle. The demangler accepts either all numbers or all letters. This patch simply converts the hash to decimal.
There is no loss of uniqueness by doing this as the precision is maintained. The symbol names get longer by a few characters though.
Differential Revision: https://reviews.llvm.org/D94154
|
 | clang/test/CodeGen/unique-internal-linkage-names.cpp |
 | llvm/test/Transforms/UniqueInternalLinkageNames/unique_symbol_names.ll |
 | llvm/lib/Transforms/Utils/UniqueInternalLinkageNames.cpp |
Commit
43a830ed94180f72533263bb1c40af29510c017a
by schmeiseIntroduce new quiet mode and new option handling for -print-changed. Summary: Introduce a new mode of operation for -print-changed that only reports after a pass changes the IR with all of the other messages suppressed (ie, no initial IR and no messages about ignored, filtered or non-modifying passes).
The option processing for -print-changed is changed to take an optional string indicating options for print-changed. Initially, the only option supported is quiet (as described above). This new quiet mode is specified with -print-changed=quiet while -print-changed will continue to function in the same way. It is intended that there will be more options in the future.
Author: Jamie Schmeiser <schmeise@ca.ibm.com> Reviewed By: aeubanks (Arthur Eubanks) Differential Revision: https://reviews.llvm.org/D92589
|
 | llvm/lib/Passes/StandardInstrumentations.cpp |
 | llvm/test/Other/change-printer.ll |
 | llvm/include/llvm/Passes/StandardInstrumentations.h |
Commit
5464baaae8c19997c5b0b76930d2b5ee13f68dfa
by rnkFix minor build issue (NFC)
Change [x86] Fix tile register spill issue was causing problems for our build using gcc-5.4.1
The problem was caused by this line:
for (const MachineInstr &MI : make_range(MIS.begin(), MI))
where MI was previously defined as a MachineBasicBlock iterator.
Differential Revision: https://reviews.llvm.org/D94415
|
 | llvm/lib/CodeGen/InlineSpiller.cpp |
Commit
1027a22ccd72bb127253cf7d27f528712fa21fa0
by Abhina.Sreeskantharajan[SystemZ][z/OS] Fix Permission denied pattern matching
On z/OS, the error message "EDC5111I Permission denied." is not matched correctly in lit tests. This patch updates the check expression to match successfully.
Reviewed By: fanbo-meng
Differential Revision: https://reviews.llvm.org/D94432
|
 | llvm/test/tools/llvm-elfabi/fail-file-write.test |
Commit
195728c75aa41d80254175c5d7ac2f881333b139
by csigg[mlir] Add structural conversion to async dialect lowering.
Lowering of async dialect uses a fixed type converter and therefore does not support lowering non-standard types.
This revision adds a structural conversion so that non-standard types in `!async.value`s can be lowered to LLVM before lowering the async dialect itself.
Reviewed By: ezhulenev
Differential Revision: https://reviews.llvm.org/D94404
|
 | mlir/include/mlir/Conversion/AsyncToLLVM/AsyncToLLVM.h |
 | mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp |
Commit
37b41bd0879e8ed1a07a6fc401a2b56dcd6f124c
by fraser[RISCV] Add scalable vector fcmp ISel patterns
Original patch by @rogfer01.
All ordered comparisons except ONE are supported natively, and all unordered comparisons except UNE are expanded into sequences involving explicit NaN checks and mask arithmetic.
Additionally, we expand GT,OGT,GE,OGE to their swapped-operand versions, and pattern-match those back to the "original", swapping operands once more. This way we catch both operations and both "vf" and "fv" forms with fewer patterns.
Also add support for floating-point splat_vector, with an optimization for splatting fpimm0.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by: Fraser Cormack <fraser@codeplay.com>
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D94242
|
 | llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |
 | llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll |
 | llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll |
Commit
30a7d430e869bb0d8c61ef9999a04f56e4dd2377
by marek.kurdej[libc++] Turn off auto-formatting of generated files. NFC.
This adds `// clang-format off` in the auto-generated file to avoid lint warnings.
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D94410
|
 | libcxx/test/std/language.support/support.limits/support.limits.general/span.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/locale.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/map.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/list.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/numeric.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/cmath.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/shared_mutex.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/any.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/complex.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/execution.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/istream.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/thread.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/type_traits.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/unordered_map.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/tuple.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/chrono.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/latch.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/exception.version.pass.cpp |
 | libcxx/utils/generate_feature_test_macro_components.py |
 | libcxx/test/std/language.support/support.limits/support.limits.general/utility.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/regex.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/iomanip.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/optional.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/ostream.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/mutex.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/barrier.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/filesystem.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/atomic.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/vector.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/string_view.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/iterator.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/unordered_set.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/variant.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/concepts.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/new.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/numbers.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/string.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/array.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/forward_list.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/limits.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/functional.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/deque.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/scoped_allocator.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/cstddef.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/bit.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/semaphore.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/compare.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/set.version.pass.cpp |
Commit
72f1f084670ed66362ecb7c4079ee372665ce842
by Tony.Tye[NFC][AMDGPU] Clarify memory model support for volatile
Reorder the AMDGPUUage description of the memory model code sequences for volatile so clear that it applies independent of the nontemporal setting.
Differential Revision: https://reviews.llvm.org/D94358
|
 | llvm/docs/AMDGPUUsage.rst |
Commit
207417730134931c7d5bf82e0b16c7757ad05e05
by riddleriver[mlir][ODS] Add a C++ abstraction for OpBuilders
This removes the need for OpDefinitionsGen to use raw tablegen API, and will also simplify adding builders to TypeDefs as well.
Differential Revision: https://reviews.llvm.org/D94273
|
 | mlir/include/mlir/TableGen/Builder.h |
 | mlir/lib/TableGen/Operator.cpp |
 | mlir/lib/TableGen/Builder.cpp |
 | mlir/include/mlir/TableGen/Operator.h |
 | mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp |
 | mlir/lib/TableGen/CMakeLists.txt |
Commit
948be58258dd81d56b1057657193f7dcf6dfa9bd
by riddleriver[mlir][TypeDefGen] Add support for adding builders when generating a TypeDef
This allows for specifying additional get/getChecked methods that should be generated on the type, and acts similarly to how OpBuilders work. TypeBuilders have two additional components though: * InferredContextParam - Bit indicating that the context parameter of a get method is inferred from one of the builder parameters * checkedBody - A code block representing the body of the equivalent getChecked method.
Differential Revision: https://reviews.llvm.org/D94274
|
 | mlir/docs/OpDefinitions.md |
 | mlir/test/lib/Dialect/Test/TestTypes.cpp |
 | mlir/tools/mlir-tblgen/TypeDefGen.cpp |
 | mlir/test/mlir-tblgen/typedefs.td |
 | mlir/include/mlir/IR/OpBase.td |
 | mlir/test/lib/Dialect/Test/TestTypeDefs.td |
 | mlir/include/mlir/TableGen/TypeDef.h |
 | mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td |
 | mlir/lib/TableGen/TypeDef.cpp |
Commit
d79642b3db1d74524f41d37f78385950158787a4
by riddleriver[mlir][IR][NFC] Move the definitions of Complex/Function/Integer/Opaque/TupleType to ODS
The type tablegen backend now has enough support to represent these types well enough, so we can now move them to be declaratively defined.
Differential Revision: https://reviews.llvm.org/D94275
|
 | mlir/include/mlir/IR/BuiltinTypes.h |
 | mlir/lib/IR/BuiltinTypes.cpp |
 | mlir/lib/IR/MLIRContext.cpp |
 | mlir/include/mlir/IR/BuiltinTypes.td |
 | mlir/lib/IR/TypeDetail.h |
Commit
d3ff24cbf87224b23a0c99c74ed50744711909b2
by n.james93[ADT] Add makeIntrusiveRefCnt helper function
Works like std::make_unique but for IntrusiveRefCntPtr objects. See https://lists.llvm.org/pipermail/llvm-dev/2021-January/147729.html
Reviewed By: dblaikie, MaskRay
Differential Revision: https://reviews.llvm.org/D94440
|
 | llvm/unittests/ADT/IntrusiveRefCntPtrTest.cpp |
 | llvm/include/llvm/ADT/IntrusiveRefCntPtr.h |
Commit
8ad998a6115a8cd59a18ebdd5ec65329e42050e7
by Abhina.Sreeskantharajan[tools] Mark output of tools as text if it is really text
This is a continuation of https://reviews.llvm.org/D67696. The following tools also need to set the OF_Text flag correctly.
- llvm-profdata - llvm-link
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D94313
|
 | llvm/tools/llvm-link/llvm-link.cpp |
 | llvm/tools/llvm-profdata/llvm-profdata.cpp |
 | llvm/test/tools/llvm-profdata/instr-remap.test |
 | llvm/test/tools/llvm-profdata/csprof-dump.test |
Commit
05e90cefeb4bc5613b2cadedc2b8e2ecb2ed20ed
by mtrofin[NFC] Disallow unused prefixes under llvm/test/CodeGen
This patch finishes addressing unused prefixes under CodeGen: 2 remaining tests fixed, and then undo-ing the lit.local.cfg changes under various subdirs and moving the policy under CodeGen.
Differential Revision: https://reviews.llvm.org/D94430
|
 | llvm/test/CodeGen/lit.local.cfg |
 | llvm/test/CodeGen/AMDGPU/lit.local.cfg |
 | llvm/test/CodeGen/ARM/speculation-hardening-sls.ll |
 | llvm/test/CodeGen/PowerPC/lit.local.cfg |
 | llvm/test/CodeGen/NVPTX/f16-instructions.ll |
 | llvm/test/CodeGen/X86/lit.local.cfg |
Commit
c1ae378205db72cd80a52b85b8474077d1aa5b15
by thomasraoux[mlir][vector] Add side-effect information to different load/store ops
Differential Revision: https://reviews.llvm.org/D94434
|
 | mlir/include/mlir/Dialect/Vector/VectorOps.td |
 | mlir/test/Dialect/Vector/canonicalize.mlir |
Commit
53c866c286a7ca52bd09c7661d4c532ce5c0def8
by stellaraccidentEnable python bindings for tensor, shape and linalg dialects.
* We've got significant missing features in order to use most of these effectively (i.e. custom builders, region-based builders). * We presently also lack a mechanism for actually registering these dialects but they can be use with contexts that allow unregistered dialects for further prototyping.
Differential Revision: https://reviews.llvm.org/D94368
|
 | mlir/cmake/modules/AddMLIRPythonExtension.cmake |
 | mlir/test/Bindings/Python/CMakeLists.txt |
 | mlir/lib/Bindings/Python/TensorOps.td |
 | mlir/lib/Bindings/Python/LinalgOps.td |
 | mlir/lib/Bindings/Python/ShapeOps.td |
 | mlir/lib/Bindings/Python/CMakeLists.txt |
Commit
cceb1bfcbbc4ee2e9cc56b76a4acc4cd52968791
by stellaraccident[mlir][CAPI] Introduce standard source layout for mlir-c dialect registration.
* Registers a small set of sample dialects. * NFC with respect to existing C-API symbols but some headers have been moved down a level to the Dialect/ sub-directory. * Adds an additional entry point per dialect that is needed for dynamic discovery/loading. * See discussion: https://llvm.discourse.group/t/dialects-and-the-c-api/2306/16
Differential Revision: https://reviews.llvm.org/D94370
|
 | mlir/lib/CAPI/Dialect/Linalg.cpp |
 | mlir/lib/CAPI/Dialect/Tensor.cpp |
 | mlir/include/mlir/CAPI/Registration.h |
 | mlir/include/mlir-c/Dialect/SCF.h |
 | mlir/include/mlir-c/Dialect/Standard.h |
 | mlir/lib/CAPI/Dialect/Shape.cpp |
 | mlir/include/mlir-c/StandardDialect.h |
 | mlir/include/mlir-c/Registration.h |
 | mlir/lib/CAPI/CMakeLists.txt |
 | mlir/lib/CAPI/Standard/CMakeLists.txt |
 | mlir/lib/CAPI/Dialect/SCF.cpp |
 | mlir/test/CAPI/ir.c |
 | mlir/lib/CAPI/Dialect/CMakeLists.txt |
 | mlir/include/mlir-c/Dialect/Shape.h |
 | mlir/lib/CAPI/Dialect/Standard.cpp |
 | mlir/include/mlir-c/Dialect/Linalg.h |
 | mlir/include/mlir-c/Dialect/Tensor.h |
 | mlir/lib/CAPI/Standard/StandardDialect.cpp |
Commit
110775809ad114e190132290657a86b2c292a878
by joker.ephRevert "[mlir][linalg] Support parsing attributes in named op spec"
This reverts commit df86f15f0c53c395dac5a14aba08745bc12b9b9b.
The gcc-5 build was broken by this change:
mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp:1275:77: required from here /usr/include/c++/5/ext/new_allocator.h:120:4: error: no matching function for call to 'std::pair<const std::__cxx11::basic_string<char>, {anonymous}::TCParser::RegisteredAttr>::pair(llvm::StringRef&, {anonymous}::TCParser::RegisteredAttr'
|
 | mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp |
 | mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc |
Commit
288f3fc5dfee0c51fc00fe10a985f93c505073eb
by spatel[InstCombine] reduce icmp(ashr X, C1), C2 to sign-bit test
This is a more basic pattern that we should handle before trying to solve: https://llvm.org/PR48640
There might be a better way to think about this because the pre-condition that I came up with (number of sign bits in the compare constant) misses a potential transform for each of ugt and ult as commented on in the test file.
Tried to model this is in Alive: https://rise4fun.com/Alive/juX1 ...but I couldn't get the ComputeNumSignBits() pre-condition to work as expected, so replaced with leading 0/1 preconditions instead.
Name: ugt Pre: countLeadingZeros(C2) <= C1 && countLeadingOnes(C2) <= C1 %a = ashr %x, C1 %r = icmp ugt i8 %a, C2 => %r = icmp slt i8 %x, 0
Name: ult Pre: countLeadingZeros(C2) <= C1 && countLeadingOnes(C2) <= C1 %a = ashr %x, C1 %r = icmp ult i4 %a, C2 => %r = icmp sgt i4 %x, -1
Also approximated in Alive2: https://alive2.llvm.org/ce/z/u5hCcz https://alive2.llvm.org/ce/z/__szVL
Differential Revision: https://reviews.llvm.org/D94014
|
 | llvm/test/Transforms/InstCombine/icmp-shr.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp |
Commit
32c073acb320db3b22ca76b1e21dd688a70b50e8
by bjorn.a.pettersson[GlobalISel] Map extractelt to G_EXTRACT_VECTOR_ELT
Before this patch there was generic mapping from vector_extract to G_EXTRACT_VECTOR_ELT added in SelectionDAGCompat.td. That mapping is now replaced by a mapping from extractelt instead.
The reasoning is that vector_extract is marked as deprecated, so it is assumed that a majority of targets will use extractelt and not vector_extract (and that the long term solution for all targets would be to use extractelt).
Targets like AArch64 that still use vector_extract can add an additional mapping from the deprecated vector_extract as target specific tablegen definitions. Such a mapping is added for AArch64 in this patch to avoid breaking tests.
When adding the extractelt => G_EXTRACT_VECTOR_ELT mapping we triggered some new code paths in GlobalISelEmitter, ending up in an assert when trying to import a pattern containing EXTRACT_SUBREG for ARM. Therefore this patch also adds a "failedImport" warning for that situation (instead of hitting the assert).
Differential Revision: https://reviews.llvm.org/D93416
|
 | llvm/utils/TableGen/GlobalISelEmitter.cpp |
 | llvm/lib/Target/AArch64/AArch64InstrGISel.td |
 | llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td |
Commit
aefeb5f136e7b72b251ce2881cb39a1fe8f0d76a
by sivachandra[libc][NFC] Make __support/common.h an in tree header.
It was previously a generated header. It can easily converted to a generated header if required in future.
Reviewed By: michaelrj
Differential Revision: https://reviews.llvm.org/D94445
|
 | libc/src/__support/CMakeLists.txt |
 | libc/src/__support/common.h |
 | libc/src/__support/common.h.def |
Commit
9b222b108a2e37eb45d3156ec8554d148d658a8a
by richard[c++20] Don't consider string literal operator templates for numeric literals.
A literal interpretation of the standard wording allows this, but it was never intended that string literal operator templates would be used for anything other than user-defined string literals.
|
 | clang/lib/Sema/SemaLookup.cpp |
 | clang/test/SemaCXX/cxx2a-user-defined-literals.cpp |
Commit
f4cec703ec8452f9d8b04fae171ba459adf38123
by iAdd an assert to CGDebugInfo::getTypeOrNull
|
 | clang/lib/CodeGen/CGDebugInfo.cpp |
Commit
7989684a2e4a496201ff41d31cede764487ca80f
by fraser[RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns
Original patch by @rogfer01.
This patch adds ISel patterns for the above operations to the corresponding vector/vector and vector/scalar RVV instructions, as well as extra patterns to match operand-swapped scalar/vector vfrsub and vfrdiv.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by: Fraser Cormack <fraser@codeplay.com>
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D94408
|
 | llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv64.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv64.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv64.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv32.ll |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |
 | llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv64.ll |
Commit
046612d29d7894783e8fcecbc62ebd6b4a78499f
by ajcbik[mlir][vector] verify memref of vector memory ops
This ensures the memref base + indices expression is well-formed
Reviewed By: ThomasRaoux, ftynse
Differential Revision: https://reviews.llvm.org/D94441
|
 | mlir/test/Dialect/Vector/invalid.mlir |
 | mlir/lib/Dialect/Vector/VectorOps.cpp |
Commit
a808d89d355c98d7475795e13271beb90e9436cb
by nikita.ppv[PredicateInfo] Add test for one unknown condition in and/or (NFC)
Test the case where one part of and/or is an icmp, while the other one is an arbitrary value.
|
 | llvm/test/Transforms/Util/PredicateInfo/testandor.ll |
Commit
00f773cf424699d8eb31591fdc95e0ca18b2682c
by nikita.ppv[SCCP] Fix misclassified conditions in test (NFC)
|
 | llvm/test/Transforms/SCCP/conditions-ranges.ll |
Commit
b88c8f1aab527f1aebe612ab6c50a418bff88584
by iCGDebugInfo: Delete unused parameters
|
 | clang/lib/CodeGen/CGDebugInfo.cpp |
 | clang/lib/CodeGen/CodeGenFunction.cpp |
 | clang/lib/CodeGen/CGDebugInfo.h |
Commit
32bcfcda4e28375e5a85268d2acfabcfcc011abf
by hoyRename debug linkage name with -funique-internal-linkage-names
Functions that are renamed under -funique-internal-linkage-names have their debug linkage name updated as well.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D93747
|
 | llvm/include/llvm/IR/DebugInfoMetadata.h |
 | llvm/test/Transforms/UniqueLinkageNames/unique-internal-linkage-names.ll |
 | llvm/test/Transforms/UniqueInternalLinkageNames/unique-internal-linkage-names.ll |
 | llvm/lib/Transforms/Utils/UniqueInternalLinkageNames.cpp |
Commit
a81c68ae6be58efa24e2573e155d5ef20260399b
by tianshilei1992[OpenMP] Take elf_common.c as a interface library
For now `elf_common.c` is taken as a common part included into different plugin implementations directly via `#include "../../common/elf_common.c"`, which is not a best practice. Since it is simple enough such that we don't need to create a real library for it, we just take it as a interface library so that other targets can link it directly. Another advantage of this method is, we don't need to add the folder into header search path which can potentially pollute the search path.
VE and AMD platforms have not been tested because I don't have target machines.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D94443
|
 | openmp/libomptarget/plugins/common/elf_common.c |
 | openmp/libomptarget/plugins/common/elf_common/elf_common.h |
 | openmp/libomptarget/plugins/common/elf_common/CMakeLists.txt |
 | openmp/libomptarget/plugins/ve/src/rtl.cpp |
 | openmp/libomptarget/plugins/cuda/CMakeLists.txt |
 | openmp/libomptarget/plugins/amdgpu/CMakeLists.txt |
 | openmp/libomptarget/plugins/cuda/src/rtl.cpp |
 | openmp/libomptarget/plugins/CMakeLists.txt |
 | openmp/libomptarget/plugins/common/CMakeLists.txt |
 | openmp/libomptarget/plugins/generic-elf-64bit/src/rtl.cpp |
 | openmp/libomptarget/plugins/ve/CMakeLists.txt |
 | openmp/libomptarget/plugins/amdgpu/src/rtl.cpp |
Commit
9ecc991c559663bd4e3e06a18ba708e0e29c891b
by fraser[RISCV] Add scalable vector vselect ISel patterns
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D94294
|
 | llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |
 | llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vselect-int-rv64.ll |
Commit
0a23fbd28c7509f2f980946091e6055bf27164d2
by ndesaulniersclang: Always pass PowerPC endian information to GNU as
When building a 64-bit big endian PowerPC Linux kernel with a 64-bit little endian PowerPC target, the 32-bit vDSO errors:
``` $ make ARCH=powerpc CC=clang CROSS_COMPILE=powerpc64le-linux-gnu- \ pseries_defconfig arch/powerpc/kernel/vdso32/ ld.lld: error: arch/powerpc/kernel/vdso32/sigtramp.o is incompatible with elf32-powerpc ld.lld: error: arch/powerpc/kernel/vdso32/gettimeofday.o is incompatible with elf32-powerpc ld.lld: error: arch/powerpc/kernel/vdso32/datapage.o is incompatible with elf32-powerpc ld.lld: error: arch/powerpc/kernel/vdso32/cacheflush.o is incompatible with elf32-powerpc ld.lld: error: arch/powerpc/kernel/vdso32/note.o is incompatible with elf32-powerpc ld.lld: error: arch/powerpc/kernel/vdso32/getcpu.o is incompatible with elf32-powerpc ld.lld: error: arch/powerpc/kernel/vdso32/vgettimeofday.o is incompatible with elf32-powerpc ... ```
This happens because the endian information is missing from the call to the assembler, even though it was explicitly passed to clang. See the below example.
``` $ echo | clang --target=powerpc64le-linux-gnu \ --prefix=/usr/bin/powerpc64le-linux-gnu- \ -no-integrated-as -m32 -mbig-endian -### -x c -c - ".../clang-12" "-cc1" "-triple" "powerpc-unknown-linux-gnu" ... ... "/usr/bin/powerpc64le-linux-gnu-as" "-a32" "-mppc" "-many" "-o" "-.o" "/tmp/--e69e28.s" ```
clang sets the right target with -m32 and -mbig-endian but -mbig-endian does not make it to the assembler, resulting in a 32-bit little endian binary. This differs from the little endian targets, which always pass -mlittle-endian.
``` $ echo | clang --target=powerpc64-linux-gnu \ --prefix=/usr/bin/powerpc64-linux-gnu- \ -no-integrated-as -m32 -mlittle-endian -### -x c -c - ".../clang-12" "-cc1" "-triple" "powerpcle-unknown-linux-gnu" ... ... "/usr/bin/powerpc64-linux-gnu-as" "-a32" "-mppc" "-mlittle-endian" "-many" "-o" "-.o" "/tmp/--405dbd.s" ```
Do the same thing for the big endian targets so that there is no more error. This matches GCC's behavior, where -mbig and -mlittle are always passed along to GNU as.
``` $ echo | powerpc64-linux-gcc -### -x c -c - ... .../powerpc64-linux/bin/as -a64 -mpower4 -many -mbig -o -.o /tmp/ccVn7NAm.s ...
$ echo | powerpc64le-linux-gcc -### -x c -c - ... .../powerpc64le-linux/bin/as -a64 -mpower8 -many -mlittle -o -.o /tmp/ccPN9ato.s ... ```
Reviewed By: nickdesaulniers, MaskRay
Differential Revision: https://reviews.llvm.org/D94442
|
 | clang/lib/Driver/ToolChains/Gnu.cpp |
 | clang/test/Driver/ppc-features.cpp |
Commit
762ffc95550c32606e771b630fcab2e521873419
by joker.ephUpdate syntax for tensor and memref types to match parser.
Based on the comments in lib/Parser/TypeParser.cpp on the parseMemRefType and parseTensorType functions.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D94262
|
 | mlir/lib/Parser/TypeParser.cpp |
 | mlir/docs/LangRef.md |
Commit
278a3ea1b27089dbc7060e02f612c8a3bf137bb2
by craig.topper[RISCV] Use vmv.v.i vd, 0 instead of vmv.v.x vd, x0 for llvm.riscv.vfmv.v.f with 0.0
This matches what we use for integer 0. It's also consistent with the scalar 'mv' pseudo that uses addi rather than add with x0.
|
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
 | llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll |
Commit
c22bc5f1f8b295674aa3a62dced8a39ad3d2aa02
by lebedev.ri[SimplifyCFG] SwitchToLookupTable(): don't insert a DomTree edge that already exists
SI is the terminator of BB, so the edge we are adding obviously already existed.
Indeed, this change does not have a test coverage change. This failure has been exposed in an existing test coverage by a follow-up patch that switches to lazy domtreeupdater mode, and removes domtree verification from SimplifyCFGOpt::simplifyOnce()/SimplifyCFGOpt::run(), IOW it does not appear feasible to add dedicated test coverage here.
|
 | llvm/lib/Transforms/Utils/SimplifyCFG.cpp |
Commit
c0de0a1b72c08783141c430b583e04e5107ebc0a
by lebedev.ri[SimplifyCFG] SimplifyBranchOnICmpChain(): don't insert a DomTree edge that already exists
BB was already always branching to EdgeBB, there is no edge to add.
Indeed, this change does not have a test coverage change. This failure has been exposed in an existing test coverage by a follow-up patch that switches to lazy domtreeupdater mode, and removes domtree verification from SimplifyCFGOpt::simplifyOnce()/SimplifyCFGOpt::run(), IOW it does not appear feasible to add dedicated test coverage here.
|
 | llvm/lib/Transforms/Utils/SimplifyCFG.cpp |
Commit
f9ba34770638389ee9b251f6ab801c7411601c77
by lebedev.ri[SimplifyCFG] FoldValueComparisonIntoPredecessors(): don't insert a DomTree edge if it already exists
When we are adding edges to the terminator and potentially turning it into a switch (if it wasn't already), it is possible that the case we're adding will share it's destination with one of the preexisting cases, in which case there is no domtree edge to add.
Indeed, this change does not have a test coverage change. This failure has been exposed in an existing test coverage by a follow-up patch that switches to lazy domtreeupdater mode, and removes domtree verification from SimplifyCFGOpt::simplifyOnce()/SimplifyCFGOpt::run(), IOW it does not appear feasible to add dedicated test coverage here.
|
 | llvm/lib/Transforms/Utils/SimplifyCFG.cpp |
Commit
90a92f8b4d783cb08443a22f0dd2fa3adcb43807
by lebedev.ri[NFCI][Utils/Local] removeUnreachableBlocks(): cleanup support for lazy DomTreeUpdater
When DomTreeUpdater is in lazy update mode, the blocks that were scheduled to be removed, won't be removed until the updates are flushed, e.g. by asking DomTreeUpdater for a up-to-date DomTree.
From the function's current code, it is pretty evident that the support for the lazy mode is an afterthought, see e.g. how we roll-back NumRemoved statistic..
So instead of considering all the unreachable blocks as the blocks-to-be-removed, simply additionally skip all the blocks that are already scheduled to be removed
|
 | llvm/lib/Transforms/Utils/Local.cpp |
Commit
81afeacd379f160495718438d6dd5e9b848a169d
by lebedev.ri[SimplifyCFGPass] mergeEmptyReturnBlocks(): skip blocks scheduled for removal as per DomTreeUpdater
Thus supporting lazy DomTreeUpdater mode, where the domtree updates (and thus block removals) aren't applied immediately, but are delayed until last possible moment.
|
 | llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp |
Commit
ec8a6c11db4102ec249ce90084b3f615c5de15e5
by lebedev.ri[SimplifyCFGPass] iterativelySimplifyCFG(): support lazy DomTreeUpdater
This boils down to how we deal with early-increment iterator over function's basic blocks: not only we need to early-increment, after that we also need to skip all the blocks that are scheduled for removal, as per DomTreeUpdater.
|
 | llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp |
Commit
5ccff5aaa68ab789834c4463ce05b05e57593b34
by Duncan P. N. Exon SmithADT: Fix pointer comparison UB in SmallVector
The standard requires comparisons of pointers to unrelated storage to use `std::less`. Split out some helpers that do that and update all the code that was comparing using `<` and friends (mostly assertions).
Differential Revision: https://reviews.llvm.org/D93777
|
 | llvm/include/llvm/ADT/SmallVector.h |
Commit
7470017f2472411e8e03151b5016d612ac6648dd
by evandro.menezes[RISCV] Define the vfclass RVV intrinsics
Define the `vfclass` IR intrinsics for the respective V instructions.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by: Evandro Menezes <evandro.menezes@sifive.com>
Differential Revision: https://reviews.llvm.org/D94356
|
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
 | llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll |
 | llvm/include/llvm/IR/IntrinsicsRISCV.td |
 | llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll |
Commit
f635bcd16105a0a01eefa2c69a71cd103dedaddd
by hubert.reinterpretcastNFC: Pre-commit test: -Wpointer-sign with plain char to [un]signed char
Add tests with bad message text for `-Wpointer-sign` and run them with both signed and unsigned versions of plain `char`.
|
 | clang/test/Sema/incompatible-sign.cpp |
 | clang/test/Sema/incompatible-sign.c |
Commit
c6ffe4d76fbf6ae505c0abccaf29017414265e32
by hubert.reinterpretcast[clang] Fix message text for `-Wpointer-sign` to account for plain char
The `-Wpointer-sign` warning text is inappropriate for describing the incompatible pointer conversion between plain `char` and explicitly `signed`/`unsigned` `char` (whichever plain `char` has the same range as) and vice versa.
Specifically, in part, it reads "converts between pointers to integer types with different sign". This patch changes that portion to read instead as "converts between pointers to integer types where one is of the unique plain 'char' type and the other is not" when one of the types is plain `char`.
C17 subclause 6.5.16.1 indicates that the conversions resulting in `-Wpointer-sign` warnings in assignment-like contexts are constraint violations. This means that strict conformance requires a diagnostic for the case where the message text is wrong before this patch. The lack of an even more specialized warning group is consistent with GCC.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D93999
|
 | clang/test/Sema/incompatible-sign.cpp |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/test/Sema/incompatible-sign.c |
 | clang/test/SemaObjC/objc-cf-audited-warning.m |
 | clang/lib/Sema/SemaExpr.cpp |
Commit
eefd420e0037f8fb53a07c96855985bab61bd1e9
by tstellar[github] Move repo lockdown config into llvm-project repo
We were storing this in the .github repo and moving this into llvm-project will allow us to delete the .github repo.
|
 | .github/lockdown.yml |
Commit
f75f391fc68c125f908292bd7dcd6a413cfa591b
by rob.suderman[MLIR][Linalg] Refactor transforms to use linalg::getDynOperands helper
getDynOperands behavior is commonly used in a number of passes. Refactored to use a helper function and avoid code reuse.
Differential Revision: https://reviews.llvm.org/D94340
|
 | mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp |
 | mlir/lib/Dialect/StandardOps/Utils/Utils.cpp |
 | mlir/lib/Dialect/Linalg/Transforms/ElementwiseToLinalg.cpp |
 | mlir/lib/Transforms/BufferDeallocation.cpp |
 | mlir/lib/Dialect/StandardOps/CMakeLists.txt |
 | mlir/lib/Transforms/PipelineDataTransfer.cpp |
 | mlir/include/mlir/Dialect/StandardOps/Utils/Utils.h |
Commit
f9902514fe548346a5175a3521c61fc4819c5b8a
by Jonas Devlieghere[MC] Make getEHFrameSection const like every other getter (NFC)
|
 | llvm/include/llvm/MC/MCObjectFileInfo.h |
Commit
ef50c07b1fad368f6a8d326b4f73dd531009dca4
by Lang Hames[JITLink] Add a new PostAllocationPasses list.
Passes in the new PostAllocationPasses list will run immediately after memory allocation and address assignment for defined symbols, and before JITLinkContext::notifyResolved is called. These passes can set up state associated with the addresses of defined symbols before any query for these addresses completes.
|
 | llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp |
 | llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h |
Commit
70474dfebcd9babf2e3af5fb002b40417fd6cf88
by marukawa[VE][compiler-rt] Add VE as a target of crt
SX Aurora VE is an experimental target. We upstreamed many part of ported llvm and clang. In order to continue this move, we need to support libraries next, then we need to show the ability of llvm for VE through test cases. As a first step for that, we need to use crt in compiler-rt. VE has it's own crt but they are a part of proprietary compiler. So, we want to use crt in compiler-rt as an alternative.
This patch enables VE as a candidate of crt in compiler-rt.
Reviewed By: phosek, compnerd
Differential Revision: https://reviews.llvm.org/D92748
|
 | compiler-rt/cmake/config-ix.cmake |
Commit
9f8b25769efa409ffc3b85f1c8043d2fcb4f185e
by aheejin[WebAssembly] Ensure terminate pads are a single BB
This ensures every single terminate pad is a single BB in the form of: ``` %exn = catch $__cpp_exception call @__clang_call_terminate(%exn) unreachable ```
This is a preparation for HandleEHTerminatePads pass, which will be added in a later CL and will run after CFGStackify. That pass duplicates terminate pads with a `catch_all` instruction, and duplicating it becomes simpler if we can ensure every terminate pad is a single BB.
Reviewed By: dschuff, tlively
Differential Revision: https://reviews.llvm.org/D94045
|
 | llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyUtilities.h |
 | llvm/test/CodeGen/WebAssembly/exception.ll |
 | llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp |
Commit
905623b64df0c865d4dddc4a60aff9751fbaa0e0
by qcolombet[NFC][LICM] Minor improvements to debug output
Added a utility function in Value class to print block name and use block labels for unnamed blocks. Changed LICM to call this function in its debug output.
Patch by Xiaoqing Wu <xiaoqing_wu@apple.com>
Differential Revision: https://reviews.llvm.org/D93577
|
 | llvm/lib/IR/Value.cpp |
 | llvm/include/llvm/IR/Value.h |
 | llvm/lib/Transforms/Scalar/LICM.cpp |
Commit
0871d6d51648dd2a8009ddff59936ea9e3fe871b
by tianshilei1992[OpenMP] Move memory manager to plugin and make it a common interface
The lifetime of `libomptarget` and its opened plugins are not aligned and it's hard for `libomptarget` to determine when the plugins are destroyed. As a result, some issues (see D94256 for details) occur on some platforms. Actually, if we take target memory as target resources, same as other resources, such as CUDA streams, in each plugin, then the memory manager should also be in the plugin. Also considering some platforms may want to opt out the feature, it makes sense to move the memory manager to plugin, make it a common interface, and let plguin developers determine whether they need it. This is what this patch does. CUDA plugin is taken as example to show how to integrate it. In this way, we can also get a bonus that different thresholds can be set for different platforms.
Reviewed By: jdoerfert, JonChesterfield
Differential Revision: https://reviews.llvm.org/D94379
|
 | openmp/libomptarget/plugins/common/MemoryManager/CMakeLists.txt |
 | openmp/libomptarget/src/MemoryManager.cpp |
 | openmp/libomptarget/src/device.cpp |
 | openmp/libomptarget/plugins/cuda/CMakeLists.txt |
 | openmp/libomptarget/src/CMakeLists.txt |
 | openmp/libomptarget/src/device.h |
 | openmp/libomptarget/src/MemoryManager.h |
 | openmp/libomptarget/plugins/common/CMakeLists.txt |
 | openmp/libomptarget/plugins/cuda/src/rtl.cpp |
 | openmp/libomptarget/plugins/common/MemoryManager/MemoryManager.h |
Commit
89e8eb946d89f29cc76ba0a03425b7f7679aca5d
by kazu[llvm] Use llvm::find_if (NFC)
|
 | llvm/lib/IR/LegacyPassManager.cpp |
 | llvm/include/llvm/Analysis/LoopCacheAnalysis.h |
 | llvm/tools/llvm-exegesis/lib/Analysis.cpp |
 | llvm/lib/ExecutionEngine/Orc/Core.cpp |
 | llvm/lib/MC/MCSectionMachO.cpp |
 | llvm/tools/llvm-exegesis/lib/SchedClassResolution.cpp |
 | llvm/tools/obj2yaml/dwarf2yaml.cpp |
Commit
8590a3e3adceff1ff1f606fa68ce4622181ecae2
by kazu[llvm] Use *Set::contains (NFC)
|
 | llvm/tools/llvm-objcopy/COFF/Object.cpp |
 | llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp |
 | llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp |
Commit
e5b4dbab041f6692b8c5286406e2566be87feac9
by kazu[llvm] Simplify string comparisons (NFC)
Identified with readability-string-compare.
|
 | llvm/utils/TableGen/GlobalISelEmitter.cpp |
 | llvm/tools/llvm-profdata/llvm-profdata.cpp |
 | llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp |
 | llvm/tools/llvm-mca/llvm-mca.cpp |
 | llvm/lib/Option/OptTable.cpp |
Commit
b1c304c4946506c0d00532829fb2f91276dde0c8
by craig.topper[CodeGen] Try to make the print of memory operand alignment a little more user friendly.
Memory operands store a base alignment that does not factor in the effect of the offset on the alignment.
Previously the printing code only printed the base alignment if it was different than the size. If there is an offset, the reader would need to figure out the effective alignment themselves. This has confused me before and someone else was recently confused on IRC.
This patch prints the possibly offset adjusted alignment if it is different than the size. And prints the base alignment if it is different than the alignment. The MIR parser has been updated to read basealign in addition to align.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D94344
|
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll |
 | llvm/test/CodeGen/MIR/X86/memory-operands.mir |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/store_split_because_of_memsize_or_align.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir |
 | llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir |
 | llvm/lib/CodeGen/MIRParser/MIParser.cpp |
 | llvm/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir |
 | llvm/test/CodeGen/X86/avoid-sfb-offset.mir |
 | llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir |
 | llvm/test/CodeGen/X86/bug47278.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir |
 | llvm/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir |
 | llvm/test/CodeGen/PowerPC/aix-cc-abi.ll |
 | llvm/lib/CodeGen/MIRParser/MILexer.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir |
 | llvm/lib/CodeGen/MIRParser/MILexer.h |
 | llvm/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir |
 | llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir |
 | llvm/lib/CodeGen/MachineOperand.cpp |
 | llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir |
Commit
edde2eb1d2093905a2cb6166e6a60f9cc04c2bbc
by Jason MolendaAdd unconditional logging to debugserver for launch/attach processes
Debugging app launch/attach failures can be difficult because of all of the messages logged to the console on a darwin system; emitting specific messages around critical API calls can make it easier to narrow the search for the console messages related to the failure.
<rdar://problem/67220442>
Differential revision: https://reviews.llvm.org/D94357
|
 | lldb/tools/debugserver/source/debugserver.cpp |
 | lldb/tools/debugserver/source/MacOSX/MachProcess.mm |
 | lldb/tools/debugserver/source/RNBRemote.cpp |
 | lldb/tools/debugserver/source/MacOSX/MachTask.mm |
Commit
f9ef3a60037bffef6bbd2227b24e5cdb322d5eb2
by craig.topper[SelectionDAG] Make isConstantIntBuildVectorOrConstantInt and isConstantFPBuildVectorOrConstantFP methods const.
|
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
 | llvm/include/llvm/CodeGen/SelectionDAG.h |
Commit
b688c5875d08c586f7b35b8f9da1493ebbf92b45
by phosek[CMake] Split the target side of runtimes build
Previously, llvm/runtimes/CMakeLists.txt played two different roles: 1. host side which could used to set up the build of runtimes for different targets in the right order; 2. target side to build the runtimes for the specified target.
This change splits llvm/runtimes/CMakeLists.txt and moves the target side to runtimes/CMakeLists laying down the foundation for the "A vision for building the runtimes" proposal. From the user perspective, there shouldn't be any visible difference at the moment.
Differential Revision: https://reviews.llvm.org/D93408
|
 | llvm/runtimes/Components.cmake.in |
 | llvm/runtimes/CMakeLists.txt |
 | runtimes/Components.cmake.in |
 | runtimes/CMakeLists.txt |
Commit
df74c001fa5bd4874d0d88724e6cf726ed552904
by craig.topper[DAGCombiner] Replace static helper function isConstantFPBuildVectorOrConstantFP with the identical version in SelectionDAG. NFC
|
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
Commit
93ad0edf674125f19177054d8331a5e8910d3d98
by i[ELF] Drop .rel[a].debug_gnu_pub{names,types} for --gdb-index --emit-relocs
Fixes PR48693: --emit-relocs keeps relocation sections. --gdb-index drops .debug_gnu_pubnames and .debug_gnu_pubtypes but not their relocation sections. This can cause a null pointer dereference in `getOutputSectionName`.
Also delete debug-gnu-pubnames.s which is covered by gdb-index.s
Reviewed By: grimar
Differential Revision: https://reviews.llvm.org/D94354
|
 | lld/test/ELF/debug-gnu-pubnames.s |
 | lld/ELF/SyntheticSections.cpp |
 | lld/test/ELF/gdb-index.s |
Commit
1cc5235712f2ed847f0b593714446d440e0596ba
by aheejin[WebAssembly] Misc. refactoring in CFGStackify (NFC)
Updating `ScopeTops` is something we frequently do in CFGStackify, so this factors it out as a function. This also makes a few utility functions templated so that they are not dependent on input vector types and simplifies function parameters.
Reviewed By: tlively
Differential Revision: https://reviews.llvm.org/D94046
|
 | llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp |
Commit
215ed9b33ccbe9858aeb65b357bd1111cff354be
by sbergmanAdapt CastExpr::getSubExprAsWritten to ConstantExpr
Differential Revision: https://reviews.llvm.org/D87030
|
 | clang/unittests/Tooling/CastExprTest.cpp |
 | clang/lib/AST/Expr.cpp |
Commit
c8a914db5c60dbeb5b638f30a9915855a67805f7
by sander.desmalen[LiveDebugValues] Fix comparison operator in VarLocBasedImpl
The issue was introduced in commit rG84a1120943a651184bae507fed5d648fee381ae4 and would cause a VarLoc's StackOffset to be compared with its own, instead of the StackOffset from the other VarLoc. This patch fixes that.
|
 | llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp |
Commit
6a195491b6028185c7278718ac21bca309a6c4ea
by sebastian.neubauer[AMDGPU] Fix failing assert with scratch ST mode
In ST mode, flat scratch instructions have neither an sgpr nor a vgpr for the address. This lead to an assertion when inserting hard clauses.
Differential Revision: https://reviews.llvm.org/D94406
|
 | llvm/test/CodeGen/AMDGPU/memory_clause.ll |
 | llvm/include/llvm/CodeGen/TargetInstrInfo.h |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp |
Commit
7ab803095ae58445996dc4694acb216e3a32ee64
by Jan Svoboda[clang][cli] Remove -f[no-]trapping-math from -cc1 command line
This patch removes the -f[no-]trapping-math flags from the -cc1 command line. These flags are ignored in the command line parser and their semantics is fully handled by -ffp-exception-mode.
This patch does not remove -f[no-]trapping-math from the driver command line. The driver flags are being used and do affect compilation.
Reviewed By: dexonsmith, SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D93395
|
 | clang/test/CodeGen/noexceptionsfpmath.c |
 | clang/test/Driver/fast-math.c |
 | clang/test/Driver/fp-model.c |
 | clang/test/CodeGen/fpconstrained.c |
 | clang/include/clang/Driver/Options.td |
 | clang/test/CodeGen/fpconstrained.cpp |
 | clang/test/Parser/fp-floatcontrol-syntax.cpp |
 | clang/lib/Driver/ToolChains/Clang.cpp |
 | clang/lib/Frontend/CompilerInvocation.cpp |
 | clang/test/CodeGenCUDA/propagate-metadata.cu |
Commit
bd30a796fc4b51750248ccba29cd6fb1f61859f5
by zinenko[mlir] use built-in vector types instead of LLVM dialect types when possible
Continue the convergence between LLVM dialect and built-in types by using the built-in vector type whenever possible, that is for fixed vectors of built-in integers and built-in floats. LLVM dialect vector type is still in use for pointers, less frequent floating point types that do not have a built-in equivalent, and scalable vectors. However, the top-level `LLVMVectorType` class has been removed in favor of free functions capable of inspecting both built-in and LLVM dialect vector types: `LLVM::getVectorElementType`, `LLVM::getNumVectorElements` and `LLVM::getFixedVectorType`. Additional work is necessary to design an implemented the extensions to built-in types so as to remove the `LLVMFixedVectorType` entirely.
Note that the default output format for the built-in vectors does not have whitespace around the `x` separator, e.g., `vector<4xf32>` as opposed to the LLVM dialect vector type format that does, e.g., `!llvm.vec<4 x fp128>`. This required changing the FileCheck patterns in several tests.
Reviewed By: mehdi_amini, silvas
Differential Revision: https://reviews.llvm.org/D94405
|
 | mlir/test/Dialect/LLVMIR/roundtrip.mlir |
 | mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp |
 | mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td |
 | mlir/docs/SPIRVToLLVMDialectConversion.md |
 | mlir/test/Conversion/ArmNeonToLLVM/convert-to-llvm.mlir |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h |
 | mlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir |
 | mlir/test/Dialect/LLVMIR/nvvm.mlir |
 | mlir/test/Conversion/SPIRVToLLVM/constant-op-to-llvm.mlir |
 | mlir/test/Conversion/SPIRVToLLVM/spirv-types-to-llvm.mlir |
 | mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir |
 | mlir/test/Conversion/VectorToROCDL/vector-to-rocdl.mlir |
 | mlir/lib/Target/LLVMIR/TypeTranslation.cpp |
 | mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp |
 | mlir/test/Conversion/SPIRVToLLVM/bitwise-ops-to-llvm.mlir |
 | mlir/test/Dialect/LLVMIR/rocdl.mlir |
 | mlir/test/Target/rocdl.mlir |
 | mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir |
 | mlir/test/Conversion/SPIRVToLLVM/shift-ops-to-llvm.mlir |
 | mlir/test/Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir |
 | mlir/test/Target/llvmir.mlir |
 | mlir/test/Target/import.ll |
 | mlir/test/Dialect/LLVMIR/types.mlir |
 | mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp |
 | mlir/test/Conversion/SPIRVToLLVM/comparison-ops-to-llvm.mlir |
 | mlir/test/Target/llvmir-intrinsics.mlir |
 | mlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir |
 | mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir |
 | mlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir |
 | mlir/test/Conversion/StandardToLLVM/standard-to-llvm.mlir |
 | mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp |
 | mlir/lib/Conversion/VectorToROCDL/VectorToROCDL.cpp |
 | mlir/test/Target/llvmir-types.mlir |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td |
 | mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir |
 | mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp |
 | mlir/test/Target/arm-neon.mlir |
 | mlir/test/Dialect/LLVMIR/types-invalid.mlir |
 | mlir/test/Dialect/LLVMIR/invalid.mlir |
 | mlir/test/Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir |
 | mlir/test/Target/avx512.mlir |
 | mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp |
 | mlir/docs/Dialects/LLVM.md |
 | mlir/docs/ConversionToLLVMDialect.md |
 | mlir/test/Conversion/SPIRVToLLVM/func-ops-to-llvm.mlir |
 | mlir/test/Dialect/LLVMIR/dialect-cast.mlir |
 | mlir/test/Target/nvvmir.mlir |
 | mlir/test/Conversion/SPIRVToLLVM/logical-ops-to-llvm.mlir |
 | mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp |
 | mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp |
 | mlir/test/Target/arm-sve.mlir |
 | mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir |
 | mlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir |
Commit
e8287cb2b2923af9da72fd953e2ec5495c33861a
by mkazantsev[Test] Add failing test for PR48725
|
 | llvm/test/Transforms/LoopStrengthReduce/pr48725.ll |
Commit
c93b95593907c28cbcfde3d8266801587e110b42
by aheejin[WebAssembly] Remove more unnecessary brs in CFGStackify
After placing markers, we removed some unnecessary branches, but it only handled the simplest case. This makes more unnecessary branches to be removed.
Reviewed By: dschuff, tlively
Differential Revision: https://reviews.llvm.org/D94047
|
 | llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll |
 | llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp |
Commit
9ec72cfc61ad5d87bb9e719b8b01f56e4da88a5b
by grimar[llvm-readef/obj] - Change the design structure of ELF dumper. NFCI.
This is a refactoring for design of stuff in `ELFDumper.cpp`. The current design of ELF dumper is far from ideal.
Currently most overridden functions (inherited from `ObjDumper`) in `ELFDumper` just forward to the functions of `ELFDumperStyle` (which can be either `GNUStyle` or `LLVMStyle`). A concrete implementation may be in any of `ELFDumper`/`DumperStyle`/`GNUStyle`/`LLVMStyle`.
This patch reorganizes the classes by introducing `GNUStyleELFDumper`/`LLVMStyleELFDumper` which inherit from `ELFDumper`. The implementations are moved:
`DumperStyle` -> `ELFDumper` `GNUStyle` -> `GNUStyleELFDumper` `LLVMStyle` -> `LLVMStyleELFDumper`
With that we can avoid having a lot of redirection calls and helper methods. The number of code lines changes from 7142 to 6922 (reduced by ~3%) and the code overall looks cleaner.
Differential revision: https://reviews.llvm.org/D93900
|
 | llvm/tools/llvm-readobj/ELFDumper.cpp |
Commit
1e11402aa8e25d88c095a1c70fc87d2d9775186b
by grimar[llvm-readobj] - Add 'override' to fix build bots.
This should fix bots after landing D93900.
An example of error is:
/home/worker/2.0.1/lldb-x86_64-debian/llvm-project/llvm/tools/llvm-readobj/ELFDumper.cpp:883:8: warning: 'printSectionMapping' overrides a member function but is not marked 'override' [-Winconsistent-missing-override] void printSectionMapping() {}
|
 | llvm/tools/llvm-readobj/ELFDumper.cpp |
Commit
cc91efdabee05f749cb42e45aef1b45431844ade
by grimar[llvm-readobj] - An attempt to fix BB.
This adds the `template` keyword for 'getAsArrayRef' calls.
An example of error: /b/1/openmp-gcc-x86_64-linux-debian/llvm.src/llvm/tools/llvm-readobj/ELFDumper.cpp:4491:50: error: use 'template' keyword to treat 'getAsArrayRef' as a dependent template name for (const Elf_Rel &Rel : this->DynRelRegion.getAsArrayRef<Elf_Rel>())
|
 | llvm/tools/llvm-readobj/ELFDumper.cpp |
Commit
4744478b99f1a99b2cdf7e4070a93086e5ae4800
by SourabhSingh.Tomar[mlir][openmp][NFCI] Rename `continuationIP` to `continuationBlock`
Argument is a `Block` not a `point`.
|
 | mlir/lib/Target/LLVMIR/ModuleTranslation.cpp |
Commit
891b4873c129e27755e90a9b8954b9f0d0e7c5a4
by grimar[llvm-readobj] - One more attempt to fix BB.
Add `this->` for `W`, which is the member of `ObjDumper`
An example of error: readobj/ELFDumper.cpp:738:13: error: use of undeclared identifier 'W' assert(&W.getOStream() == &llvm::fouts());
|
 | llvm/tools/llvm-readobj/ELFDumper.cpp |
Commit
c1e08f0073e35cf17c0a0343cf7efff914dbd66d
by mikhail.maltsev[clang][AST] Get rid of an alignment hack in DeclObjC.h [NFCI]
This code currently uses a union object to increase the alignment of the type ObjCTypeParamList. The original intent of this trick was to be able to use the expression `this + 1` to access the beginning of a tail-allocated array of `ObjCTypeParamDecl *` pointers.
The code has since been refactored and uses `llvm::TrailingObjects` to manage the tail-allocated array. This template takes care of alignment, so the hack is no longer necessary.
This patch removes the union so that the `SourceRange` class can be used directly instead of being re-implemented with raw representations of source locations.
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D94224
|
 | clang/lib/AST/DeclObjC.cpp |
 | clang/include/clang/AST/DeclObjC.h |
Commit
f264f9ad7df538357dfc8c5f318c5c8b0df3d99f
by jay.foad[SlotIndexes] Fix and simplify basic block splitting
Remove the InsertionPoint argument from SlotIndexes::insertMBBInMaps because it was confusing: what does it mean to insert a new block between two instructions, in the middle of an existing block?
Instead, support the case that MachineBasicBlock::splitAt really needs, where the new block contains some instructions that are already in the maps because they have been moved there from the tail of the previous block.
In all other use cases the new block is empty.
Based on work by Carl Ritson!
Differential Revision: https://reviews.llvm.org/D94311
|
 | llvm/unittests/MI/LiveIntervalTest.cpp |
 | llvm/include/llvm/CodeGen/LiveIntervals.h |
 | llvm/lib/CodeGen/MachineBasicBlock.cpp |
 | llvm/include/llvm/CodeGen/SlotIndexes.h |
Commit
794e3d94d5a97e118bc2ed10f7ba1830dbb25459
by jay.foad[AMDGPU][GlobalISel] Remove some duplicate RUN lines
Differential Revision: https://reviews.llvm.org/D86618
|
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir |
Commit
60df7c08b1f4447309c0c07fec1c8bc7267562fc
by grimar[obj2yaml,yaml2obj] - Fix issues with creating/dumping group sections.
We have the following issues related to group sections: 1) yaml2obj is unable to set the custom `sh_entsize` value, because the `EntSize` key is currently ignored. 2) obj2yaml is unable to dump the group section which `sh_entsize != 4`. 3) obj2yaml always dumps the "EntSize" for group sections, though usually we are trying to omit dumping default values when dumping keys. I.e. we should not print the "EntSize" key when `sh_entsize` == 4.
This patch fixes (1),(3) and adds the test case to document the behavior of (2).
Differential revision: https://reviews.llvm.org/D93854
|
 | llvm/test/tools/obj2yaml/ELF/section-group.yaml |
 | llvm/test/tools/yaml2obj/ELF/group.yaml |
 | llvm/lib/ObjectYAML/ELFEmitter.cpp |
 | llvm/tools/obj2yaml/elf2yaml.cpp |
Commit
c15a57cc1a86bfb72f4fa0e7d265494babc3b412
by grimar[obj2yaml] - Don't crash when an object has an empty symbol table.
Currently we crash when we have an object with SHT_SYMTAB/SHT_DYNSYM sections of size 0.
With this patch instead of the crash we start to dump them properly.
Differential revision: https://reviews.llvm.org/D93697
|
 | llvm/test/tools/obj2yaml/ELF/no-symtab.yaml |
 | llvm/tools/obj2yaml/elf2yaml.cpp |
Commit
a06aa1037c17dd3d60f5202b9877d8988e463353
by thakisRevert "[Test] Add failing test for PR48725"
This reverts commit e8287cb2b2923af9da72fd953e2ec5495c33861a. Test unexpectedly passes on mac, see comment 2 on PR48725.
|
 | llvm/test/Transforms/LoopStrengthReduce/pr48725.ll |
Commit
ace516fb33d1f3de85f046e96efc1048b4ee8c08
by csiggChange the LLVM_ATTRIBUTE_DEPRECATED macro to use C++14 attribute.
C++14 attributes are superior because they can be applied to functions with inline definition and the syntax is cleaner.
I intend to convert all uses and then remove the macro.
One issue that might hold back switching uses to C++14 attributes is that clang-format does not put long attributes on separate lines and formatted code will look like:
``` template <typename T> [[deprecated("blah blah")]] void foooooooooooooooooooooooooooo() { ... } ```
Putting long attributes on a separate line would be prettier. See https://stackoverflow.com/questions/45740466/clang-format-setting-to-control-c-attributes
AttributeMacros probably won't help because it can't match the custom message. https://clang.llvm.org/docs/ClangFormatStyleOptions.html
Reviewed By: rriddle, MaskRay
Differential Revision: https://reviews.llvm.org/D94219
|
 | llvm/include/llvm/Support/Compiler.h |
Commit
09db958e37b3a51942827a48a4b2f453e8fb4737
by fraser[RISCV] Improve scalable-vector shift tests (NFC)
All i8/i16 and several i32 tests were testing immediate shift amounts which exceeded the bits in the vector elements, creating poison values. Amend the tests to test well-behaved shift amounts.
|
 | llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll |
 | llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv64.ll |
 | llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll |
 | llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll |
Commit
a5212b5c91cc699052125b8a3428ffe0c123837d
by llvm-dev[X86][SSE] combineSubToSubus - remove SSE2 early-out.
SSE2 truncation codegen has improved over the past few years (mainly due to better shuffle lowering/combining and computeKnownBits) - its no longer necessary to early-out from v8i32/v8i64 truncations.
This was noticed while looking at completing PR40111 and moving combineSubToSubus to DAGCombine entirely.
|
 | llvm/test/CodeGen/X86/psubus.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
c4944a6f53f6d1876e76563599f5f149328e7f8f
by bjorn.a.pettersson[Fixed Point] Add codegen for conversion between fixed-point and floating point.
The patch adds the required methods to FixedPointBuilder for converting between fixed-point and floating point, and uses them from Clang.
This depends on D54749.
Reviewed By: leonardchan
Differential Revision: https://reviews.llvm.org/D86632
|
 | clang/lib/CodeGen/CGExprScalar.cpp |
 | clang/test/Frontend/fixed_point_conversions.c |
 | llvm/include/llvm/IR/FixedPointBuilder.h |
 | clang/test/Frontend/fixed_point_compound.c |
 | clang/test/Frontend/fixed_point_conversions_half.c |
Commit
7e44208115b35ad34cc10259e9c375abbd636ef5
by llvm-dev[X86][SSE] combineSubToSubus - add v16i32 handling on pre-AVX512BW targets.
v16i32 -> v16i16/v8i16 truncation is now good enough using PACKSS/PACKUS + shuffle combining that its no longer necessary to early-out on pre-AVX512BW targets.
This was noticed while looking at completing PR40111 and moving combineSubToSubus to DAGCombine entirely.
|
 | llvm/test/CodeGen/X86/psubus.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
2ed914cb7e9c0737bdf60a0b1fd48b6499973325
by llvm-dev[X86][SSE] getFauxShuffleMask - handle PACKSS(SRAI(),SRAI()) shuffle patterns.
We can't easily treat ASHR a faux shuffle, but if it was just feeding a PACKSS then it was likely being used as sign-extension for a truncation, so just peek through and adjust the mask accordingly.
|
 | llvm/test/CodeGen/X86/psubus.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
80f078548868d0dd3d74ab8a1deb8aa46870cdf3
by nicolas.vasilache[mlir][Linalg] NFC - Refactor fusion APIs
This revision uniformizes fusion APIs to allow passing OpOperand, OpResult and adds a finer level of control fusion.
Differential Revision: https://reviews.llvm.org/D94493
|
 | mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h |
 | mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td |
 | mlir/include/mlir/Dialect/Linalg/Utils/Utils.h |
 | mlir/test/lib/Transforms/TestLinalgFusionTransforms.cpp |
 | mlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp |
 | mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp |
Commit
a6759477129c98820a56231d2f3fd27e5fe31ab3
by Paul C. Anagnostopoulos[TableGen] Improve error message for semicolon after braced body.
Add a test for this message.
Differential Revision: https://reviews.llvm.org/D94412
|
 | llvm/test/TableGen/spurious-semi.td |
 | llvm/lib/TableGen/TGParser.cpp |
Commit
0bd9a1369112f7d0a8a3b94a050fd5ed37037e9b
by clementval[mlir][openacc] Use TableGen information for default enum
Use TableGen and information in ACC.td for the Default enum in the OpenACC dialect. This patch generalize what was done for OpenMP for directives.
Follow up patch after D93576
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D93710
|
 | mlir/test/mlir-tblgen/directive-common.td |
 | mlir/tools/mlir-tblgen/DirectiveCommonGen.cpp |
 | mlir/test/mlir-tblgen/openmp-common.td |
 | mlir/tools/mlir-tblgen/CMakeLists.txt |
 | llvm/include/llvm/Frontend/OpenACC/ACC.td |
 | mlir/tools/mlir-tblgen/OpenMPCommonGen.cpp |
 | mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt |
 | mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td |
Commit
07605ea1f3c94e0a23450f5c9ab3902862d7ff03
by bjorn.a.pettersson[X86] Improved lowering for saturating float to int.
Adapted from D54696 by @nikic.
This patch improves lowering of saturating float to int conversions, FP_TO_[SU]INT_SAT, for X86.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D86079
|
 | llvm/lib/Target/X86/X86ISelLowering.h |
 | llvm/test/CodeGen/X86/fptosi-sat-scalar.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/fptoui-sat-scalar.ll |
Commit
24faa87075ac1b4e4d7f7336271b1ba72ffcc2c0
by marukawa[VE] Update VELIntrinsic tests
Update comment and style of regression tests for VELIntrinsic
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D94490
|
 | llvm/test/CodeGen/VE/VELIntrinsics/vand.ll |
 | llvm/test/CodeGen/VE/VELIntrinsics/vld.ll |
Commit
2f7ec77e3cdb9d874e0b6a73d3d7a6fe02c0125d
by antiagainst[mlir][spirv] NFC: place ops in the proper file for their categories
This commit moves dangling ops in the main ops.td file to the proper file matching their categories. This makes ops.td as purely including all category files.
Differential Revision: https://reviews.llvm.org/D94413
|
 | mlir/test/Target/SPIRV/barrier-ops.mlir |
 | mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td |
 | mlir/test/Dialect/SPIRV/IR/group-ops.mlir |
 | mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td |
 | mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBarrierOps.td |
 | mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td |
 | mlir/test/Dialect/SPIRV/IR/barrier-ops.mlir |
 | mlir/test/Dialect/SPIRV/IR/ops.mlir |
 | mlir/test/Dialect/SPIRV/IR/bit-ops.mlir |
 | mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMiscOps.td |
 | mlir/test/Dialect/SPIRV/IR/logical-ops.mlir |
 | mlir/test/Dialect/SPIRV/IR/structure-ops.mlir |
 | mlir/test/Dialect/SPIRV/IR/cast-ops.mlir |
 | mlir/test/Target/SPIRV/barrier.mlir |
 | mlir/test/Dialect/SPIRV/IR/misc-ops.mlir |
 | mlir/test/Dialect/SPIRV/IR/memory-ops.mlir |
Commit
dd07d60ec33969ae4f1e37500bb852563e142dfb
by bjorn.a.pettersson[SLP] Add test case showing a bug when dealing with padded types
We shouldn't vectorize stores of non-packed types (i.e. types that has padding between consecutive variables in a scalar layout, but being packed in a vector layout).
The problem was detected as a miscompile in a downstream test case.
This is a pre-commit of a test case for the fix in D94446.
|
 | llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll |
Commit
3f7b4ce96065eea66bf4344973173e76ec1a4255
by nemanja.i.ibm[PowerPC] Add support for embedded devices with EFPU2
PowerPC cores like e200z759n3 [1] using an efpu2 only support single precision hardware floating point instructions. The single precision instructions efs* and evfs* are identical to the spe float instructions while efd* and evfd* instructions trigger a not implemented exception.
This patch introduces a new command line option -mefpu2 which leads to single-hardware / double-software code generation.
[1] Core reference: https://www.nxp.com/files-static/32bit/doc/ref_manual/e200z759CRM.pdf
Differential revision: https://reviews.llvm.org/D92935
|
 | clang/lib/Basic/Targets/PPC.cpp |
 | llvm/lib/Target/PowerPC/PPCSubtarget.cpp |
 | clang/docs/ClangCommandLineReference.rst |
 | llvm/lib/Target/PowerPC/PPC.td |
 | llvm/lib/Target/PowerPC/PPCSubtarget.h |
 | clang/include/clang/Driver/Options.td |
 | llvm/lib/Target/PowerPC/PPCISelLowering.cpp |
 | clang/test/Driver/ppc-features.cpp |
 | llvm/test/CodeGen/PowerPC/spe.ll |
Commit
4086072f8a9200216088c435c9aa90a2d8ed74a5
by antiagainstReland "[mlir][linalg] Support parsing attributes in named op spec"
With this, now we can specify a list of attributes on named ops generated from the spec. The format is defined as
``` attr-id ::= bare-id (`?`)? attr-typedef ::= type (`[` `]`)? attr-def ::= attr-id `:` attr-typedef
tc-attr-def ::= `attr` `(` attr-def-list `)` tc-def ::= `def` bare-id `(`tensor-def-list`)` `->` `(` tensor-def-list`)` (tc-attr-def)? ```
For example,
``` ods_def<SomeCppOp> def some_op(...) -> (...) attr( f32_attr: f32, i32_attr: i32, array_attr : f32[], optional_attr? : f32 ) ```
where `?` means optional attribute and `[]` means array type.
Reviewed By: hanchung, nicolasvasilache
Differential Revision: https://reviews.llvm.org/D94240
|
 | mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc |
 | mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp |
Commit
4fa01f72de6cc48a44afe057c04803711160c92d
by zinenko[mlir][CAPI] Fix inline function declaration
Add `static` keyword, otherwise build fail with linker error for some cases.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D94496
|
 | mlir/include/mlir-c/AffineExpr.h |
Commit
9667d15e7496e6d8c313251f22ac157dbbd0c1c2
by zinenko[mlir] Fix for LIT tests
Add `MLIR_SPIRV_CPU_RUNNER_ENABLED` to `llvm_canonicalize_cmake_booleans`.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D94407
|
 | mlir/test/CMakeLists.txt |
Commit
1f1250151f222ba391d05dcc173f4b6c65d05ca2
by marek.kurdej[libc++] [C++2b] [P1048] Add is_scoped_enum and is_scoped_enum_v.
* https://wg21.link/p1048
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D94409
|
 | libcxx/docs/FeatureTestMacroTable.rst |
 | libcxx/include/type_traits |
 | libcxx/include/version |
 | libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_scoped_enum.pass.cpp |
 | libcxx/docs/Cxx2bStatusPaperStatus.csv |
 | libcxx/test/std/language.support/support.limits/support.limits.general/type_traits.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp |
 | libcxx/utils/generate_feature_test_macro_components.py |
Commit
8349fa0fdd3a372f88ea53de6c906d987c1f4fec
by antiagainst[mlir][spirv] NFC: split deserialization into multiple source files
This avoids large source files and gives a better structure. It also allows leveraging compilation parallelism.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D94360
|
 | mlir/lib/Target/SPIRV/CMakeLists.txt |
 | mlir/lib/Target/SPIRV/Deserialization/Deserializer.h |
 | mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp |
 | mlir/lib/Target/CMakeLists.txt |
 | mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp |
 | mlir/lib/Target/SPIRV/Serialization/CMakeLists.txt |
 | mlir/lib/Target/SPIRV/Serialization.cpp |
 | mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp |
 | mlir/lib/Target/SPIRV/Serialization/Serialization.cpp |
 | mlir/lib/Target/SPIRV/Deserialization/CMakeLists.txt |
 | mlir/lib/Target/SPIRV/Deserialization/Deserialization.cpp |
 | mlir/lib/Target/SPIRV/Deserialization.cpp |
Commit
93b54b7c6733fcb11fd6536499e73872d7452ffb
by Jinsong Ji[PowerPC][NFCI] PassSubtarget to ASMWriter
Subtarget feature bits are needed to change instprinter's behavior based on feature bits.
Most of the other popular targets were updated back in 2015, in https://reviews.llvm.org/rGb46d0234a6969 we should update it too.
Reviewed By: sfertile
Differential Revision: https://reviews.llvm.org/D94449
|
 | llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp |
 | llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h |
 | llvm/lib/Target/PowerPC/PPC.td |
Commit
67a339e96839cdecb5efad0e2731ab20a4ee458e
by jurahul[MLIR] Disallow `sym_visibility`, `sym_name` and `type` attributes in the parsed attribute dictionary.
Differential Revision: https://reviews.llvm.org/D94200
|
 | mlir/test/IR/core-ops.mlir |
 | mlir/test/Dialect/Tosa/inlining.mlir |
 | mlir/lib/IR/FunctionImplementation.cpp |
 | mlir/test/IR/invalid-func-op.mlir |
Commit
85aaa3e310c23ec8a375b7a2e2fceee5a72441ef
by llvm-dev[X86] Regenerate sdiv_fix_sat.ll + udiv_fix_sat.ll tests
Adding missing libcall PLT qualifiers
|
 | llvm/test/CodeGen/X86/sdiv_fix_sat.ll |
 | llvm/test/CodeGen/X86/udiv_fix_sat.ll |
Commit
dd955771240289fbcba5fa1312cb8c78f20cd78f
by AkiraFix typo in diagnostic message
rdar://66684531
|
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
Commit
a4931d4fe38d6feef53f97f3dcc7792bfcb06c84
by llvm-dev[AMDGPU] Regenerate umax crash test
|
 | llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll |
Commit
3d9c51d111d0c8480d10fc48fb621bac1d080449
by cullen.rhodes[SVE][NFC] Regenerate a few CodeGen tests
Regenerated using llvm/utils/update_llc_test_checks.py as part of D94504, committing separately to reduce the diff for D94504.
|
 | llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll |
 | llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll |
 | llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll |
Commit
348471575d9c24bbfb124ca5eac1589de075da88
by aaronAdd -ansi option to CompileOnly group
-ansi is documented as being the "same as -std=c89", but there are differences when passing it to a link.
Adding -ansi to said group makes sense since it's supposed to be an alias for -std=c89 and resolves this inconsistency.
|
 | clang/include/clang/Driver/Options.td |
Commit
b117d17d264f448e0b037a62f5a48ec9aedd886c
by smeenai[doc] Place sha256 in lld/README.md into backticks
Reviewed By: smeenai
Differential Revision: https://reviews.llvm.org/D93984
|
 | lld/README.md |
Commit
ef3800e82169c674219501d9ac09ef12b28e6359
by aaronReturn false from __has_declspec_attribute() if not explicitly enabled
Currently, projects can check for __has_declspec_attribute() and use it accordingly, but the check for __has_declspec_attribute will return true even if declspec attributes are not enabled for the target.
This changes Clang to instead return false when declspec attributes are not supported for the target.
|
 | clang/lib/Lex/PPMacroExpansion.cpp |
Commit
5aefc8dc4d14ad04259ab8ae0b2e0da2596d66f7
by mgorny[llvm] [cmake] Remove obsolete /usr/local hack for *BSD
Remove the hack adding /usr/local paths on FreeBSD and DragonFlyBSD. It does not seem to be necessary today, and it breaks cross builds.
Differential Revision: https://reviews.llvm.org/D94491
|
 | llvm/CMakeLists.txt |
Commit
bb9ebf6baf7057d7f2aed90fccbac2414cf9a134
by Dávid Bolvanský[Tests] Add tests for new InstCombine OR transformation, NFC
|
 | llvm/test/Transforms/InstCombine/or.ll |
Commit
0529946b5bafafd10d77b946ee9fa96f388860ef
by Dávid Bolvanský[instCombine] Add (A ^ B) | ~(A | B) -> ~(A & B)
define i32 @src(i32 %x, i32 %y) { %0: %xor = xor i32 %y, %x %or = or i32 %y, %x %neg = xor i32 %or, 4294967295 %or1 = or i32 %xor, %neg ret i32 %or1 } => define i32 @tgt(i32 %x, i32 %y) { %0: %and = and i32 %x, %y %neg = xor i32 %and, 4294967295 ret i32 %neg } Transformation seems to be correct!
https://alive2.llvm.org/ce/z/Cvca4a
|
 | llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp |
 | llvm/test/Transforms/InstCombine/or.ll |
Commit
6f4d460762006af17826693abc1e7139a76aa1f2
by joshisameeran17[Flang][openmp][openacc] Extend CheckNoBranching to handle branching provided by LabelEnforce.
`CheckNoBranching` is currently handling only illegal branching out for constructs with `Parser::Name` in them. Extend the same for handling illegal branching out caused by `Parser::Label` based statements. This patch could possibly solve one of the issues(typically branching out) mentioned in D92735.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D93447
|
 | flang/test/Semantics/omp-parallell01.f90 |
 | flang/lib/Semantics/check-omp-structure.cpp |
 | flang/lib/Semantics/check-directive-structure.h |
Commit
03c8d6a0c4bd0016bdfd1e53e6878696fe6412ed
by craig.topper[LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve expansion of SETONE/SETUEQ on targets without SETO/SETUO.
If SETO/SETUO aren't legal, they'll be expanded and we'll end up with 3 comparisons.
SETONE is equivalent to (SETOGT || SETOLT) so if one of those operations is supported use that expansion. We don't need both since we can commute the operands to make the other.
SETUEQ can be implemented with !(SETOGT || SETOLT) or (SETULE && SETUGE). I've only implemented the first because it didn't look like most of the affected targets had legal SETULE/SETUGE.
Reviewed By: frasercrmck, tlively, nemanjai
Differential Revision: https://reviews.llvm.org/D94450
|
 | llvm/test/CodeGen/RISCV/double-select-fcmp.ll |
 | llvm/test/CodeGen/RISCV/float-fcmp.ll |
 | llvm/test/CodeGen/RISCV/float-br-fcmp.ll |
 | llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll |
 | llvm/test/CodeGen/RISCV/half-fcmp.ll |
 | llvm/test/CodeGen/PowerPC/vsx.ll |
 | llvm/test/CodeGen/RISCV/float-select-fcmp.ll |
 | llvm/test/CodeGen/WebAssembly/comparisons-f32.ll |
 | llvm/test/CodeGen/WebAssembly/comparisons-f64.ll |
 | llvm/test/CodeGen/PowerPC/spe.ll |
 | llvm/test/CodeGen/RISCV/double-br-fcmp.ll |
 | llvm/test/CodeGen/WebAssembly/simd-comparisons.ll |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp |
 | llvm/test/CodeGen/AMDGPU/setcc.ll |
 | llvm/test/CodeGen/RISCV/double-fcmp.ll |
 | llvm/test/CodeGen/RISCV/half-select-fcmp.ll |
 | llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll |
 | llvm/test/CodeGen/RISCV/half-br-fcmp.ll |
Commit
4718ec01669b01373180f4cd1256c6e2dd6f3999
by zeratul976[clangd] Avoid recursion in TargetFinder::add()
Fixes https://github.com/clangd/clangd/issues/633
Differential Revision: https://reviews.llvm.org/D94382
|
 | clang-tools-extra/clangd/FindTarget.cpp |
 | clang-tools-extra/clangd/FindTarget.h |
 | clang-tools-extra/clangd/unittests/FindTargetTests.cpp |
Commit
f748e92295515ea7b39cd687a718915b559de6ec
by aeubanks[NewPM] Run non-trivial loop unswitching under -O2/3/s/z
Fixes https://bugs.llvm.org/show_bug.cgi?id=48715.
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D94448
|
 | llvm/test/Transforms/LoopUnroll/opt-levels.ll |
 | llvm/lib/Passes/PassBuilder.cpp |
 | llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll |
Commit
a14040bd4d902419b53cf0ad576caa0f01eccf5c
by craig.topper[RISCV] Use vmerge.vim for llvm.riscv.vfmerge with a 0.0 scalar operand.
We can use a 0 immediate to avoid needing to materialize 0 into an FPR first.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D94459
|
 | llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
Commit
08d4a50467ecef1337f8d7d9763c7738861bd6f6
by flo[FunctionAttrs] Precommit tests for willreturn inference.
Tests for D94502.
|
 | llvm/test/Transforms/FunctionAttrs/willreturn.ll |
Commit
eef4bdbb34de2dda657668c2ab39397e61e36a0a
by arthur.j.odwyer[libc++] Add a missing `<_Compare>` template argument.
Sometimes `_Compare` is an lvalue reference type, so letting it be deduced is pretty much always wrong. (Well, less efficient than it could be, anyway.)
Differential Revision: https://reviews.llvm.org/D93562
|
 | libcxx/include/algorithm |
Commit
79f99ba65d96a35a79911daf1b67559dd52a684d
by brad[libcxx] Port to OpenBSD
Add initial OpenBSD support.
Reviewed By: ldionne
Differential Revision: https://reviews.llvm.org/D94205
|
 | libcxx/include/CMakeLists.txt |
 | libcxx/include/__config |
 | libcxx/include/support/openbsd/xlocale.h |
 | libcxx/include/__locale |
Commit
7ecad2e4ced180b4fdebc6b7bf6d26d83b454318
by nikita.ppv[InstSimplify] Don't fold gep p, -p to null
This is a partial fix for https://bugs.llvm.org/show_bug.cgi?id=44403. Folding gep p, q-p to q is only legal if p and q have the same provenance. This fold should probably be guarded by something like getUnderlyingObject(p) == getUnderlyingObject(q).
This patch is a partial fix that removes the special handling for gep p, 0-p, which will fold to a null pointer, which would certainly not pass an underlying object check (unless p is also null, in which case this would fold trivially anyway). Folding to a null pointer is particularly problematic due to the special handling it receives in many places, making end-to-end miscompiles more likely.
Differential Revision: https://reviews.llvm.org/D93820
|
 | llvm/test/Transforms/InstSimplify/gep.ll |
 | llvm/lib/Analysis/InstructionSimplify.cpp |
Commit
bdd1ad5e5c57ae0f0bf899517c540ad8a679f01a
by tianshilei1992[OpenMP] Fixed include directories for OpenMP when building OpenMP with LLVM_ENABLE_RUNTIMES
Some LLVM headers are generated by CMake. Before the installation, LLVM's headers are distributed everywhere, some of which are in `${LLVM_SRC_ROOT}/llvm/include/llvm`, and some are in `${LLVM_BINARY_ROOT}/include/llvm`. After intallation, they're all in `${LLVM_INSTALLATION_ROOT}/include/llvm`.
OpenMP now depends on LLVM headers. Some headers depend on headers generated by CMake. When building OpenMP along with LLVM, a.k.a via `LLVM_ENABLE_RUNTIMES`, we need to tell OpenMP where it can find those headers, especially those still have not been copied/installed.
Reviewed By: jdoerfert, jhuber6
Differential Revision: https://reviews.llvm.org/D94534
|
 | openmp/libomptarget/src/CMakeLists.txt |
 | openmp/libomptarget/plugins/amdgpu/CMakeLists.txt |
 | openmp/libomptarget/CMakeLists.txt |
 | openmp/CMakeLists.txt |
Commit
33e2494bea653a845cb0502cc6d3cecdf2b47750
by jonathanchesterfield[libomptarget][amdgpu][nfc] Fix build on centos
[libomptarget][amdgpu][nfc] Fix build on centos
rtl.cpp replaced 224 with a #define from elf.h, but that doesn't work on a centos 7 build machine with an old elf.h
Reviewed By: ronlieb
Differential Revision: https://reviews.llvm.org/D94528
|
 | openmp/libomptarget/plugins/amdgpu/src/rtl.cpp |
Commit
e5f51fdd650c6d20c81fedb8e856e9858aa10991
by david.truby[clang][aarch64] Precondition isHomogeneousAggregate on isCXX14Aggregate
MSVC on WoA64 includes isCXX14Aggregate in its definition. This is de-facto specification on that platform, so match msvc's behaviour.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=47611
Co-authored-by: Peter Waller <peter.waller@arm.com>
Differential Revision: https://reviews.llvm.org/D92751
|
 | clang/test/CodeGenCXX/homogeneous-aggregates.cpp |
 | clang/lib/CodeGen/TargetInfo.cpp |
 | clang/lib/CodeGen/CGCXXABI.h |
 | llvm/test/CodeGen/AArch64/arm64-windows-calls.ll |
 | clang/lib/CodeGen/MicrosoftCXXABI.cpp |
Commit
6cd44b204c6c6f2e915270af6792f247c4c23abc
by flo[FunctionAttrs] Derive willreturn for fns with readonly` & `mustprogress`.
Similar to D94125, derive `willreturn` for functions that are `readonly` and `mustprogress` in FunctionAttrs.
To quote the reasoning from D94125:
Since D86233 we have `mustprogress` which, in combination with `readonly`, implies `willreturn`. The idea is that every side-effect has to be modeled as a "write". Consequently, `readonly` means there is no side-effect, and `mustprogress` guarantees that we cannot "loop" forever without side-effect.
Reviewed By: jdoerfert, nikic
Differential Revision: https://reviews.llvm.org/D94502
|
 | llvm/include/llvm/IR/Function.h |
 | llvm/lib/Transforms/IPO/FunctionAttrs.cpp |
 | llvm/test/Transforms/FunctionAttrs/willreturn.ll |
Commit
e53bbd99516fc7b612df1ae08d48288d0b8784ea
by zequanwu[IR] move nomerge attribute from function declaration/definition to callsites
Move nomerge attribute from function declaration/definition to callsites to allow virtual function calls attach the attribute.
Differential Revision: https://reviews.llvm.org/D94537
|
 | clang/lib/CodeGen/CGCall.cpp |
 | clang/test/CodeGen/attr-nomerge.cpp |
 | clang/lib/CodeGen/CodeGenModule.cpp |
Commit
922a5b894114defb5302e514973de8c9cd23af6a
by yitzhakm[clang-tidy] Add test for Transformer-based checks with diagnostics.
Adds a test that checks the diagnostic output of the tidy.
Differential Revision: https://reviews.llvm.org/D94453
|
 | clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp |
Commit
d49974f9c98ebce5a679eced9f27add138b881fa
by nikita.ppv[InstCombine] Regenerate test checks (NFC)
|
 | llvm/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll |
 | llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll |
 | llvm/test/Transforms/InstCombine/2008-08-05-And.ll |
 | llvm/test/Transforms/InstCombine/2007-05-10-icmp-or.ll |
 | llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll |
 | llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll |
 | llvm/test/Transforms/InstCombine/range-check.ll |
 | llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll |
 | llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll |
 | llvm/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll |
 | llvm/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll |
Commit
9f61fbd75ae1757d77988b37562de4d6583579aa
by listmail[LV] Relax assumption that LCSSA implies single entry
This relates to the ongoing effort to support vectorization of multiple exit loops (see D93317).
The previous code assumed that LCSSA phis were always single entry before the vectorizer ran. This was correct, but only because the vectorizer allowed only a single exiting edge. There's nothing in the definition of LCSSA which requires single entry phis.
A common case where this comes up is with a loop with multiple exiting blocks which all reach a common exit block. (e.g. see the test updates)
Differential Revision: https://reviews.llvm.org/D93725
|
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
 | llvm/test/Transforms/LoopVectorize/loop-form.ll |
 | llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp |
 | llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll |
Commit
f706486eaf07020b11f2088274c757e4070fe6d1
by sunil.srivastavaFix for crash in __builtin_return_address in template context.
The check for argument value needs to be guarded by !isValueDependent().
Differential Revision: https://reviews.llvm.org/D94438
|
 | clang/lib/Sema/SemaChecking.cpp |
 | clang/test/Sema/builtin-returnaddress.c |
Commit
fb063c933f0062db7fee622f7a43a6a5e560672d
by nikita.ppv[InstCombine] Duplicate tests for logical and/or (NFC)
This replicates existing and/or tests to also test variants using select. This should help us get a more accurate view on which optimizations we're missing if we disable the select -> and/or fold.
|
 | llvm/test/Transforms/InstCombine/and-or-icmps.ll |
 | llvm/test/Transforms/InstCombine/dont-distribute-phi.ll |
 | llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll |
 | llvm/test/Transforms/InstCombine/and-or-icmp-nullptr.ll |
 | llvm/test/Transforms/InstCombine/sign-test-and-or.ll |
 | llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll |
 | llvm/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll |
 | llvm/test/Transforms/InstCombine/or-fcmp.ll |
 | llvm/test/Transforms/InstCombine/or.ll |
 | llvm/test/Transforms/InstCombine/fold-bin-operand.ll |
 | llvm/test/Transforms/InstCombine/signed-truncation-check.ll |
 | llvm/test/Transforms/InstCombine/bit-checks.ll |
 | llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll |
 | llvm/test/Transforms/InstCombine/range-check.ll |
 | llvm/test/Transforms/InstCombine/merge-icmp.ll |
 | llvm/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll |
 | llvm/test/Transforms/InstCombine/and.ll |
 | llvm/test/Transforms/InstCombine/and2.ll |
 | llvm/test/Transforms/InstCombine/select.ll |
 | llvm/test/Transforms/InstCombine/icmp.ll |
 | llvm/test/Transforms/InstCombine/assume.ll |
 | llvm/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll |
 | llvm/test/Transforms/InstCombine/and-or-icmp-min-max.ll |
 | llvm/test/Transforms/InstCombine/set.ll |
 | llvm/test/Transforms/InstCombine/2007-05-10-icmp-or.ll |
 | llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll |
 | llvm/test/Transforms/InstCombine/and-fcmp.ll |
 | llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll |
 | llvm/test/Transforms/InstCombine/icmp-logical.ll |
 | llvm/test/Transforms/InstCombine/result-of-add-of-negative-is-non-zero-and-no-underflow.ll |
 | llvm/test/Transforms/InstCombine/freeze.ll |
 | llvm/test/Transforms/InstCombine/onehot_merge.ll |
 | llvm/test/Transforms/InstCombine/result-of-add-of-negative-or-zero-is-non-zero-and-no-underflow.ll |
 | llvm/test/Transforms/InstCombine/logical-select.ll |
 | llvm/test/Transforms/InstCombine/2008-08-05-And.ll |
 | llvm/test/Transforms/InstCombine/usub-overflow-known-by-implied-cond.ll |
 | llvm/test/Transforms/InstCombine/icmp-custom-dl.ll |
 | llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll |
 | llvm/test/Transforms/InstCombine/prevent-cmp-merge.ll |
 | llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll |
 | llvm/test/Transforms/InstCombine/select-crash-noverify.ll |
 | llvm/test/Transforms/InstCombine/umul-sign-check.ll |
 | llvm/test/Transforms/InstCombine/widenable-conditions.ll |
 | llvm/test/Transforms/InstCombine/zext-or-icmp.ll |
 | llvm/test/Transforms/InstCombine/select-imm-canon.ll |
 | llvm/test/Transforms/InstCombine/canonicalize-clamp-with-select-of-constant-threshold-pattern.ll |
 | llvm/test/Transforms/InstCombine/ispow2.ll |
 | llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll |
 | llvm/test/Transforms/InstCombine/demorgan.ll |
 | llvm/test/Transforms/InstCombine/objsize-noverify.ll |
Commit
caafdf07bbccbe89219539e2b56043c2a98358f1
by listmail[LV] Weaken spuriously strong assert in LoopVersioning
LoopVectorize uses some utilities on LoopVersioning, but doesn't actually use it for, you know, versioning. As a result, the precondition LoopVersioning expects is too strong for this user. At the moment, LoopVectorize supports any loop with a unique exit block, so check the same precondition here.
Really, the whole class structure here is a mess. We should separate the actual versioning from the metadata updates, but that's a bigger problem.
|
 | llvm/lib/Transforms/Utils/LoopVersioning.cpp |
Commit
46507a96fc13146f73e5915a008055c5a59191c2
by spatel[SLP] reduce code duplication while matching reductions; NFC
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
554be30a42802d66807f93e4671a518c1c04e0f8
by spatel[SLP] reduce code duplication in processing reductions; NFC
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
92fb5c49e8aa53ac97fa2fb1a891a4d7ccfd75c5
by spatel[SLP] rename variable to improve readability; NFC
The OperationData in the 2nd block (visiting the operands) is completely independent of the 1st block.
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
9e7895a8682ce3ad98c006955d573d5f2fded4f6
by spatel[SLP] reduce code duplication while processing reductions; NFC
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
7583ae48a3c37a78e57106e4feff6045aaa45584
by craig.topper[RISCV] Add double test cases to vfmerge-rv32.ll. NFC
|
 | llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll |
Commit
e15f3ddcae65525176d1f152effb88cd3c6441a3
by nikita.ppv[InstCombine] Add tests for logical and/or poison implication (NFC)
These tests cover some cases where we can fold select to and/or based on poison implication logic.
|
 | llvm/test/Transforms/InstCombine/select-and-or.ll |
Commit
71ed4b6ce57d8843ef705af8f98305976a8f107a
by selliott[RISCV] Legalize select when Zbt extension available
The custom expansion of select operations in the RISC-V backend interferes with the matching of cmov instructions. Legalizing select when the Zbt extension is available solves that problem.
Reviewed By: lenary, craig.topper
Differential Revision: https://reviews.llvm.org/D93767
|
 | llvm/test/CodeGen/RISCV/rv64Zbt.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/lib/Target/RISCV/RISCVInstrInfoB.td |
 | llvm/test/CodeGen/RISCV/rv32Zbb.ll |
 | llvm/test/CodeGen/RISCV/rv32Zbbp.ll |
 | llvm/test/CodeGen/RISCV/rv32Zbs.ll |
 | llvm/test/CodeGen/RISCV/rv32Zbt.ll |
Commit
23390e7a131a67fd70e26692fc83f62860dd1095
by nikita.ppv[InstCombine] Handle logical and/or in assume optimization
assume(a && b) can be converted to assume(a); assume(b) even if the condition is logical. Same for assume(!(a || b)).
|
 | llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp |
 | llvm/test/Transforms/InstCombine/assume.ll |
Commit
7fd18508134112edb93852c16923a74bfff99cd2
by zinenko[mlir] Update LLVM dialect type documentation
Recent commits reconfigured LLVM dialect types to use built-in types whenever possible. Update the documentation accordingly.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D94485
|
 | mlir/docs/Dialects/LLVM.md |
Commit
2a49b7c64a33566cf5db1a5b4042d6037ccc7cf5
by modimo[Inliner] Change inline remark format and update ReplayInlineAdvisor to use it
This change modifies the source location formatting from: LineNumber.Discriminator to: LineNumber:ColumnNumber.Discriminator
The motivation here is to enhance location information for inline replay that currently exists for the SampleProfile inliner. This will be leveraged further in inline replay for the CGSCC inliner in the related diff.
The ReplayInlineAdvisor is also modified to read the new format and now takes into account the callee for greater accuracy.
Testing: ninja check-llvm
Reviewed By: mtrofin
Differential Revision: https://reviews.llvm.org/D94333
|
 | llvm/test/Transforms/SampleProfile/inline-replay.ll |
 | llvm/include/llvm/Analysis/InlineAdvisor.h |
 | llvm/test/Transforms/Inline/optimization-remarks-passed-yaml.ll |
 | llvm/lib/Transforms/IPO/SampleProfile.cpp |
 | llvm/test/Transforms/SampleProfile/Inputs/inline-replay.txt |
 | llvm/test/Transforms/SampleProfile/remarks.ll |
 | clang/test/Frontend/optimization-remark-with-hotness.c |
 | clang/test/Frontend/optimization-remark-with-hotness-new-pm.c |
 | llvm/include/llvm/Analysis/ReplayInlineAdvisor.h |
 | llvm/test/Transforms/SampleProfile/remarks-hotness.ll |
 | llvm/lib/Analysis/ReplayInlineAdvisor.cpp |
 | llvm/lib/Analysis/InlineAdvisor.cpp |
Commit
68ff52ffead2ba25cca442778ab19286000daad7
by tianshilei1992[OpenMP] Fixed the link error that cannot find static data member
Constant static data member can be defined in the class without another define after the class in C++17. Although it is C++17, Clang can still handle it even w/o the flag for C++17. Unluckily, GCC cannot handle that.
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D94541
|
 | openmp/libomptarget/plugins/common/MemoryManager/MemoryManager.h |
Commit
d1fa7afc7aefd822698fe86431d8184b1e8b6683
by martin[AArch64] [Windows] Properly add :lo12: reloc specifiers when generating assembly
This makes sure that assembly output actually can be assembled.
Set the correct MCExpr relocations specifier VK_PAGEOFF - and also set VK_PAGE consistently even though it's not visible in the assembly output.
Differential Revision: https://reviews.llvm.org/D94365
|
 | llvm/test/CodeGen/AArch64/win-tls.ll |
 | llvm/test/CodeGen/AArch64/stack-protector-target.ll |
 | llvm/test/CodeGen/AArch64/windows-extern-weak.ll |
 | llvm/test/CodeGen/AArch64/win_cst_pool.ll |
 | llvm/test/CodeGen/AArch64/cfguard-checks.ll |
 | llvm/lib/Target/AArch64/AArch64MCInstLower.cpp |
 | llvm/test/CodeGen/AArch64/mingw-refptr.ll |
 | llvm/test/CodeGen/AArch64/dllimport.ll |
Commit
02f1d28ed6b8f33445dae3beed8b6cc8dada4312
by martin[libcxx] Avoid overflows in the windows __libcpp_steady_clock_now()
As freq.QuadValue can be in the range of 10000000 to 19200000, the multiplication before division makes the calculation overflow and wrap to negative values every 16-30 minutes.
Instead count the whole seconds separately before adding the scaled fractional seconds.
Add a testcase for steady_clock to check that the values returned for now() compare as bigger than the zero time origin; this corresponds to a testcase in Qt [1] [2] (that failed spuriously due to this).
[1] https://bugreports.qt.io/browse/QTBUG-89539 [2] https://code.qt.io/cgit/qt/qtbase.git/tree/tests/auto/corelib/kernel/qdeadlinetimer/tst_qdeadlinetimer.cpp?id=f8de5e54022b8b7471131b7ad55c83b69b2684c0#n569
Differential Revision: https://reviews.llvm.org/D93456
|
 | libcxx/src/chrono.cpp |
 | libcxx/test/std/utilities/time/time.clock/time.clock.steady/now.pass.cpp |
Commit
01f1273fe2f0c246f17162de24a8b6e11bad23a8
by tianshilei1992[OpenMP] Fixed a typo in openmp/CMakeLists.txt
|
 | openmp/CMakeLists.txt |
Commit
3d397091591fca4aa16153bba22f031218bee47d
by Matthew.ArsenaultAMDGPU: Remove wrapper only call limitation
This seems to only have overridden cold handling, which we probably shouldn't do. As far as I can tell the wrapper library functions are still inlined as appropriate.
|
 | llvm/lib/Target/AMDGPU/AMDGPUInline.cpp |
 | llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll |
Commit
cf45731f0eaead79e1ac501b397e330df41ec152
by i[Driver] Fix assertion failure when -fprofile-generate -fcs-profile-generate are used together
If conflicting `-fprofile-generate -fcs-profile-generate` are used together, there is currently an assertion failure. Fix the failure.
Also add some driver tests.
Reviewed By: xur
Differential Revision: https://reviews.llvm.org/D94463
|
 | clang/lib/Driver/ToolChains/Clang.cpp |
 | clang/test/Driver/fcs-profile-generate.c |
Commit
55f2eeebc96e7522e49e19074cbfbe4e7f074b5b
by mtrofin[NFC] Disallow unused prefixes in MC/AMDGPU
1 out of 2 patches.
Differential Revision: https://reviews.llvm.org/D94553
|
 | llvm/test/MC/AMDGPU/flat-gfx10.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_vop2.s |
 | llvm/test/MC/AMDGPU/flat-global.s |
 | llvm/test/MC/AMDGPU/hsa-metadata-kernel-args.s |
 | llvm/test/MC/AMDGPU/hsa-metadata-kernel-code-props-v3.s |
 | llvm/test/MC/AMDGPU/ds-gfx9.s |
 | llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v3.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_vopc.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s |
 | llvm/test/MC/AMDGPU/ds.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_flat.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_smem.s |
 | llvm/test/MC/AMDGPU/hsa-wave-size.s |
 | llvm/test/MC/AMDGPU/regression/bug28413.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_ds.s |
 | llvm/test/MC/AMDGPU/regression/bug28168.s |
 | llvm/test/MC/AMDGPU/hsa-metadata-kernel-code-props.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_sop.s |
 | llvm/test/MC/AMDGPU/hsa-metadata-kernel-debug-props.s |
 | llvm/test/MC/AMDGPU/flat-scratch-instructions.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_vop1.s |
 | llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs.s |
 | llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s |
 | llvm/test/MC/AMDGPU/add-sub-no-carry.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s |
 | llvm/test/MC/AMDGPU/regression/bug28165.s |
 | llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s |
 | llvm/test/MC/AMDGPU/hsa-metadata-kernel-args-v3.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s |
 | llvm/test/MC/AMDGPU/regression/bug28538.s |
 | llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s |
Commit
a7130d85e4b9e47b18a89eac3d47fd8c19d449c1
by n.james93[ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl
Most uses of this class just use the default MallocAllocator. As this contains no fields, we can use the empty base optimisation for BumpPtrAllocatorImpl and save 8 bytes of padding for most use cases.
This prevents using a class that is marked as `final` as the `AllocatorT` template argument. In one must use an allocator that has been marked as `final`, the simplest way around this is a proxy class. The class should have all the methods that `AllocaterBase` expects and should forward the calls to your own allocator instance.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D94439
|
 | llvm/include/llvm/Support/Allocator.h |
Commit
1730b0f66adaea6ed65d441dc2032013dd3c3664
by craig.topper[RISCV] Remove '.mask' from vcompress intrinsic name. NFC
It has a mask argument, but isn't a masked instruction. It doesn't use the mask policy of or the v0.t syntax.
|
 | llvm/include/llvm/IR/IntrinsicsRISCV.td |
 | llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
 | llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll |
Commit
6166b91e83716fbe930b2dc4e2a2217c52ee31a7
by llvm[ELF][NFCI] small cleanup to OutputSections.h
OutputSections.h used to close the lld::elf namespace only to immediately open it again. This change merges both parts into one.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D94538
|
 | lld/ELF/OutputSections.h |
Commit
175288a1afef2b6976455aab5ce51c66d28f8bca
by hoyAdd sample-profile-suffix-elision-policy attribute with -funique-internal-linkage-names.
Adding sample-profile-suffix-elision-policy attribute to functions whose linkage names are uniquefied so that their unique name suffix won't be trimmed when applying AutoFDO profiles.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D94455
|
 | llvm/lib/Transforms/Utils/UniqueInternalLinkageNames.cpp |
 | llvm/test/Transforms/UniqueInternalLinkageNames/unique-internal-linkage-names.ll |
Commit
ddcb0aae8b0dd87414105d264d1ee9eac9567476
by Jessica Paquette[MIPatternMatch] Add matcher for G_PTR_ADD
Add a matcher which recognizes G_PTR_ADD and add a test.
Differential Revision: https://reviews.llvm.org/D94348
|
 | llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h |
Commit
8f5ec4593754a58a4feb835a9d44d59c655bd0d1
by julian.lettner[Sanitizer][Darwin] Fix test for macOS 11+ point releases
This test wrongly asserted that the minor version is always 0 when running on macOS 11 and above.
|
 | compiler-rt/lib/sanitizer_common/tests/sanitizer_mac_test.cpp |
Commit
585612355cdf836b434a5331b1263e961135a1ab
by mtrofin[NFC] Disallow unused prefixes under MC/AMDGPU
This patches remaining tests, and patches lit.local.cfg to block future such cases (until we flip FileCheck's flag)
Differential Revision: https://reviews.llvm.org/D94556
|
 | llvm/test/MC/AMDGPU/smem.s |
 | llvm/test/MC/AMDGPU/sopk.s |
 | llvm/test/MC/AMDGPU/vop_dpp_expr.s |
 | llvm/test/MC/AMDGPU/isa-version-unk.s |
 | llvm/test/MC/AMDGPU/sopk-err.s |
 | llvm/test/MC/AMDGPU/mubuf-gfx9.s |
 | llvm/test/MC/AMDGPU/sop1-err.s |
 | llvm/test/MC/AMDGPU/isa-version-hsa.s |
 | llvm/test/MC/AMDGPU/mtbuf.s |
 | llvm/test/MC/AMDGPU/literal16.s |
 | llvm/test/MC/AMDGPU/vop3-convert.s |
 | llvm/test/MC/AMDGPU/vop1.s |
 | llvm/test/MC/AMDGPU/mubuf.s |
 | llvm/test/MC/AMDGPU/out-of-range-registers.s |
 | llvm/test/MC/AMDGPU/sopp.s |
 | llvm/test/MC/AMDGPU/sop2.s |
 | llvm/test/MC/AMDGPU/lit.local.cfg |
 | llvm/test/MC/AMDGPU/vop_sdwa.s |
 | llvm/test/MC/AMDGPU/sopc.s |
 | llvm/test/MC/AMDGPU/vintrp.s |
 | llvm/test/MC/AMDGPU/sopp-err.s |
 | llvm/test/MC/AMDGPU/reg-syntax-extra.s |
 | llvm/test/MC/AMDGPU/vop_dpp.s |
 | llvm/test/MC/AMDGPU/literals.s |
 | llvm/test/MC/AMDGPU/isa-version-pal.s |
 | llvm/test/MC/AMDGPU/sop1.s |
 | llvm/test/MC/AMDGPU/vintrp-err.s |
 | llvm/test/MC/AMDGPU/mtbuf-gfx10.s |
 | llvm/test/MC/AMDGPU/smrd.s |
 | llvm/test/MC/AMDGPU/xdl-insts-err.s |
 | llvm/test/MC/AMDGPU/vop3-gfx9.s |
Commit
0d88d7d82bc44b211a8187650a06c6cd3492186a
by dblaikieDelete unused function (was breaking the -Werror build)
|
 | mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp |
Commit
314e29ed2b78c69111635ecab94541b94c9e4c67
by Joseph.Nash[AMDGPU] Add _e64 suffix to VOP3 Insts
Previously, instructions which could be expressed as VOP3 in addition to another encoding had a _e64 suffix on the tablegen record name, while those only available as VOP3 did not. With this patch, all VOP3s will have the _e64 suffix. The assembly does not change, only the mir.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D94341
Change-Id: Ia8ec8890d47f8f94bbbdac43745b4e9dd2b03423
|
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll |
 | llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mir |
 | llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir |
 | llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir |
 | llvm/test/CodeGen/AMDGPU/mai-hazards.mir |
 | llvm/test/CodeGen/AMDGPU/stale-livevar-in-twoaddr-pass.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir |
 | llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmad.ftz.mir |
 | llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir |
 | llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir |
 | llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll |
 | llvm/test/CodeGen/AMDGPU/schedule-barrier.mir |
 | llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir |
 | llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir |
 | llvm/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shuffle-vector.v2s16.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir |
 | llvm/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir |
 | llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx10.mir |
 | llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir |
 | llvm/test/CodeGen/AMDGPU/pei-build-spill.mir |
 | llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir |
 | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp |
 | llvm/lib/Target/AMDGPU/VOP3Instructions.td |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir |
 | llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir |
 | llvm/test/CodeGen/AMDGPU/v_swap_b32.mir |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir |
 | llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir |
 | llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir |
 | llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir |
 | llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir |
 | llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir |
 | llvm/test/CodeGen/AMDGPU/waitcnt.mir |
 | llvm/lib/Target/AMDGPU/SIInstructions.td |
 | llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll |
 | llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir |
 | llvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
 | llvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir |
 | llvm/lib/Target/AMDGPU/VOP3PInstructions.td |
 | llvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir |
 | llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir |
 | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp |
 | llvm/test/CodeGen/AMDGPU/power-sched-no-instr-sunit.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir |
 | llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp |
 | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir |
 | llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir |
 | llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir |
 | llvm/lib/Target/AMDGPU/SIFoldOperands.cpp |
 | llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir |
 | llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.mir |
 | llvm/test/CodeGen/AMDGPU/regbank-reassign.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir |
 | llvm/test/CodeGen/AMDGPU/smem-no-clause-coalesced.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir |
 | llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp |
 | llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir |
 | llvm/lib/Target/AMDGPU/VOP2Instructions.td |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir |
 | llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir |
 | llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir |
 | llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir |
 | llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir |
 | llvm/lib/Target/AMDGPU/SISchedule.td |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir |
 | llvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir |
 | llvm/test/CodeGen/AMDGPU/spill-agpr.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext-inreg.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir |
 | llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir |
 | llvm/test/CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll |
 | llvm/unittests/MI/LiveIntervalTest.cpp |
 | llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir |
 | llvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir |
Commit
04edcc02638bc70772baa50a74e582bb8e029872
by michaelrj[libc] add isascii and toascii implementations
adding both at once since these are trivial functions.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D94558
|
 | libc/config/linux/aarch64/entrypoints.txt |
 | libc/spec/gnu_ext.td |
 | libc/src/ctype/toascii.h |
 | libc/test/src/ctype/CMakeLists.txt |
 | libc/src/ctype/isascii.h |
 | libc/test/src/ctype/isascii_test.cpp |
 | libc/src/ctype/CMakeLists.txt |
 | libc/test/src/ctype/toascii_test.cpp |
 | libc/spec/posix.td |
 | libc/src/ctype/isascii.cpp |
 | libc/config/linux/x86_64/entrypoints.txt |
 | libc/src/ctype/toascii.cpp |
Commit
0c8466c0015eb8e4061b177e125e588b2138cc8a
by sivachandra[libc][NFC] Use more specific comparison macros in LdExpTest.h.
|
 | libc/test/src/math/LdExpTest.h |
Commit
76643c48cdddfa220680f1ab4a83829bd83faa7a
by aqjune[LangRef] State that a nocapture pointer cannot be returned
This is a small patch stating that a nocapture pointer cannot be returned.
Discussed in D93189.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D94386
|
 | llvm/docs/LangRef.rst |
Commit
25eb7b08ba77a0b7c9c938490444bb8b5121233c
by aqjune[DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND)
This patch resolves the suboptimal codegen described in http://llvm.org/pr47873 . When CodeGenPrepare lowers select into a conditional branch, a freeze instruction is inserted. It is then translated to `BRCOND(FREEZE(SETCC))` in SelDag. The `FREEZE` in the middle of `SETCC` and `BRCOND` was causing a suboptimal code generation however. This patch adds `BRCOND(FREEZE(cond))` -> `BRCOND(cond)` fold to DAGCombiner to remove the `FREEZE`.
To make this optimization sound, `BRCOND(UNDEF)` simply should nondeterministically jump to the branch or not, rather than raising UB. It wasn't clear what happens when the condition was undef according to the comments in ISDOpcodes.h, however. I updated the comments of `BRCOND` to make it explicit (as well as `BR_CC`, which is also a conditional branch instruction).
Note that it diverges from the semantics of `br` instruction in IR, which is explicitly UB. Since the UB semantics was necessary to explain optimizations that use branching conditions, and SelDag doesn't seem to have such optimization, I think this divergence is okay.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D92015
|
 | llvm/include/llvm/CodeGen/ISDOpcodes.h |
 | llvm/test/CodeGen/X86/select-prof-codegen.ll |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
Commit
82655c151450e0103a3aa60725639da607f9220c
by jianzhouzh[MSan] Tweak CopyOrigin
There could be some mis-alignments when copying origins not aligned.
I believe inaligned memcpy is rare so the cases do not matter too much in practice.
1) About the change at line 50
Let dst be (void*)5, then d=5, beg=4 so we need to write 3 (4+4-5) bytes from 5 to 7.
2) About the change around line 77.
Let dst be (void*)5, because of lines 50-55, the bytes from 5-7 were already writen. So the aligned copy is from 8.
Reviewed-by: eugenis Differential Revision: https://reviews.llvm.org/D94552
|
 | compiler-rt/lib/msan/msan_poisoning.cpp |
Commit
25b3921f2fcd8fb3241c2f79e488f25a6374b99f
by thakis[gn build] (manually) port 79f99ba65d96
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
c0f3ea8a08ca9a9ec473f6e9072ccf30dad5def8
by zhanghb97[mlir][Python] Add checking process before create an AffineMap from a permutation.
An invalid permutation will trigger a C++ assertion when attempting to create an AffineMap from the permutation. This patch adds an `isPermutation` function to check the given permutation before creating the AffineMap.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D94492
|
 | mlir/test/Bindings/Python/ir_affine_map.py |
 | mlir/lib/Bindings/Python/IRModules.cpp |
Commit
055644cc459eb204613ac788b73c51d5dab2fcbb
by yuanke.luo[X86][AMX] Prohibit pointer cast on load.
The load/store instruction will be transformed to amx intrinsics in the pass of AMX type lowering. Prohibiting the pointer cast make that pass happy.
Differential Revision: https://reviews.llvm.org/D94372
|
 | llvm/test/Transforms/InstCombine/X86/x86-amx-load-store.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp |
Commit
5c7dcd7aead7b33ba065b98ab3573278feb42228
by Yuanfang Chen[Coroutine] Update promise object's final layout index
promise is a header field but it is not guaranteed that it would be the third field of the frame due to `performOptimizedStructLayout`.
Reviewed By: lxfind
Differential Revision: https://reviews.llvm.org/D94137
|
 | llvm/test/Transforms/Coroutines/coro-spill-promise.ll |
 | llvm/lib/Transforms/Coroutines/CoroFrame.cpp |
Commit
6529d7c5a45b1b9588e512013b02f891d71bc134
by rnk[PDB] Defer relocating .debug$S until commit time and parallelize it
This is a pretty classic optimization. Instead of processing symbol records and copying them to temporary storage, do a first pass to measure how large the module symbol stream will be, and then copy the data into place in the PDB file. This requires defering relocation until much later, which accounts for most of the complexity in this patch.
This patch avoids copying the contents of all live .debug$S sections into heap memory, which is worth about 20% of private memory usage when making PDBs. However, this is not an unmitigated performance win, because it can be faster to read dense, temporary, heap data than it is to iterate symbol records in object file backed memory a second time.
Results on release chrome.dll: peak mem: 5164.89MB -> 4072.19MB (-1,092.7MB, -21.2%) wall-j1: 0m30.844s -> 0m32.094s (slightly slower) wall-j3: 0m20.968s -> 0m20.312s (slightly faster) wall-j8: 0m19.062s -> 0m17.672s (meaningfully faster)
I gathered similar numbers for a debug, component build of content.dll in Chrome, and the performance impact of this change was in the noise. The memory usage reduction was visible and similar.
Because of the new parallelism in the PDB commit phase, more cores makes the new approach faster. I'm assuming that most C++ developer machines these days are at least quad core, so I think this is a win.
Differential Revision: https://reviews.llvm.org/D94267
|
 | llvm/lib/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.cpp |
 | llvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp |
 | llvm/include/llvm/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.h |
 | lld/COFF/PDB.cpp |
 | lld/COFF/Chunks.h |
 | lld/COFF/Chunks.cpp |
Commit
6f0f0220380f83e8f3bf9832ffa795e9965fda2d
by hansang.bae[OpenMP] Update allocator trait key/value definitions
Use new definitions introduced in 5.1 specification.
Differential Revision: https://reviews.llvm.org/D94277
|
 | openmp/runtime/src/include/omp_lib.h.var |
 | openmp/runtime/src/kmp_alloc.cpp |
 | openmp/runtime/src/include/omp.h.var |
 | openmp/runtime/src/kmp.h |
 | openmp/runtime/src/include/omp_lib.f90.var |
Commit
acea470c167fc40990d9a0f06d625a34d8a4a146
by thakis[gn build] Reorganize libcxx/include/BUILD.gn a bit
- Merge 6706342f48bea80 -- no more libcxx_needs_site_config, we now always need it - Since it was always off in practice, write_config bitrot. Unbitrot it so that it works - Remove copy step and let concat step write to final location immediately -- and fix copy destination directory
As a side effect, libcxx/include/BUILD.gn now has only a single sources list, which means the cmake sync script should be able to automatically sync additions and removals of .h files. On the flipside, this means this file now must be updated after most changes to libcxx/include/__config_site.in, and looking through the last few months of changes this looks like it's going to be a wash.
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
0066a09579ca90f60cb1947691e5a441f9f57a5d
by smeenai[libc++] Give extern templates default visibility on gcc
Contrary to the current visibility macro documentation, it appears that gcc does handle visibility attribute on extern templates correctly, e.g. https://godbolt.org/g/EejuV7. We need this so that extern template instantiations of classes not marked _LIBCPP_TEMPLATE_VIS (e.g. __vector_base_common) are correctly exported with gcc when building with hidden visibility.
Reviewed By: ldionne
Differential Revision: https://reviews.llvm.org/D35388
|
 | libcxx/include/__config |
 | libcxx/docs/DesignDocs/VisibilityMacros.rst |
Commit
bba3a82b56c0874757f2c1423bbdff08e2a88967
by hansang.bae[OpenMP] Use persistent memory for omp_large_cap_mem
This change enables volatile use of persistent memory for omp_large_cap_mem* on supported systems. It depends on libmemkind's support for persistent memory, and requirements/details can be found at the following url.
https://pmem.io/2020/01/20/memkind-dax-kmem.html
Differential Revision: https://reviews.llvm.org/D94353
|
 | openmp/runtime/src/kmp_alloc.cpp |
Commit
914e2f5a02f4f896eec9a00f536d1118bf1d9961
by kai.wang[NFC] Use generic name for scalable vector stack ID.
Differential Revision: https://reviews.llvm.org/D94471
|
 | llvm/test/CodeGen/AArch64/spillfill-sve.mir |
 | llvm/test/CodeGen/AArch64/sve-localstackalloc.mir |
 | llvm/lib/Target/AArch64/AArch64FrameLowering.h |
 | llvm/test/CodeGen/AArch64/framelayout-sve-basepointer.mir |
 | llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll |
 | llvm/test/CodeGen/AArch64/framelayout-sve.mir |
 | llvm/include/llvm/CodeGen/TargetFrameLowering.h |
 | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp |
 | llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir |
 | llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir |
 | llvm/include/llvm/CodeGen/MIRYamlMapping.h |
 | llvm/lib/Target/AMDGPU/SIFrameLowering.cpp |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir |
 | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp |
 | llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir |
 | llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir |
 | llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll |
Commit
e5553b9a6ab9f02f382a31cc5117b52c3bfaf77a
by Jonas Devlieghere[dsymutil] Warn on timestmap mismatch between object file and debug map
Add a warning when the timestmap doesn't match between the object file and the debug map entry. We were already emitting such warnings for archive members and swift interface files. This patch also unifies the warning across all three.
rdar://65614640
Differential revision: https://reviews.llvm.org/D94536
|
 | llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test |
 | llvm/tools/dsymutil/BinaryHolder.cpp |
 | llvm/test/tools/dsymutil/debug-map-parsing.test |
 | llvm/tools/dsymutil/BinaryHolder.h |
 | llvm/tools/dsymutil/DwarfLinkerForBinary.cpp |
 | llvm/test/tools/dsymutil/Inputs/basic.macho.x86_64.o |
Commit
cd8a80de96080da33d0a7d5d5821120ddcfc4ece
by Lang Hames[Orc] Add a unit test for asynchronous definition generation.
|
 | llvm/include/llvm/ExecutionEngine/Orc/Core.h |
 | llvm/lib/ExecutionEngine/Orc/Core.cpp |
 | llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp |
Commit
f454c9f102a7f0df9d2802e30538192d4fe2f97a
by serguei.katkov[InlineSpiller] Re-tie operands if folding failed
InlineSpiller::foldMemoryOperand unties registers before an attempt to fold and does not restore tied-ness in case of failure.
I do not have a particular test for demo of invalid behavior. This is something of clean-up. It is better to keep the behavior correct in case some time in future it happens.
Reviewers: reames, dantrushin Reviewed By: dantrushin, reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D94389
|
 | llvm/lib/CodeGen/InlineSpiller.cpp |
Commit
8a47d875b071823455931bbc119ca1e455559176
by Jonas Devlieghere[dsymutil] Copy eh_frame content into the dSYM companion file.
Copy over the __eh_frame from the binary into the dSYM. This helps kernel developers that are working with only dSYMs (i.e. no binaries) when debugging a core file. This only kicks in when the __eh_frame exists in the linked binary. Most of the time ld64 will remove the section in favor of compact unwind info. When it is emitted, it's generally small enough and should not bloat the dSYM.
rdar://69774935
Differential revision: https://reviews.llvm.org/D94460
|
 | llvm/tools/dsymutil/MachOUtils.cpp |
 | llvm/test/tools/dsymutil/X86/eh_frame.test |
 | llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.out |
 | llvm/test/tools/dsymutil/Inputs/private/tmp/eh_frame/eh_frame.o |
Commit
84e0b14a0a419f26d0a2f7389e06aa8e36569808
by jonathanchesterfield[libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL
[libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D94565
|
 | openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt |
Commit
ad735badb69f389dd52e3ccef93694a0724e1293
by Jonas Devlieghere[dsymutil] s/dwarfdump/llvm-dwarfdump/ in test
|
 | llvm/test/tools/dsymutil/X86/eh_frame.test |
Commit
35e4998f0c9a2f50567f5d2953db266c32fb1a25
by Jonas Devlieghere[dsymutil] Fix spurious space in REQUIRES: line
This test is incorrectly running on non-darwin hosts.
|
 | llvm/test/tools/dsymutil/X86/eh_frame.test |
Commit
790c75c16373d37846c8433a69efd9b0d5e4ad12
by carl.ritson[AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader
Add pseudo instruction to allow early termination of pixel shader anywhere based on the value of SCC. The intention is to use this when a mask of live lanes is updated, e.g. live lanes in WQM pass. This facilitates early termination of shaders even when EXEC is incomplete, e.g. in non-uniform control flow.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D88777
|
 | llvm/lib/Target/AMDGPU/SIInsertSkips.cpp |
 | llvm/test/CodeGen/AMDGPU/early-term.mir |
 | llvm/lib/Target/AMDGPU/SIInstructions.td |
Commit
157efd84abf812c1689ba6a9ecb4da2b87dde756
by serguei.katkov[Statepoint Lowering] Add an option to allow use gc values in regs for landing pad
Default value is not changed, so it is NFC actually.
The option allows to use gc values on registers in landing pads.
Reviewers: reames, dantrushin Reviewed By: reames, dantrushin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D94469
|
 | llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp |
Commit
fba9805ba3491db03ad538ea2db2f225f57ff98e
by serguei.katkov[Verifier] Extend statepoint verifier to cover more constants
Also old mir tests are updated to meet last changes in STATEPOINT format.
Reviewers: reames, dantrushin Reviewed By: reames, dantrushin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D94482
|
 | llvm/lib/CodeGen/StackMaps.cpp |
 | llvm/include/llvm/CodeGen/StackMaps.h |
 | llvm/test/CodeGen/X86/statepoint-fixup-call.mir |
 | llvm/test/CodeGen/X86/non-value-mem-operand.mir |
 | llvm/lib/CodeGen/MachineVerifier.cpp |
 | llvm/test/CodeGen/X86/statepoint-fixup-copy-prop-neg.mir |
Commit
12fc9ca3a4037a26d4bc0ac98213c846ad96e51b
by kazu[llvm] Remove redundant string initialization (NFC)
Identified with readability-redundant-string-init.
|
 | llvm/lib/Analysis/CallPrinter.cpp |
 | llvm/lib/Analysis/ConstraintSystem.cpp |
 | llvm/lib/Transforms/IPO/Attributor.cpp |
 | llvm/tools/llvm-ifs/llvm-ifs.cpp |
 | llvm/lib/Target/Mips/MipsRegisterBankInfo.h |
 | llvm/tools/llvm-objdump/MachODump.cpp |
 | llvm/utils/TableGen/CodeGenInstruction.cpp |
 | llvm/utils/TableGen/RISCVCompressInstEmitter.cpp |
 | llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp |
 | llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp |
 | llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp |
 | llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp |
 | llvm/include/llvm/LTO/Config.h |
 | llvm/utils/TableGen/CodeGenDAGPatterns.cpp |
 | llvm/utils/TableGen/GlobalISelEmitter.cpp |
 | llvm/utils/TableGen/CodeGenMapTable.cpp |
 | llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp |
Commit
2c2d489b78c43072b65f3d8c88c91def4c69f320
by kazu[CodeGen] Remove unused function isRegLiveInExitBlocks (NFC)
The last use was removed on Jan 17, 2020 in commit 42350cd893a9cf6c199b17441dc2ba526c7cca71.
|
 | llvm/include/llvm/CodeGen/MachineLoopUtils.h |
 | llvm/lib/CodeGen/MachineLoopUtils.cpp |
Commit
8a20e2b3d3e149f9e40dc34673fce7953d985c24
by kazu[llvm] Use Optional::getValueOr (NFC)
|
 | llvm/utils/TableGen/GlobalISelEmitter.cpp |
 | llvm/lib/Target/XCore/XCoreTargetMachine.cpp |
 | llvm/lib/Target/AVR/AVRTargetMachine.cpp |
 | llvm/lib/Analysis/InlineAdvisor.cpp |
 | llvm/lib/Transforms/Utils/LoopUtils.cpp |
 | llvm/lib/Target/ARC/ARCTargetMachine.cpp |
 | llvm/lib/Target/BPF/BPFTargetMachine.cpp |
 | llvm/lib/Target/Lanai/LanaiTargetMachine.cpp |
 | llvm/lib/Target/CSKY/CSKYTargetMachine.cpp |
 | llvm/lib/Transforms/Utils/InlineFunction.cpp |
 | llvm/lib/Target/VE/VETargetMachine.cpp |
 | llvm/lib/Target/Sparc/SparcTargetMachine.cpp |
 | llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp |
Commit
f1d5cbbdee5526bc86eac0a5652b115d9bc158e5
by Jonas Devlieghere[dsymutil] Add preliminary support for DWARF 5.
Currently dsymutil will silently fail when processing binaries with Dwarf 5 debug info. This patch adds rudimentary support for Dwarf 5 in dsymutil.
- Recognize relocations in the debug_addr section. - Recognize (a subset of) Dwarf 5 form values. - Emits valid Dwarf 5 compile unit header chains.
To simplify things (and avoid having to emit indexed sections) I decided to emit the relocated addresses directly in the debug info section.
- DW_FORM_strx gets relocated and rewritten to DW_FORM_strp - DW_FORM_addrx gets relocated and rewritten to DW_FORM_addr
Obviously there's a lot of work left, but this should be a step in the right direction.
rdar://62345491
Differential revision: https://reviews.llvm.org/D94323
|
 | llvm/test/tools/dsymutil/Inputs/private/tmp/dwarf5/dwarf5.out |
 | llvm/test/tools/dsymutil/X86/dwarf5.test |
 | llvm/include/llvm/DWARFLinker/DWARFLinkerCompileUnit.h |
 | llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp |
 | llvm/tools/dsymutil/DwarfLinkerForBinary.h |
 | llvm/include/llvm/DWARFLinker/DWARFLinker.h |
 | llvm/include/llvm/DWARFLinker/DWARFStreamer.h |
 | llvm/lib/DWARFLinker/DWARFStreamer.cpp |
 | llvm/tools/dsymutil/DwarfLinkerForBinary.cpp |
 | llvm/lib/DWARFLinker/DWARFLinker.cpp |
 | llvm/test/tools/dsymutil/Inputs/private/tmp/dwarf5/dwarf5.o |
Commit
0b99385e151c7cb674d6d29acfe92680f7148434
by jianzhouzh[MSan] Partially revert some changes from D94552
Because of line 55, actually aligned_beg always equals to beg.
|
 | compiler-rt/lib/msan/msan_poisoning.cpp |
Commit
8f8c207b8f2e69be652ef7afa30a92312bbb2bf0
by serguei.katkov[Verifier] Add tied-ness verification to statepoint intsruction
Reviewers: reames, dantrushin Reviewed By: reames, dantrushin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D94483
|
 | llvm/lib/CodeGen/MachineVerifier.cpp |
 | llvm/test/MachineVerifier/verifier-statepoint.mir |
Commit
3aeb30d1a68a76616c699587e07a7d8880c29d1c
by david.green[ARM] Additional tests for different interleaving patterns. NFC
|
 | llvm/test/CodeGen/Thumb2/mve-shuffleext.ll |
 | llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll |
 | llvm/test/CodeGen/Thumb2/mve-vcvt.ll |
 | llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll |
Commit
141906fa149ffaa37bb5b65e9890ab1f0f3effd5
by grimar[llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHNDX sections.
Currently we don't support multiple SHT_SYMTAB_SHNDX sections and the DT_SYMTAB_SHNDX tag currently.
This patch implements it and fixes the https://bugs.llvm.org/show_bug.cgi?id=43991.
I had to introduce the `struct DataRegion` to ELF.h, it is used to represent a region that might have no known size. It is needed, because we don't know the size of the extended section indices table when it is located via DT_SYMTAB_SHNDX. In this case we still want to validate that we don't read past the end of the file.
Differential revision: https://reviews.llvm.org/D92923
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 | llvm/test/tools/yaml2obj/ELF/sht-symtab-shndx.yaml |
 | llvm/test/tools/obj2yaml/ELF/sht-symtab-shndx.yaml |
 | llvm/include/llvm/Object/ELF.h |
 | llvm/test/Object/invalid.test |
 | llvm/test/tools/llvm-readobj/ELF/section-symbols.test |
 | llvm/test/tools/llvm-readobj/ELF/dyn-symbols.test |
 | llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test |
 | llvm/test/tools/llvm-readobj/ELF/mips-got.test |
 | llvm/test/tools/llvm-readobj/ELF/symbol-shndx.test |
 | llvm/unittests/Object/ELFTest.cpp |
 | llvm/test/tools/llvm-readobj/ELF/mips-plt.test |
 | llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test |
 | llvm/tools/llvm-readobj/ELFDumper.cpp |
Commit
c29ca8551afff316976c2befcd65eeef53798499
by david.green[ARM] Update isVMOVNOriginalMask to handle single input shuffle vectors
The isVMOVNOriginalMask was previously only checking for two input shuffles that could be better expanded as vmovn nodes. This expands that to single input shuffles that will later be legalized to multiple vectors.
Differential Revision: https://reviews.llvm.org/D94189
|
 | llvm/lib/Target/ARM/ARMISelLowering.cpp |
 | llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll |
Commit
6d3098e7ff968ad7d3033d7751af05a1fcd2ed9b
by grimar[obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field.
This reuses the code from yaml2obj (moves it to ELFYAML.h). With it we can set the `sh_entsize` in a single place in `obj2yaml`.
Note that it also fixes a bug of `yaml2obj`: we do not set the `sh_entsize` field for the `SHT_ARM_EXIDX` section properly.
Differential revision: https://reviews.llvm.org/D93858
|
 | llvm/tools/obj2yaml/elf2yaml.cpp |
 | llvm/include/llvm/ObjectYAML/ELFYAML.h |
 | llvm/test/tools/obj2yaml/ELF/sht-symtab-shndx.yaml |
 | llvm/test/tools/obj2yaml/ELF/call-graph-profile-section.yaml |
 | llvm/test/Object/obj2yaml.test |
 | llvm/test/tools/obj2yaml/ELF/mips-abi-flags.yaml |
 | llvm/test/tools/obj2yaml/ELF/versym-section.yaml |
 | llvm/lib/ObjectYAML/ELFEmitter.cpp |
 | llvm/test/tools/yaml2obj/ELF/arm-exidx-section.yaml |
Commit
cbea6737d5130724c7c8cf8ee4ccf1c3dd099450
by andrzej.warzynski[clang][driver] Restore the original help text for `-I`
The help text for `-I` was recently expanded in [1]. The expanded version focuses on explaining the semantics of `-I` in Clang. We are now in the process of adding support for `-I` in Flang and this new description is incompatible with the semantics of `-I` in Flang. This was brought up in this review: * https://reviews.llvm.org/D93453
This patch reverts the original change in Options.td. This way the help text for `-I` remains generic enough so that it applies to both Clang and Flang.
The expanded description of `-I` from [1] is moved to the `DocBrief` field for `-I`. This field is prioritised over the help text when generating ClangCommandLineReference.rst, so the user facing documentation for Clang retains the expanded description: * https://clang.llvm.org/docs/ClangCommandLineReference.html `DocBrief` fields are currently not used in Flang.
As requested in the reviews, the help text and the expanded description are slightly refined.
[1] Commit: 8dd4e3ceb804a58bcf25e6856fc6fde5e1995a66
Differential Revision: https://reviews.llvm.org/D94169
|
 | clang/docs/ClangCommandLineReference.rst |
 | clang/include/clang/Driver/Options.td |
Commit
f638c2eb4ee6d0a0bd0e80cd305ad93e382db8f5
by flo[LTO] Replace anonymous namespace with static functions (NFC).
Only class declarations should be inside anonymous namespaces (https://llvm.org/docs/CodingStandards.html#anonymous-namespaces)
Instead of using a anonymous namespace, just mark the functions in it as static (some of them already were).
This simplifies the diff for D94486.
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 | llvm/lib/LTO/LTOBackend.cpp |
Commit
4cd48535eca06245c89a9158844bb177c6f8eb63
by david.sherwood[NFC][InstructionCost] Use InstructionCost in Transforms/Scalar/RewriteStatepointsForGC.cpp
In places where we calculate costs using TTI.getXXXCost() interfaces I have changed the code to use InstructionCost instead of unsigned. The change is non functional since InstructionCost behaves in the same way as an integer for valid costs. Currently the getXXXCost() functions used in this file do not return invalid costs.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174 See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Differential revision: https://reviews.llvm.org/D94484
|
 | llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp |
Commit
3122c66aee7b709046753873c4e94db73742b3de
by joe.ellis[AArch64][SVE] Remove chains of unnecessary SVE reinterpret intrinsics
This commit extends SVEIntrinsicOpts::optimizeConvertFromSVBool to identify and remove longer chains of redundant SVE reintepret intrinsics. For example, the following chain of redundant SVE reinterprets is now recognised as redundant:
%a = <vscale x 2 x i1> %1 = <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool(<vscale x 2 x i1> %a) %2 = <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool(<vscale x 16 x i1> %1) %3 = <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool(<vscale x 4 x i1> %2) %4 = <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool(<vscale x 16 x i1> %3) %5 = <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool(<vscale x 4 x i1> %4) %6 = <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool(<vscale x 16 x i1> %5) ret <vscale x 2 x i1> %6
and will be replaced with:
ret <vscale x 2 x i1> %a
Eliminating these can sometimes mean emitting fewer unnecessary loads/stores when lowering to assembly.
Differential Revision: https://reviews.llvm.org/D94074
|
 | llvm/test/CodeGen/AArch64/sve-intrinsic-opts-reinterpret.ll |
 | llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp |
Commit
0f59d099571d3d803b54e2ce06aa94babb9b26db
by llvm-dev[X86][AVX] combineVectorSignBitsTruncation - limit AVX512 truncations to 128-bits (PR48727)
rG73a44f437bf1 result in 256-bit packss/packus ops with additional shuffles that shuffle combining can sometimes try to convert back into a truncation.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/vector-pack-256.ll |
 | llvm/test/CodeGen/X86/pr48727.ll |
Commit
ad85e3967067154a579f7989ce0e736f8cd56be9
by cullen.rhodes[SVE] Add ISel pattern for addvl
Reviewed By: cameron.mcinally
Differential Revision: https://reviews.llvm.org/D94504
|
 | llvm/test/CodeGen/AArch64/sve-gep.ll |
 | llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll |
 | llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td |
 | llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll |
 | llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll |
 | llvm/test/CodeGen/AArch64/split-vector-insert.ll |
 | llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll |
 | llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll |
Commit
1854594b80b444dc21b830b51e53e05d38fc7d60
by matthew.malcomsonHwasan InitPrctl check for error using internal_iserror
When adding this function in https://reviews.llvm.org/D68794 I did not notice that internal_prctl has the API of the syscall to prctl rather than the API of the glibc (posix) wrapper.
This means that the error return value is not necessarily -1 and that errno is not set by the call.
For InitPrctl this means that the checks do not catch running on a kernel *without* the required ABI (not caught since I only tested this function correctly enables the ABI when it exists). This commit updates the two calls which check for an error condition to use `internal_iserror`. That function sets a provided integer to an equivalent errno value and returns a boolean to indicate success or not.
Tested by running on a kernel that has this ABI and on one that does not. Verified that running on the kernel without this ABI the current code prints the provided error message and does not attempt to run the program. Verified that running on the kernel with this ABI the current code does not print an error message and turns on the ABI. All tests done on an AArch64 Linux machine.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D94425
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 | compiler-rt/lib/hwasan/hwasan_linux.cpp |
Commit
ceb9379a90f5a320d19f5694ef00b4d1164fa7d6
by n.james93[ADT] Fix join_impl using the wrong size when calculating total length
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D83305
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 | llvm/include/llvm/ADT/StringExtras.h |
Commit
ada96fa62179d2addd6c85a02381f1353fe7a2d1
by flo[LTO] Add test to ensure objc-arc-contract is executed.
This test adds additional test coverage for upcoming refactorings.
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 | llvm/test/LTO/X86/objc-arc-contract.ll |
Commit
af1bb4bc823f823df9869d354f639ee86b83d747
by n.james93Fix build errors after ceb9379a9
For some reason some builds dont like the arrow operator access. using the deref then access should fix the issue.
/home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/llvm/include/llvm/ADT/iterator.h:171:34: error: taking the address of a temporary object of type 'llvm::StringRef' [-Waddress-of-temporary] PointerT operator->() { return &static_cast<DerivedT *>(this)->operator*(); } ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ /home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/llvm/include/llvm/ADT/StringExtras.h:387:13: note: in instantiation of member function 'llvm::iterator_facade_base<llvm::mapped_iterator<mlir::tblgen::TypeParameter *, (lambda at /home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/mlir/tools/mlir-tblgen/TypeDefGen.cpp:414:19), llvm::StringRef>, std::random_access_iterator_tag, llvm::StringRef, long, llvm::StringRef *, llvm::StringRef &>::operator->' requested here Len += I->size();
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 | llvm/include/llvm/ADT/StringExtras.h |
Commit
c6e341c89957db31432baffb72ee015f37d8c48d
by daveRevert "[dsymutil] Warn on timestmap mismatch between object file and debug map"
This reverts commit e5553b9a6ab9f02f382a31cc5117b52c3bfaf77a.
Tests are not allowed to modify the source. Please figure out a way to use %t rather than dynamically modifying the inputs.
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 | llvm/test/tools/dsymutil/debug-map-parsing.test |
 | llvm/tools/dsymutil/BinaryHolder.cpp |
 | llvm/tools/dsymutil/DwarfLinkerForBinary.cpp |
 | llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test |
 | llvm/tools/dsymutil/BinaryHolder.h |
 | llvm/test/tools/dsymutil/Inputs/basic.macho.x86_64.o |
Commit
2170e0ee60db638175a8c57230d46fbaafa06d4c
by kerry.mclaughlin[SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates)
Canonicalise the following operations in getNode() for predicate types: - CTLZ(Pred) -> bitwise_NOT(Pred) - CTTZ(Pred) -> bitwise_NOT(Pred) - CTPOP(Pred) -> Pred
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D94428
|
 | llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
Commit
f8cece18630575dccd62ba6a12f21acf5fd38c26
by markus.lavin[ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/
Handle if Constant::getAggregateElement() returns nullptr in canCreateUndefOrPoison().
Differential Revision: https://reviews.llvm.org/D94494
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 | llvm/unittests/Analysis/ValueTrackingTest.cpp |
 | llvm/lib/Analysis/ValueTracking.cpp |
Commit
704831fe1f1f02e41ab7440a6f6c2c390ec183b1
by thakisRevert "Hwasan InitPrctl check for error using internal_iserror"
This reverts commit 1854594b80b444dc21b830b51e53e05d38fc7d60. See https://reviews.llvm.org/D94425#2495621
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 | compiler-rt/lib/hwasan/hwasan_linux.cpp |
Commit
d307d892ade9384a5d8b40ddb6a9c0b2dffbdb81
by Dávid Bolvanský[Tests] Added test for memcpy loop idiom recognization
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 | llvm/test/Transforms/LoopIdiom/memcpy.ll |
Commit
0a0ee7f5a5af0f5dae65452f649ab665e787e7d6
by llvm-dev[X86] canonicalizeShuffleMaskWithHorizOp - minor refactor to support multiple src ops. NFCI.
canonicalizeShuffleMaskWithHorizOp currently only supports shuffles with 1 or 2 sources, but PR41813 will require us to support higher numbers of sources.
This patch just generalizes the initial setup stages to ensure all src ops are the same type and opcode and then will continue to early out if we have more than 2 sources.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
ab577807165c45abfbadc117125ec7275cdcc0cf
by gchatelet[libc] Refresh benchmark progress bar when needed.
|
 | libc/benchmarks/LibcMemoryBenchmarkMain.cpp |
Commit
7c77b536efdd953d6d97bffbd9ca320c517b26d7
by sven.vanhaastregt[OpenCL] Improve OpenCL operator tests
Extend testing of increment/decrement operators and make sure these operators are tested in only one dedicated test file.
Rename logical-ops.cl to operators.cl, as it was already containing more than just logical operators.
Add testing for the remainder operator on floating point types.
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 | clang/test/SemaOpenCL/vector_inc_dec_ops.cl |
 | clang/test/SemaOpenCL/operators.cl |
 | clang/test/SemaOpenCL/invalid-vector-literals.cl |
 | clang/test/SemaOpenCL/logical-ops.cl |
Commit
b7b1e8c37a920fcf2755a99fbf78cc570cf76c60
by flo[X86] Add tests for rv_marker lowering.
Precommit tests for D94597.
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 | llvm/test/CodeGen/X86/call-rv-marker.ll |
Commit
3bc7555ffac0a803e44c4b1462e0c4c5eee865ea
by antiagainst[mlir][linalg] Use attributes in named ops' indexing maps
This commit adds support for parsing attribute uses in indexing maps. These attribute uses are represented as affine symbols in the resultant indexing maps because we can only know their concrete value (which are coming from op attributes and are constants) for specific op instances. The `indxing_maps()` calls are synthesized to read these attributes and create affine constants to replace the placeholder affine symbols and simplify.
Depends on D94240
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D94335
|
 | mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc |
 | mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp |
 | mlir/docs/Dialects/Linalg.md |
Commit
90164ba957a2532daef6515d7114af69eca025a7
by sam.mccall[clangd] Split out a base class for delegating GlobalCompilationDatabases. NFC
This prepares for adding another delegatable method (blockUntilIdle) to GCDB.
|
 | clang-tools-extra/clangd/QueryDriverDatabase.cpp |
 | clang-tools-extra/clangd/GlobalCompilationDatabase.h |
 | clang-tools-extra/clangd/GlobalCompilationDatabase.cpp |
Commit
dda60035e9f0769c8907cdf6561489e0435c2275
by nicholas.guy[AArch64] Attempt to sink mul operands
Following on from D91255, this patch is responsible for sinking relevant mul operands to the same block so that umull/smull instructions can be correctly generated by the mul combine implemented in the aforementioned patch.
Differential revision: https://reviews.llvm.org/D91271
|
 | llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
Commit
d55d592a921f1cd6a922bff0000f6662f8722d9c
by Matthew.ArsenaultGlobalISel: Do not set observer of MachineIRBuilder in LegalizerHelper
This fixes double printing of insertion debug messages in the legalizer.
Try to cleanup usage of observers. Currently the use of observers is pretty hard to follow and it's not clear what is responsible for them. Observers are referenced in 3 places:
1. In the MachineFunction 2. In the MachineIRBuilder 3. In the LegalizerHelper
The observers in the MachineFunction and MachineIRBuilder are both called only on insertions, and are redundant with each other. The source of the double printing was the same observer was added to both the MachineFunction, and the MachineIRBuilder. One of these references needs to be removed. Arguably observers in general should be fully removed from one or the other, but it may be useful to have a local observer in the MachineIRBuilder that is not added to the function's observers. Alternatively, the wrapper observer could manage a local observer in one place.
The LegalizerHelper only ever calls the observer on changing/changed instructions, and never insertions. Logically these are two different types of observers, for changes and for insertions.
Additionally, some places used the GISelObserverWrapper when they only needed a single observer they could use directly.
Setting the observer in the LegalizerHelper constructor is not flexible enough if the LegalizerHelper is constructed anywhere outside the one used by the legalizer. AMDGPU calls the LegalizerHelper in RegBankSelect, and needs to use a local observer to apply the regbank to newly created instructions. Currently it accomplishes this by constructing a local MachineIRBuilder. I'm trying to move the MachineIRBuilder to be owned/maintained by the RegBankSelect pass itself, but the locally constructed LegalizerHelper would reset the observer.
Mips also has a special case use of the LegalizationArtifactCombiner in applyMappingImpl; I think we do need to run the artifact combiner during RegBankSelect, but in a more consistent way outside of applyMappingImpl.
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 | llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h |
 | llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir |
Commit
350c0552c66bf0ca6907b6aa8cede425dedde516
by kai.wang[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.
Differential Revision: https://reviews.llvm.org/D94584
|
 | llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll |
Commit
4e8e888905a4258932dcb593a5531a6329cc821a
by muhammad.asif.manzoor[AArch64][GlobalISel] Add support for FCONSTANT of FP128 type
Add support for G_FCONSTANT of FP128 (Quadruple precision) type. It replaces the constant by emitting a load with a constant pool entry.
Reviewed By: aemerson
Differential Revision: https://reviews.llvm.org/D94437
|
 | llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll |
 | llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir |
 | llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp |
Commit
07b6aeb5685fa6474cbeae797ebc5ea1f17da0f7
by sbc[lld][WebAssembly] Fix for TLS + --relocatable
When running in `-r/--relocatable` we output relocations but the new TLS relocations type was missing from `ObjFile::calcNewAddend` causing this combination of inputs/flags to crash the linker.
Also avoid creating tls variables in relocatable mode. These variables are only needed when linking final executables.
Fixes: https://github.com/emscripten-core/emscripten/issues/12934 Fixes: PR48506
Differential Revision: https://reviews.llvm.org/D93554
|
 | lld/wasm/Driver.cpp |
 | lld/wasm/Writer.cpp |
 | lld/wasm/InputFiles.cpp |
 | lld/test/wasm/tls.s |
 | lld/test/wasm/tls-no-shared.s |
Commit
f0abe2aeaca76a24b1e17295ab797068c057a15d
by Xiangling.Liao[Frontend] Add pragma align natural and sort out pragma pack stack effect
- Implemente the natural align for XL on AIX - Sort out pragma pack stack effect - Add -fxl-pragma-stack option to enable XL on AIX pragma stack effect
Differential Revision: https://reviews.llvm.org/D87702
|
 | clang/lib/Serialization/ASTWriter.cpp |
 | clang/lib/AST/RecordLayoutBuilder.cpp |
 | clang/lib/Driver/ToolChains/Clang.cpp |
 | clang/test/Layout/aix-power-natural-interaction.cpp |
 | clang/include/clang/Basic/LangOptions.def |
 | clang/lib/Parse/ParsePragma.cpp |
 | clang/include/clang/Serialization/ASTWriter.h |
 | clang/lib/Sema/Sema.cpp |
 | clang/lib/Sema/SemaAttr.cpp |
 | clang/include/clang/Driver/Options.td |
 | clang/test/Sema/aix-pragma-pack-and-align.c |
 | clang/test/Driver/aix-pragma-pack.c |
 | clang/test/PCH/aix-pragma-pack.c |
 | clang/include/clang/Basic/Attr.td |
 | clang/include/clang/Serialization/ASTReader.h |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/test/Layout/aix-double-struct-member.cpp |
 | clang/lib/Frontend/CompilerInvocation.cpp |
 | clang/lib/Serialization/ASTReader.cpp |
 | clang/include/clang/Sema/Sema.h |
Commit
a957634942a48c963a8ed99b1bb90f7b985a3602
by jhuber6[OpenMP] Add documentation for error messages and release notes
Add extra information to the runtime page describing the error messages and add information to the release notes for clang 12.0
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D94562
|
 | openmp/docs/ReleaseNotes.rst |
 | openmp/docs/design/Runtimes.rst |
Commit
4fe17ada55ade9b77e18521dae0985cb4a88f6c4
by nawrin.sultana[OpenMP] Fix hierarchical barrier
Hierarchical barrier is an experimental barrier algorithm that uses aspects of machine hierarchy to define the barrier tree structure. This patch fixes offset calculation in hierarchical barrier. The offset is used to store info on a flag about sleeping threads waiting on a location stored in the flag. This commit also fixes a potential deadlock in hierarchical barrier when using infinite blocktime by adjusting the offset value of leaf kids so that it matches the value of leaf state. It also adds testing of default barriers with infinite blocktime, and also tests hierarchical barrier algorithm with both default and infinite blocktime.
Patch by Terry Wilmarth and Nawrin Sultana.
Differential Revision: https://reviews.llvm.org/D94241
|
 | openmp/runtime/src/kmp_barrier.cpp |
 | openmp/runtime/test/barrier/omp_barrier.c |
Commit
66d5994bd38a9be4a0c05de2b69f88b64e6845ce
by sam.mccall[clangd] Explicitly avoid background-indexing the same file twice.
This used to implicitly never happen due to only discovering each CDB once.
We may want to carefully support reindexing one day, but we need to do it carefully (tricky tradeoffs) and it would need further support in background indexer.
Making this explicit here rather than just turning off rebroadcast in background index for a few reasons: - allows *new* files in the same CDB to be indexed - relying on bugs-at-a-distance cancelling each other out is bound to bite us - gets us closer to actually supporting reindexing, which requires similar tracking
Differential Revision: https://reviews.llvm.org/D94503
|
 | clang-tools-extra/clangd/index/Background.h |
 | clang-tools-extra/clangd/index/Background.cpp |
 | clang-tools-extra/clangd/index/BackgroundQueue.cpp |
 | clang-tools-extra/clangd/unittests/BackgroundIndexTests.cpp |
Commit
466acd694861138997d668a3f9cb29aa87bd316e
by sam.mccall[clangd] Avoid reallocating buffers for each message read:
- reuse std::string we read messages into - when reading line-wise, use SmallVector<128> and read in chunks of 128 (this affects headers, which are short, and tests, which don't matter)
Differential Revision: https://reviews.llvm.org/D93653
|
 | clang-tools-extra/clangd/JSONTransport.cpp |
Commit
e433ca28ec923929efe4f6babb8d33b4e6673ac1
by spatel[SLP] add reduction test for FMF; NFC
|
 | llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll |
Commit
17863614da1efbe61e91c9f6f08ad80cdd257bb4
by nikita.ppv[InstCombine] Fold select -> and/or using impliesPoison
We can fold a ? b : false to a & b if is_poison(b) implies that is_poison(a), at which point we're able to reuse all the usual fold on ands. In particular, this covers the very common case of icmp X, C && icmp X, C'. The same applies to ors.
This currently only has an effect if the -instcombine-unsafe-select-transform=0 option is set.
Differential Revision: https://reviews.llvm.org/D94550
|
 | llvm/test/Transforms/InstCombine/select-and-or.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp |
Commit
a4f386688239b06e09f28fd31f93bf761aa9c76f
by usx[clangd] Remove "decision-forest-base" experimental flag.
The value of this flag can only be fine tuned by using A/B testing on large user base. We do not expect individual users to use and fine tune this flag.
Differential Revision: https://reviews.llvm.org/D94513
|
 | clang-tools-extra/clangd/tool/ClangdMain.cpp |
Commit
0bbc6a6bb643af69baaf85f7f380dbcfe1f5ad54
by sam.mccall[clangd] Remove some old CodeCompletion options that are never (un)set. NFC
|
 | clang-tools-extra/clangd/CodeComplete.h |
 | clang-tools-extra/clangd/CodeComplete.cpp |
 | clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp |
Commit
05b1a15f703c3e01f4123424700bc37188af8af1
by andrew.litteken[IROutliner] Adapting to hoisted bitcasts in CodeExtractor
In commit 700d2417d8281ea56dfd7ac72d1a1473d03d2d59 the CodeExtractor was updated so that bitcasts that have lifetime markers that beginning outside of the region are deduplicated outside the region and are not used as an output. This caused a discrepancy in the IROutliner, where in these cases there were arguments added to the aggregate function that were not needed causing assertion errors.
The IROutliner queries the CodeExtractor twice to determine the inputs and outputs, before and after `findAllocas` is called with the same ValueSet for the outputs causing the duplication. This has been fixed with a dummy ValueSet for the first call.
However, the additional bitcasts prevent us from using the same similarity relationships that were previously defined by the IR Similarity Analysis Pass. In these cases, we check whether the initial version of the region being analyzed for outlining is still the same as it was previously. If it is not, i.e. because of the additional bitcast instructions from the CodeExtractor, we discard the region.
Reviewers: yroux
Differential Revision: https://reviews.llvm.org/D94303
|
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
 | llvm/test/Transforms/IROutliner/outlining-bitcasts.ll |
Commit
48d2068fb738302b9fba91c9bf8e4b051c3909eb
by Jonas Devlieghere[dsymutil] Warn on timestmap mismatch between object file and debug map
This re-lands e5553b9a6ab9 with two small fixes to the tests:
- Don't touch the source directory in debug-map-parsing.test but instead copy everything over in a temporary directory in timestamp-mismatch.test. - Don't redirect stderr to stdout to avoid the output getting intertwined in extern-alias.test.
|
 | llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test |
 | llvm/test/tools/dsymutil/ARM/extern-alias.test |
 | llvm/tools/dsymutil/BinaryHolder.cpp |
 | llvm/test/tools/dsymutil/debug-map-parsing.test |
 | llvm/tools/dsymutil/DwarfLinkerForBinary.cpp |
 | llvm/test/tools/dsymutil/X86/timestamp-mismatch.test |
 | llvm/tools/dsymutil/BinaryHolder.h |
Commit
cbbfc8258615bc971a54c6287abe33c4215d2eac
by llvm-dev[X86][SSE] canonicalizeShuffleMaskWithHorizOp - simplify shuffle(HOP(HOP(X,Y),HOP(Z,W))) style chains.
See if we can remove the shuffle by resorting a HOP chain so that the HOP args are pre-shuffled.
This initial version just handles (the most common) v4i32/v4f32 hadd/hsub reduction patterns - future work can extend this to v8i16 types plus PACK chains (2f64 HADD/HSUB should already be handled in the half-lane combine code later on).
|
 | llvm/test/CodeGen/X86/horizontal-sum.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
efb6e45d2be8e3e0843bdc4c2766e6910083c08e
by llvm-dev[X86][AVX] Add test for another 'reverse HADD' pattern mentioned in PR41813
|
 | llvm/test/CodeGen/X86/haddsub-4.ll |
Commit
993c488ed2b347011d9d71990af38a82aaf5bdf5
by llvm-dev[DAG] visitVECTOR_SHUFFLE - use all_of to check for all-undef shuffle mask. NFCI.
|
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
Commit
60fda8ebb6dc4e2ac1cc181c0ab8019c4309cb22
by samuel.tebbs[ARM] Add a pass that re-arranges blocks when there is a backwards WLS branch
Blocks can be laid out such that a t2WhileLoopStart branches backwards. This is forbidden by the architecture and so it fails to be converted into a low-overhead loop. This new pass checks for these cases and moves the target block, fixing any fall-through that would then be broken.
Differential Revision: https://reviews.llvm.org/D92385
|
 | llvm/lib/Target/ARM/CMakeLists.txt |
 | llvm/lib/Target/ARM/ARM.h |
 | llvm/test/CodeGen/ARM/O3-pipeline.ll |
 | llvm/lib/Target/ARM/ARMBlockPlacement.cpp |
 | llvm/lib/Target/ARM/ARMTargetMachine.cpp |
 | llvm/test/CodeGen/Thumb2/block-placement.mir |
Commit
14f322f074b933af1e26bf6288b88ec2e7c3a551
by llvmgnsyncbot[gn build] Port 60fda8ebb6d
|
 | llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn |
Commit
a50bb84ec0c2d47a2a7403ad29842ca48cd6b828
by pklausler[flang] Fix classification of shape inquiries in specification exprs
In some contexts, including the motivating case of determining whether the expressions that define the shape of a variable are "constant expressions" in the sense of the Fortran standard, expression rewriting via Fold() is not necessary, and should not be required. The inquiry intrinsics LBOUND, UBOUND, and SIZE work correctly now in specification expressions and are classified correctly as being constant expressions (or not). Getting this right led to a fair amount of API clean-up as a consequence, including the folding of shapes and TypeAndShape objects, and new APIs for shapes that do not fold for those cases where folding isn't needed. Further, the symbol-testing predicate APIs in Evaluate/tools.h now all resolve any associations of their symbols and work transparently on use-, host-, and construct-association symbols; the tools used to resolve those associations have been defined and documented more precisely, and their clients adjusted as needed.
Differential Revision: https://reviews.llvm.org/D94561
|
 | flang/lib/Evaluate/shape.cpp |
 | flang/test/Semantics/shape.f90 |
 | flang/lib/Semantics/check-declarations.cpp |
 | flang/lib/Semantics/check-call.cpp |
 | flang/include/flang/Evaluate/shape.h |
 | flang/include/flang/Evaluate/type.h |
 | flang/include/flang/Semantics/tools.h |
 | flang/lib/Evaluate/fold.cpp |
 | flang/lib/Evaluate/characteristics.cpp |
 | flang/lib/Evaluate/tools.cpp |
 | flang/test/Semantics/resolve44.f90 |
 | flang/include/flang/Evaluate/fold.h |
 | flang/include/flang/Evaluate/tools.h |
 | flang/lib/Semantics/check-do-forall.cpp |
 | flang/lib/Semantics/resolve-names.cpp |
 | flang/lib/Semantics/tools.cpp |
 | flang/lib/Evaluate/check-expression.cpp |
 | flang/include/flang/Evaluate/characteristics.h |
 | flang/lib/Evaluate/intrinsics.cpp |
 | flang/lib/Semantics/semantics.cpp |
 | flang/test/Semantics/data04.f90 |
Commit
a2e6506c47b1ab8cb085aa485fd0abf980a47a05
by kparzysz[Hexagon] Improve legalizing of ISD::SETCC result
|
 | llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp |
Commit
123674a816742254debdfcc978026b8107b502d8
by spatel[SLP] simplify type check for reductions
This is NFC-intended. The 'valid' call allows int/FP/pointers for other parts of SLP. The difference here is that we can't reduce pointers.
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
166e5c335cbe9f8144a7822ca655dc3352ec9e56
by pklausler[flang] Do not create HostAssoc symbols in derived type scopes
When needed due to a specification expression in a derived type, the host association symbols should be created in the surrounding subprogram's scope instead.
Differential Revision: https://reviews.llvm.org/D94567
|
 | flang/lib/Semantics/resolve-names.cpp |
Commit
b3154d11bc6dee59e581b731b7561f1ebab3aed6
by wlei[CSSPGO][llvm-profgen] Pseudo probe decoding and disassembling
This change implements pseudo probe decoding and disassembling for llvm-profgen/CSSPGO. Please see https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s and https://reviews.llvm.org/D89707 for more context about CSSPGO and llvm-profgen.
**ELF section format** Please see the encoding patch(https://reviews.llvm.org/D91878) for more details of the format, just copy the example here:
Two section(`.pseudo_probe_desc` and  `.pseudoprobe` ) is emitted in ELF to support pseudo probe. The format of `.pseudo_probe_desc` section looks like:
``` .section .pseudo_probe_desc,"",@progbits .quad 6309742469962978389 // Func GUID .quad 4294967295 // Func Hash .byte 9 // Length of func name .ascii "_Z5funcAi" // Func name .quad 7102633082150537521 .quad 138828622701 .byte 12 .ascii "_Z8funcLeafi" .quad 446061515086924981 .quad 4294967295 .byte 9 .ascii "_Z5funcBi" .quad -2016976694713209516 .quad 72617220756 .byte 7 .ascii "_Z3fibi" ```
For each `.pseudoprobe` section, the encoded binary data consists of a single function record corresponding to an outlined function (i.e, a function with a code entry in the `.text` section). A function record has the following format :
``` FUNCTION BODY (one for each outlined function present in the text section) GUID (uint64) GUID of the function NPROBES (ULEB128) Number of probes originating from this function. NUM_INLINED_FUNCTIONS (ULEB128) Number of callees inlined into this function, aka number of first-level inlinees PROBE RECORDS A list of NPROBES entries. Each entry contains: INDEX (ULEB128) TYPE (uint4) 0 - block probe, 1 - indirect call, 2 - direct call ATTRIBUTE (uint3) reserved ADDRESS_TYPE (uint1) 0 - code address, 1 - address delta CODE_ADDRESS (uint64 or ULEB128) code address or address delta, depending on ADDRESS_TYPE INLINED FUNCTION RECORDS A list of NUM_INLINED_FUNCTIONS entries describing each of the inlined callees. Each record contains: INLINE SITE GUID of the inlinee (uint64) ID of the callsite probe (ULEB128) FUNCTION BODY A FUNCTION BODY entry describing the inlined function. ```
**Disassembling** A switch `--show-pseudo-probe` is added to use along with `--show-disassembly` to print disassembly code with pseudo probe directives.
For example: ``` 00000000002011a0 <foo2>: 2011a0: 50 push rax 2011a1: 85 ff test edi,edi [Probe]: FUNC: foo2 Index: 1 Type: Block 2011a3: 74 02 je 2011a7 <foo2+0x7> [Probe]: FUNC: foo2 Index: 3 Type: Block [Probe]: FUNC: foo2 Index: 4 Type: Block [Probe]: FUNC: foo Index: 1 Type: Block Inlined: @ foo2:6 2011a5: 58 pop rax 2011a6: c3 ret [Probe]: FUNC: foo2 Index: 2 Type: Block 2011a7: bf 01 00 00 00 mov edi,0x1 [Probe]: FUNC: foo2 Index: 5 Type: IndirectCall 2011ac: ff d6 call rsi [Probe]: FUNC: foo2 Index: 4 Type: Block 2011ae: 58 pop rax 2011af: c3 ret ```
**Implementation** - `PseudoProbeDecoder` is added in ProfiledBinary as an infra for the decoding. It decoded the two section and generate two map: `GUIDProbeFunctionMap` stores all the `PseudoProbeFunction` which is the abstraction of a general function. `AddressProbesMap` stores all the pseudo probe info indexed by its address. - All the inline info is encoded into binary as a trie(`PseudoProbeInlineTree`) and will be constructed from the decoding. Each pseudo probe can get its inline context(`getInlineContext`) by traversing its inline tree node backwards.
Test Plan: ninja & ninja check-llvm
Differential Revision: https://reviews.llvm.org/D92334
|
 | llvm/tools/llvm-profgen/ProfiledBinary.h |
 | llvm/tools/llvm-profgen/PseudoProbe.h |
 | llvm/tools/llvm-profgen/CMakeLists.txt |
 | llvm/tools/llvm-profgen/PseudoProbe.cpp |
 | llvm/tools/llvm-profgen/ProfiledBinary.cpp |
 | llvm/test/tools/llvm-profgen/pseudoprobe-decoding.test |
 | llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfbin |
Commit
414930b91bfd4196c457120932a1dbaf26db711d
by wlei[CSSPGO][llvm-profgen] Refactor to unify hashable interface for trace sample and context-sensitive counter
As we plan to support both CSSPGO and AutoFDO for llvm-profgen, we will have different kinds of perf sample and different kinds of sample counter(cs/non-cs, with/without pseudo probe) which both need to do aggregation in hash map. This change implements the hashable interface(`Hashable`) and the unified base class for them to have better extensibility and reusability.
Currently perf trace sample and sample counter with context implemented this `Hashable` and the class hierarchy is like:
``` | Hashable | PerfSample | HybridSample | LBRSample | ContextKey | StringBasedCtxKey | ProbeBasedCtxKey | CallsiteBasedCtxKey | ... ```
- Class specifying `Hashable` should implement `getHashCode` and `isEqual`. Here we make `getHashCode` a non-virtual function to avoid vtable overhead, so derived class should calculate and assign the base class's HashCode manually. This also provides the flexibility for calculating the hash code incrementally(like rolling hash) during frame stack unwinding - `isEqual` is a virtual function, which will have perf overhead. In the future, if we redesign a better hash function, then we can just skip this or switch to non-virtual function. - Added `PerfSample` and `ContextKey` as base class for perf sample and counter context key, leveraging llvm-style RTTI for this. - Added `StringBasedCtxKey` class extending `ContextKey` to use string as context id. - Refactor `AggregationCounter` to take all kinds of `PerfSample` as key - Refactor `ContextSampleCounter` to take all kinds of `ContextKey` as key - Other refactoring work: - Create a wrapper class `SampleCounter` to wrap `RangeCounter` and `BranchCounter` - Hoist `ContextId` and `FunctionProfile` out of `populateFunctionBodySamples` and `populateFunctionBoundarySamples` to reuse them in ProfileGenerator
Differential Revision: https://reviews.llvm.org/D92584
|
 | llvm/tools/llvm-profgen/ProfileGenerator.h |
 | llvm/tools/llvm-profgen/PerfReader.cpp |
 | llvm/tools/llvm-profgen/PerfReader.h |
 | llvm/tools/llvm-profgen/ProfileGenerator.cpp |
Commit
c681400b25a66ae56b74cc1f11ffdc15190a65b8
by wlei[CSSPGO][llvm-profgen] Virtual unwinding with pseudo probe
This change extends virtual unwinder to support pseudo probe in llvm-profgen. Please refer https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s and https://reviews.llvm.org/D89707 for more context about CSSPGO and llvm-profgen.
**Implementation**
- Added `ProbeBasedCtxKey` derived from `ContextKey` for sample counter aggregation. As we need string splitting to infer the profile for callee function, string based context introduces more string handling overhead, here we just use probe pointer based context. - For linear unwinding, as inline context is encoded in each pseudo probe, we don't need to go through each instruction to extract range sharing same inliner. So just record the range for the context. - For probe based context, we should ignore the top frame probe since it will be extracted from the address range. we defer the extraction in `ProfileGeneration`. - Added `PseudoProbeProfileGenerator` for pseudo probe based profile generation. - Some helper function to get pseduo probe info(call probe, inline context) from profiled binary. - Added regression test for unwinder's output
The pseudo probe based profile generation will be in the upcoming patch.
Test Plan:
ninja & ninja check-llvm
Differential Revision: https://reviews.llvm.org/D92896
|
 | llvm/tools/llvm-profgen/PseudoProbe.cpp |
 | llvm/tools/llvm-profgen/ProfileGenerator.cpp |
 | llvm/tools/llvm-profgen/ProfiledBinary.h |
 | llvm/tools/llvm-profgen/PseudoProbe.h |
 | llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfbin |
 | llvm/test/tools/llvm-profgen/noinline-cs-pseudoprobe.test |
 | llvm/tools/llvm-profgen/PerfReader.h |
 | llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfscript |
 | llvm/tools/llvm-profgen/PerfReader.cpp |
 | llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfscript |
 | llvm/tools/llvm-profgen/ProfileGenerator.h |
 | llvm/tools/llvm-profgen/ProfiledBinary.cpp |
 | llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript |
 | llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript |
 | llvm/test/tools/llvm-profgen/inline-cs-pseudoprobe.test |
Commit
33a8466531e68698dc735a0a8dcb97eb41b35ba6
by wlei[NFC] fix missing SectionName declaration
|
 | llvm/tools/llvm-profgen/PseudoProbe.h |
Commit
3bd620d4504915615b8368b20eb9e5c34f3fb779
by tpopp[mlir] Correct 2 places that result in corrupted conversion rollbacks
This corrects the last 2 issues caught by tests when causing dialect conversion rollbacks to occur.
Differential Revision: https://reviews.llvm.org/D94623
|
 | mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp |
 | mlir/lib/Transforms/Utils/DialectConversion.cpp |
Commit
e7a371f9fd0076c187f4cd1a9c7546867faeb19b
by alexandre.ganea[LLD][COFF] Avoid std::vector resizes during type merging
Consistently saves approx. 0.6 sec (out of 18 sec) on a large output (400 MB EXE, 2 GB PDB).
Differential Revision: https://reviews.llvm.org/D94555
|
 | lld/COFF/DebugTypes.cpp |
Commit
bb72adcaee7db0877e1cecb29d414003bf19ce02
by jeroen.dobbelaere[NFC] Use correct ssa.copy spelling when referring to the intrinsic
Split out from D91250. Fixes wrong ssa_copy naming.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D94310
|
 | llvm/docs/LangRef.rst |
Commit
f4f158b2f89e16ee7068d6292d2d46457d6932bb
by ajcbik[mlir][sparse] add vectorization strategies to sparse compiler
Similar to the parallelization strategies, the vectorization strategies provide control on what loops should be vectorize. Unlike the parallel strategies, only innermost loops are considered, but including reductions, with the control of vectorizing dense loops only or dense and sparse loops.
The vectorized loops are always controlled by a vector mask to avoid overrunning the iterations, but subsequent vector operation folding removes redundant masks and replaces the operations with more efficient counterparts. Similarly, we will rely on subsequent loop optimizations to further optimize masking, e.g. using an unconditional full vector loop and scalar cleanup loop.
The current strategy already demonstrates a nice interaction between the sparse compiler and all prior optimizations that went into the vector dialect.
Ongoing discussion at: https://llvm.discourse.group/t/mlir-support-for-sparse-tensors/2020/10
Reviewed By: penpornk
Differential Revision: https://reviews.llvm.org/D94551
|
 | mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h |
 | mlir/test/Dialect/Linalg/sparse_vector.mlir |
 | mlir/test/lib/Transforms/TestSparsification.cpp |
 | mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp |
Commit
01c3135850d15c8dce9374eec26dc2d555a87b7f
by flo[LTO] Add test for freestanding LTO option.
This patch adds a test for the -lto-freestanding option, similar to llvm/test/ThinLTO/X86/tli-nobuiltin.ll.
|
 | llvm/test/LTO/X86/tli-nobuiltin.ll |
Commit
18278ff1aac47d9bffa0231c74277ffc89def13e
by tkeith[flang] Fix accessibility of USEd name in .mod file
If a module specifies default private accessibility, names that have been use-associated are private by default. This was not reflected in .mod files.
Differential Revision: https://reviews.llvm.org/D94602
|
 | flang/test/Semantics/modfile03.f90 |
 | flang/lib/Semantics/mod-file.cpp |
Commit
4cfccd51335139871cad03ac451a2d27ebfe7761
by michaelrj[libc][NFC] add macro for fuchsia to switch test backend to zxtest
This moves utils/UnitTest/Test.[h/cpp] to LibcTest.[h/cpp] and adds a new Test.h that acts as a switcher so that Fuchsia can use the zxtest backend for running our tests as part of their build.
FuchsiaTest.h is for including fuchsia's zxtest library and anything else needed to make the tests work under fuchsia (currently just undefining the isascii macro for the test).
Downstream users, please fix your build instead of reverting.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D94625
|
 | libc/utils/UnitTest/CMakeLists.txt |
 | libc/utils/UnitTest/Test.cpp |
 | libc/utils/UnitTest/LibcTest.cpp |
 | libc/utils/UnitTest/LibcTest.h |
 | libc/utils/UnitTest/FuchsiaTest.h |
 | libc/utils/UnitTest/Test.h |
Commit
fb98a1be43645c87fff089c4cc9555ca2400268c
by kazuFix the warnings on unused variables (NFC)
|
 | lld/MachO/InputSection.cpp |
 | clang-tools-extra/clangd/AST.cpp |
 | llvm/lib/Transforms/Coroutines/CoroFrame.cpp |
Commit
f711cb9a8ad9fe80dd9f1844dbe15c0e7edb1450
by nikita.ppv[FuncAttrs] Add additional willreturn tests (NFC)
|
 | llvm/test/Transforms/FunctionAttrs/willreturn.ll |
Commit
6077d55381a6aa3e947ef7abdc36a7515c598c8a
by flo[DSE] Add tests with stores of existing values.
This patch pre-commits test cases with dead stores of existing values for D90328. It also updates a few tests that had such stores by accident, to preserve the original spirit of those tests.
|
 | llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-simple.ll |
 | llvm/test/Transforms/DeadStoreElimination/MSSA/stores-of-existing-values.ll |
 | llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loops.ll |
 | llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-memoryphis.ll |
Commit
ea8034ec35a9e3d6784d7e6f50617af3d87f6a9f
by michaelrj[libc][NFC] change isblank and iscntrl from implicit casting
isblank and iscntrl were casting an int to a char implicitly and this was throwing errors under Fuchsia. I've added a static cast to resolve this issue.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D94634
|
 | libc/src/ctype/iscntrl.cpp |
 | libc/src/ctype/isblank.cpp |
Commit
74a42aedfe14938e01d128456c76cede2ccbc26c
by i[test] Add Clang side tests for -fdebug-info-for-profiling
There is currently a driver test but no test for its effect on linkageName & pass pipeline.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D94381
|
 | clang/test/CodeGenCXX/fdebug-info-for-profiling.cpp |
Commit
35debdfcaca10203a67ef3821d272a72d70e0490
by wlei[NFC] Fix build break by a initializer list converting error
|
 | llvm/tools/llvm-profgen/PseudoProbe.cpp |
Commit
82c4153e66fa284729da86a8d6c302d4b8cec86c
by jiancaiRevert "[AsmParser] make .ascii support spaces as separators"
This reverts commit e0963ae274be5b071d1e1b00f5e4e019483c09e9. The change breaks some GDB tests. Revert it while we investigate.
|
 | llvm/test/MC/AsmParser/directive_ascii.s |
 | llvm/lib/MC/MCParser/AsmParser.cpp |
Commit
39e6d242378a0b645abbdfc6c02de5ef8dcfb9ed
by aeubanks[NewPM] Only non-trivially loop unswitch at -O3 and for non-optsize functions
This matches the legacy pipeline/pass.
Reviewed By: asbirlea, SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D94559
|
 | llvm/test/Transforms/SimpleLoopUnswitch/ARM/nontrivial-unswitch-cost.ll |
 | llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll |
 | llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp |
 | llvm/lib/Passes/PassBuilder.cpp |
Commit
7ec8f43659861be42f9d600422678196849b6e90
by craig.topper[SPARC] Fix fp128 load/stores
The generated code for the split fp128 load/stores was missing a small yet important adjustment to the pointer metadata being fed into `getStore` and `getLoad`, making it out of sync with the effective memory address. This problem often resulted in instructions being scheduled in the wrong order.
I also took this chance to clean up some "wrong" uses of `getAlignment` as done in D77687.
Thanks @jrtc27 for finding the problem and providing a patch.
Patch by LemonBoy and Jessica Clarke(jrtc27)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D94345
|
 | llvm/test/CodeGen/SPARC/fp128-split.ll |
 | llvm/lib/Target/Sparc/SparcISelLowering.cpp |
Commit
854f0984f0b7ab9a9a541a4bcda7ea173e4113d3
by dblaikieFix llvm::Optional build breaks in MSVC using std::is_trivially_copyable
Current code breaks this version of MSVC due to a mismatch between `std::is_trivially_copyable` and `llvm::is_trivially_copyable` for `std::pair` instantiations. Hence I was attempting to use `std::is_trivially_copyable` to set `llvm::is_trivially_copyable<T>::value`.
I spent some time root causing an `llvm::Optional` build error on MSVC 16.8.3 related to the change described above:
``` 62>C:\src\ocg_llvm\llvm-project\llvm\include\llvm/ADT/BreadthFirstIterator.h(96,12): error C2280: 'llvm::Optional<std::pair<std::pair<unsigned int,llvm::Graph<4>::NodeSubset> *,llvm::Optional<llvm::Graph<4>::ChildIterator>>> &llvm::Optional<std::pair<std::pair<unsigned int,llvm::Graph<4>::NodeSubset> *,llvm::Optional<llvm::Graph<4>::ChildIterator>>>::operator =(const llvm::Optional<std::pair<std::pair<unsigned int,llvm::Graph<4>::NodeSubset> *,llvm::Optional<llvm::Graph<4>::ChildIterator>>> &)': attempting to reference a deleted function (compiling source file C:\src\ocg_llvm\llvm-project\llvm\unittests\ADT\BreadthFirstIteratorTest.cpp) ... ``` The "trivial" specialization of `optional_detail::OptionalStorage` assumes that the value type is trivially copy constructible and trivially copy assignable. The specialization is invoked based on a check of `is_trivially_copyable` alone, which does not imply both `is_trivially_copy_assignable` and `is_trivially_copy_constructible` are true.
[[ https://en.cppreference.com/w/cpp/named_req/TriviallyCopyable | According to the spec ]], a deleted assignment operator does not make `is_trivially_copyable` false. So I think all these properties need to be checked explicitly in order to specialize `OptionalStorage` to the "trivial" version: ``` /// Storage for any type. template <typename T, bool = std::is_trivially_copy_constructible<T>::value && std::is_trivially_copy_assignable<T>::value> class OptionalStorage { ``` Above fixed my build break in MSVC, but I think we need to explicitly check `is_trivially_copy_constructible` too since it might be possible the copy constructor is deleted. Also would be ideal to move over to `std::is_trivially_copyable` instead of the `llvm` namespace verson.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D93510
|
 | llvm/unittests/ADT/OptionalTest.cpp |
 | llvm/include/llvm/ADT/Optional.h |
Commit
86341247c4a2ffa4328945b03e7a05b1c51c3889
by wmi[NFC] Rename ThinLTOPhase to ThinOrFullLTOPhase and move it from PassBuilder.h to Pass.h.
In some compiler passes like SampleProfileLoaderPass, we want to know which LTO/ThinLTO phase the pass is in. Currently the phase is represented in enum class PassBuilder::ThinLTOPhase, so it is only available in PassBuilder and it also cannot represent phase in full LTO. The patch extends it to include full LTO phases and move it from PassBuilder.h to Pass.h, then it is much easier for PassBuilder to communiate with each pass about current LTO phase.
Differential Revision: https://reviews.llvm.org/D94613
|
 | llvm/lib/Passes/PassBuilder.cpp |
 | llvm/lib/Transforms/IPO/SampleProfile.cpp |
 | llvm/include/llvm/Transforms/IPO/SampleProfile.h |
 | llvm/include/llvm/Pass.h |
 | llvm/include/llvm/Passes/PassBuilder.h |
 | polly/lib/Support/RegisterPasses.cpp |
 | llvm/lib/Passes/PassRegistry.def |
Commit
ddd03842c3472fedf164274c479272089c426ee5
by paulsson[SystemZ] Clear Available set in SystemZPostRASchedStrategy::initialize().
This needs to be done in order to not crash with -misched-cutoff.
Fixes https://bugs.llvm.org/show_bug.cgi?id=45928
Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D94383
|
 | llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp |
 | llvm/test/CodeGen/SystemZ/misched-cutoff.ll |
Commit
c82deed6764cbc63966374baf9721331901ca958
by rprichard[libunwind] Unwind through aarch64/Linux sigreturn frame
An AArch64 sigreturn trampoline frame can't currently be described in a DWARF .eh_frame section, because the AArch64 DWARF spec currently doesn't define a constant for the PC register. (PC and LR may need to be restored to different values.)
Instead, use the same technique as libgcc or github.com/libunwind and detect the sigreturn frame by looking for the sigreturn instructions:
mov x8, #0x8b svc #0x0
If a sigreturn frame is detected, libunwind restores all the GPRs by assuming that sp points at an rt_sigframe Linux kernel struct. This behavior is a fallback mode that is only used if there is no ordinary unwind info for sigreturn.
If libunwind can't find unwind info for a PC, it assumes that the PC is readable, and would crash if it isn't. This could happen if: - The PC points at a function compiled without unwind info, and which is part of an execute-only mapping (e.g. using -Wl,--execute-only). - The PC is invalid and happens to point to unreadable or unmapped memory.
In the tests, ignore a failed dladdr call so that the tests can run on user-mode qemu for AArch64, which uses a stack-allocated trampoline instead of a vDSO.
Reviewed By: danielkiss, compnerd, #libunwind
Differential Revision: https://reviews.llvm.org/D90898
|
 | libunwind/src/UnwindCursor.hpp |
 | libunwind/test/unwind_leaffunction.pass.cpp |
 | libunwind/include/__libunwind_config.h |
 | libunwind/test/signal_unwind.pass.cpp |
Commit
3de92ca78cd4e180920acc077452f87c44c7d935
by psteinfeld[flang] Add tests for procedure arguments with implicit interfaces
It's possible to declare an external procedure and then pass it as an actual argument to a subprogram expecting a procedure argument. I added tests for this and added an error message to distinguish passing an actual argument with an implicit interface from passing an argument with a mismatched explicit interface.
Differential Revision: https://reviews.llvm.org/D94505
|
 | flang/lib/Semantics/check-call.cpp |
 | flang/test/Semantics/call09.f90 |
Commit
dfc1901d513e1c5b9472d9b3403ca991b3d4a232
by craig.topper[RISCV] Custom lower ISD::VSCALE.
This patch custom lowers ISD::VSCALE into a csrr vlenb followed by a shift right by 3 followed by a multiply by the scale amount.
I've added computeKnownBits support to indicate that the csrr vlenb always produces 3 trailng bits of 0s so the shift right is "exact". This allows the shift and multiply sequence to be nicely optimized into a single shift or removed completely when the scale amount is a power of 2.
The non power of 2 case multiplying by 24 is still producing suboptimal code. We could remove the right shift and use a multiply by 3. Hopefully we can improve DAG combine to fix that since it's not unique to this sequence.
This replaces D94144.
Reviewed By: HsiangKai
Differential Revision: https://reviews.llvm.org/D94249
|
 | llvm/lib/Target/RISCV/RISCVISelLowering.h |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
 | llvm/lib/Target/RISCV/RISCVMCInstLower.cpp |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll |
 | llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i32.ll |
Commit
cd4c55c97402246099ae865a66517a36af5c3a7c
by richardFix grammar in diagnostic for wrong arity in a structured binding.
|
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/lib/Sema/SemaDeclCXX.cpp |
 | clang/test/SemaCXX/cxx1z-decomposition.cpp |
Commit
336ab2d51dfdd5ca09c2a9c506453db4fe653584
by alexandre.ganea[Support] On Windows, take the affinity mask into account
The number of hardware threads available to a ThreadPool can be limited if setting an affinity mask. For example:
> start /B /AFFINITY 0xF lld-link.exe ...
Would let LLD only use 4 hyper-threads.
Previously, there was an outstanding issue on Windows Server 2019 on dual-CPU machines, which was preventing from using both CPU sockets. In normal conditions, when no affinity mask was set, ProcessorGroup::AllThreads was different from ProcessorGroup::UsableThreads. The previous code in llvm/lib/Support/Windows/Threading.inc L201 was improperly assuming those two values to be equal, and consequently was limiting the execution to only one CPU socket.
Differential Revision: https://reviews.llvm.org/D92419
|
 | llvm/unittests/Support/ThreadPool.cpp |
 | llvm/lib/Support/Unix/Program.inc |
 | llvm/lib/Support/Windows/Program.inc |
 | llvm/lib/Support/Windows/Threading.inc |
 | llvm/include/llvm/Support/Program.h |
 | llvm/lib/Support/Program.cpp |
Commit
ff40fb07ad6309131c2448ca00572a078c7a2d59
by esme.yi[PowerPC] Try to fold sqrt/sdiv test results with the branch.
Summary: The patch tries to fold sqrt/sdiv test node, i.g FTSQRT, XVTDIVDP, and the branch, i.e br_cc if they meet these patterns: (br_cc seteq, (truncateToi1 SWTestOp), 0) -> (BCC PRED_NU, SWTestOp) (br_cc seteq, (and SWTestOp, 2), 0) -> (BCC PRED_NE, SWTestOp) (br_cc seteq, (and SWTestOp, 4), 0) -> (BCC PRED_LE, SWTestOp) (br_cc seteq, (and SWTestOp, 8), 0) -> (BCC PRED_GE, SWTestOp) (br_cc setne, (truncateToi1 SWTestOp), 0) -> (BCC PRED_UN, SWTestOp) (br_cc setne, (and SWTestOp, 2), 0) -> (BCC PRED_EQ, SWTestOp) (br_cc setne, (and SWTestOp, 4), 0) -> (BCC PRED_GT, SWTestOp) (br_cc setne, (and SWTestOp, 8), 0) -> (BCC PRED_LT, SWTestOp)
Reviewed By: steven.zhang
Differential Revision: https://reviews.llvm.org/D94054
|
 | llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp |
 | llvm/test/CodeGen/PowerPC/fold_swtest_br.ll |
Commit
eec856848ccc481b2704ebf64d725e635a3d7dca
by alexandre.ganeaRevert "[Support] On Windows, take the affinity mask into account"
This reverts commit 336ab2d51dfdd5ca09c2a9c506453db4fe653584.
|
 | llvm/lib/Support/Windows/Program.inc |
 | llvm/lib/Support/Unix/Program.inc |
 | llvm/include/llvm/Support/Program.h |
 | llvm/lib/Support/Windows/Threading.inc |
 | llvm/unittests/Support/ThreadPool.cpp |
 | llvm/lib/Support/Program.cpp |
Commit
9abac60309006db00eca0af406c2e16bef26807c
by Duncan P. N. Exon SmithADT: Fix reference invalidation in SmallVector::push_back and single-element insert
For small enough, trivially copyable `T`, take the argument by value in `SmallVector::push_back` and copy it when forwarding to `SmallVector::insert_one_impl`. Otherwise, when growing, update the argument appropriately.
Differential Revision: https://reviews.llvm.org/D93779
|
 | llvm/unittests/ADT/SmallVectorTest.cpp |
 | llvm/include/llvm/ADT/SmallVector.h |
Commit
b196dc6607233d6235846b4a1bde70a6e0cc8512
by aeubanks[NFC] Remove unused entry in PassRegistry.def
|
 | llvm/lib/Passes/PassRegistry.def |
Commit
56d1ffb927d03958a7a31442596df749264a7792
by Duncan P. N. Exon SmithRevert "ADT: Fix reference invalidation in SmallVector::push_back and single-element insert"
This reverts commit 9abac60309006db00eca0af406c2e16bef26807c since there are some bot errors on Windows: http://lab.llvm.org:8011/#/builders/127/builds/4489
``` FAILED: lib/Support/CMakeFiles/LLVMSupport.dir/IntervalMap.cpp.obj C:\PROGRA~2\MIB055~1\2017\PROFES~1\VC\Tools\MSVC\1416~1.270\bin\Hostx64\x64\cl.exe /nologo /TP -DGTEST_HAS_RTTI=0 -DUNICODE -D_CRT_NONSTDC_NO_DEPRECATE -D_CRT_NONSTDC_NO_WARNINGS -D_CRT_SECURE_NO_DEPRECATE -D_CRT_SECURE_NO_WARNINGS -D_HAS_EXCEPTIONS=0 -D_SCL_SECURE_NO_DEPRECATE -D_SCL_SECURE_NO_WARNINGS -D_UNICODE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Ilib\Support -IC:\b\slave\sanitizer-windows\llvm-project\llvm\lib\Support -Iinclude -IC:\b\slave\sanitizer-windows\llvm-project\llvm\include /DWIN32 /D_WINDOWS /Zc:inline /Zc:__cplusplus /Zi /Zc:strictStrings /Oi /Zc:rvalueCast /bigobj /W4 -wd4141 -wd4146 -wd4244 -wd4267 -wd4291 -wd4351 -wd4456 -wd4457 -wd4458 -wd4459 -wd4503 -wd4624 -wd4722 -wd4100 -wd4127 -wd4512 -wd4505 -wd4610 -wd4510 -wd4702 -wd4245 -wd4706 -wd4310 -wd4701 -wd4703 -wd4389 -wd4611 -wd4805 -wd4204 -wd4577 -wd4091 -wd4592 -wd4319 -wd4709 -wd4324 -w14062 -we4238 /Gw /MD /O2 /Ob2 -UNDEBUG -std:c++14 /EHs-c- /GR- /showIncludes /Folib\Support\CMakeFiles\LLVMSupport.dir\IntervalMap.cpp.obj /Fdlib\Support\CMakeFiles\LLVMSupport.dir\LLVMSupport.pdb /FS -c C:\b\slave\sanitizer-windows\llvm-project\llvm\lib\Support\IntervalMap.cpp C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(746): error C2672: 'llvm::SmallVectorImpl<T>::insert_one_maybe_copy': no matching overloaded function found with [ T=llvm::IntervalMapImpl::Path::Entry ] C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(745): note: while compiling class template member function 'llvm::IntervalMapImpl::Path::Entry *llvm::SmallVectorImpl<T>::insert(llvm::IntervalMapImpl::Path::Entry *,T &&)' with [ T=llvm::IntervalMapImpl::Path::Entry ] C:\b\slave\sanitizer-windows\llvm-project\llvm\lib\Support\IntervalMap.cpp(22): note: see reference to function template instantiation 'llvm::IntervalMapImpl::Path::Entry *llvm::SmallVectorImpl<T>::insert(llvm::IntervalMapImpl::Path::Entry *,T &&)' being compiled with [ T=llvm::IntervalMapImpl::Path::Entry ] C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(1136): note: see reference to class template instantiation 'llvm::SmallVectorImpl<T>' being compiled with [ T=llvm::IntervalMapImpl::Path::Entry ] C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/IntervalMap.h(790): note: see reference to class template instantiation 'llvm::SmallVector<llvm::IntervalMapImpl::Path::Entry,4>' being compiled C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(746): error C2783: 'llvm::IntervalMapImpl::Path::Entry *llvm::SmallVectorImpl<T>::insert_one_maybe_copy(llvm::IntervalMapImpl::Path::Entry *,ArgType &&)': could not deduce template argument for '__formal' with [ T=llvm::IntervalMapImpl::Path::Entry ] C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(727): note: see declaration of 'llvm::SmallVectorImpl<T>::insert_one_maybe_copy' with [ T=llvm::IntervalMapImpl::Path::Entry ] ```
|
 | llvm/include/llvm/ADT/SmallVector.h |
 | llvm/unittests/ADT/SmallVectorTest.cpp |
Commit
5c1c39e8d808d7d08a2c3c5ed192d543a55f685c
by kazu[llvm] Use *Set::contains (NFC)
|
 | llvm/include/llvm/Analysis/DivergenceAnalysis.h |
 | llvm/lib/ExecutionEngine/MCJIT/MCJIT.h |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/include/llvm/ADT/DepthFirstIterator.h |
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
 | llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h |
 | llvm/lib/Analysis/IRSimilarityIdentifier.cpp |
Commit
125ea20d55c554fbe14eb1f6cff7d44a720a51f5
by kazu[llvm] Use llvm::stable_sort (NFC)
|
 | llvm/lib/Transforms/Scalar/SROA.cpp |
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
 | llvm/utils/TableGen/RegisterInfoEmitter.cpp |
 | llvm/utils/TableGen/SearchableTableEmitter.cpp |
 | llvm/utils/TableGen/GlobalISelEmitter.cpp |
 | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp |
 | llvm/lib/CodeGen/SafeStackLayout.cpp |
 | llvm/utils/TableGen/DAGISelEmitter.cpp |
Commit
4c1617dac8fa13a8eac9cc4ac13a8f1fb3da512e
by kazu[llvm] Use std::any_of (NFC)
|
 | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp |
 | llvm/tools/obj2yaml/elf2yaml.cpp |
Commit
49142991a685bd427d7e877c29c77371dfb7634c
by Duncan P. N. Exon SmithReapply "ADT: Fix reference invalidation in SmallVector::push_back and single-element insert"
This reverts commit 56d1ffb927d03958a7a31442596df749264a7792, reapplying 9abac60309006db00eca0af406c2e16bef26807c, removing insert_one_maybe_copy and using a helper called forward_value_param instead. This avoids use of `std::is_same` (or any SFINAE), so I'm hoping it's more portable and MSVC will be happier.
Original commit message follows:
For small enough, trivially copyable `T`, take the argument by value in `SmallVector::push_back` and copy it when forwarding to `SmallVector::insert_one_impl`. Otherwise, when growing, update the argument appropriately.
Differential Revision: https://reviews.llvm.org/D93779
|
 | llvm/include/llvm/ADT/SmallVector.h |
 | llvm/unittests/ADT/SmallVectorTest.cpp |
Commit
3043e5a5c33c4c871f4a1dfd621a8839f9a1f0b3
by Duncan P. N. Exon SmithADT: Fix reference invalidation in N-element SmallVector::append and insert
For small enough, trivially copyable `T`, take the parameter by-value in `SmallVector::append` and `SmallVector::insert`. Otherwise, when growing, update the arugment appropriately.
Differential Revision: https://reviews.llvm.org/D93780
|
 | llvm/include/llvm/ADT/SmallVector.h |
 | llvm/unittests/ADT/SmallVectorTest.cpp |
Commit
752fafda3dbf1f4885c64408a13ddb67c91ccb13
by rupprecht[NFC] Fix -Wsometimes-uninitialized
After 49142991a685bd427d7e877c29c77371dfb7634c, clang detects that MUL may be uninitialized. Set it to nullptr to suppress this check.
Adding an assert to check that it is ultimately set fails two test cases. Since this is not a new issue, leave the assertion commented out until a code owner can fix the bug. The two failing test cases are noted in the assertion comment.
|
 | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp |
Commit
260a856c2abcef49c7cb3bdcd999701db3e2af38
by Duncan P. N. Exon SmithADT: Fix reference invalidation in SmallVector::resize
For small enough, trivially copyable `T`, take the parameter by-value in `SmallVector::resize`. Otherwise, when growing, update the arugment appropriately.
Differential Revision: https://reviews.llvm.org/D93781
|
 | llvm/include/llvm/ADT/SmallVector.h |
 | llvm/unittests/ADT/SmallVectorTest.cpp |
Commit
c224a834583ccbb3f8e8047d409ef3bf356abc01
by Duncan P. N. Exon SmithADT: Reduce code duplication in SmallVector::resize by using pop_back_n, NFC
|
 | llvm/include/llvm/ADT/SmallVector.h |
Commit
3f98b66f23f9844a61f63ee00a81b9914f9a039d
by Duncan P. N. Exon SmithADT: Reduce code duplication in SmallVector by reusing reserve, NFC
|
 | llvm/include/llvm/ADT/SmallVector.h |
Commit
53b34601abf1d48e8df210ab8127b16fd35e275a
by i[Driver] -gsplit-dwarf: Produce .dwo regardless of -gN for -fthinlto-index=
-g is an IR generation option while -gsplit-dwarf is an object file generation option. For -gsplit-dwarf in the backend phase of a distributed ThinLTO (-fthinlto-index=) which does object file generation and no IR generation, -g should not be needed.
This patch makes `-fthinlto-index= -gsplit-dwarf` emit .dwo even in the absence of -g. This should fix https://crbug.com/1158215 after D80391.
``` // Distributed ThinLTO usage clang -g -O2 -c -flto=thin -fthin-link-bitcode=a.indexing.o a.c clang -g -O2 -c -flto=thin -fthin-link-bitcode=b.indexing.o b.c clang -fuse-ld=lld -Wl,--thinlto-index-only=a.rsp -Wl,--thinlto-prefix-replace=';lto/' -Wl,--thinlto-object-suffix-replace='.indexing.o;.o' a.indexing.o b.indexing.o clang -gsplit-dwarf -O2 -c -fthinlto-index=lto/a.o.thinlto.bc a.o -o lto/a.o clang -gsplit-dwarf -O2 -c -fthinlto-index=lto/b.o.thinlto.bc b.o -o lto/b.o clang -fuse-ld=lld @a.rsp -o exe ```
Note: for implicit regular/Thin LTO, .dwo emission works without this patch: `clang -flto=thin -gsplit-dwarf a.o b.o` passes `-plugin-opt=dwo_dir=` to the linker. The linker forwards the option to LTO. LTOBackend.cpp emits `$dwo_dir/[01234].dwo`.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D94647
|
 | clang/lib/Driver/ToolChains/Clang.cpp |
 | clang/test/Driver/split-debug.c |
Commit
6ed3083a96541a7483cb02bb3b2f52b1d0a37c84
by Duncan P. N. Exon SmithADT: Reduce code duplication in SmallVector by calling reserve and clear, NFC
|
 | llvm/include/llvm/ADT/SmallVector.h |
Commit
ff5e896425577f445ed080d88b582aab0896fba0
by lxfindFix unused variable in CoroFrame.cpp when building Release with GCC 10
When building with GCC 10, the following warning is reported:
``` /llvm-project/llvm/lib/Transforms/Coroutines/CoroFrame.cpp:1527:28: warning: unused variable ‘CS’ [-Wunused-variable] 1527 | if (CatchSwitchInst *CS = ```
This change adds a cast to `void` to avoid the warning.
Reviewed By: lxfind
Differential Revision: https://reviews.llvm.org/D94456
|
 | llvm/lib/Transforms/Coroutines/CoroFrame.cpp |
Commit
885eae9d85de4b1b1907ac9b3ecba26565932069
by Jason MolendaAdd func call so we don't instruction-step into the builtin_trap
The way this test is structured right now, I set a breakpoint on the instruction before the __builtin_trap. It hits the breakpoint, disables the breakpoint, and instruction steps. This hits the builtin_trap instruction which debugserver (on arm64) now advances to the next instruction and reports that address to lldb. lldb doesn't recognize this as a proper response to the instruction step and continues executing until the next trap, and the test fails.
|
 | lldb/test/API/macosx/builtin-debugtrap/main.cpp |
Commit
7ad54d193871ce69968565ea46372e81c9f1ce62
by pavel[lldb][wasm] Parse DWO section names
Mirror ELF section parsing to support DWARF section names for debug fission.
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D93621
|
 | lldb/test/Shell/ObjectFile/wasm/embedded-debug-sections.yaml |
 | lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp |
Commit
2bbf724feea9824f9b9e4d20d34828023dbec2af
by pavelImplement vAttachWait in lldb-server
This commit vAttachWait in lldb-server, so --waitfor can be used on Linux
Reviewed By: labath, clayborg
Differential Revision: https://reviews.llvm.org/D93895
|
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h |
 | lldb/test/API/tools/lldb-server/TestGdbRemoteAttachWait.py |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp |
Commit
ed205f63b4a288ccbffc9af58333d09a7cec40dc
by zinenko[mlir] Update doc to omit the usage of LLVMIntegerType
Since [[ https://reviews.llvm.org/D94178 | the LLVMIntegerType was replaced with build-in integer type ]], the usage in the tutorial should be also updated accordingly. We need to update chapter 6 for Toy tutorial specifically.
See: https://reviews.llvm.org/D94178
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D94651
|
 | mlir/docs/Tutorials/Toy/Ch-6.md |
Commit
4b284b9ca8098e284b8d965a633b71bd283043d6
by pavel[lldb] Fix TestPlatformProcessConnect.py
The test was marked as remote-only, which means it was run ~never, and accumulated various problems. This commit modifies the test to run locally and includes a couple of other fixes necessary to make it run: - moves the "invoke" method into the "Base" test class - adds []'s around the IP address in a couple more places to make things work with IPv6
The test is now marked as skipped when running the remote test suite. It would be possible to make it run both locally and remotely, but this would require writing a lot special logic for the remote case, and that is not worth it.
|
 | lldb/packages/Python/lldbsuite/test/lldbtest.py |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp |
 | lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py |
 | lldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp |
Commit
259936f4910ad7da7589f81862fc855386ae8621
by david.stuttard[NFC][AsmPrinter] Windows warning: Use explicit cast
static_cast for uint64_t to unsigned gives a MS VC build warning for Windows:
warning C4309: 'static_cast': truncation of constant value
Use an explicit cast instead.
Change-Id: I692d335b4913070686a102780c1fb05b893a2f69
Differential Revision: https://reviews.llvm.org/D94592
|
 | llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp |
Commit
2b1e25befefc20f012aa49011f46e11e8530ee21
by lucas.prates[AArch64] Adding ACLE intrinsics for the LS64 extension
This introduces the ARMv8.7-A LS64 extension's intrinsics for 64 bytes atomic loads and stores: `__arm_ld64b`, `__arm_st64b`, `__arm_st64bv`, and `__arm_st64bv0`. These are selected into the LS64 instructions LD64B, ST64B, ST64BV and ST64BV0, respectively.
Based on patches written by Simon Tatham.
Reviewed By: tmatheson
Differential Revision: https://reviews.llvm.org/D93232
|
 | clang/lib/Headers/arm_acle.h |
 | llvm/test/CodeGen/AArch64/ls64-intrinsics.ll |
 | clang/test/CodeGen/aarch64-ls64.c |
 | clang/test/Preprocessor/aarch64-target-features.c |
 | llvm/include/llvm/IR/IntrinsicsAArch64.td |
 | llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp |
 | llvm/lib/Target/AArch64/AArch64InstrInfo.td |
 | clang/lib/Basic/Targets/AArch64.cpp |
 | clang/include/clang/Basic/BuiltinsAArch64.def |
 | clang/lib/CodeGen/CGBuiltin.cpp |
Commit
4bb11b3eafbde75ab026ec180cae62799ba0fb3c
by flo[LTO] Expose opt() in LTOBackend (NFC).
Exposing opt() which runs middle-end LTO optimzation allows re-using it in LTOCodeGenerator.
Reviewed By: steven_wu
Differential Revision: https://reviews.llvm.org/D94486
|
 | llvm/include/llvm/LTO/LTOBackend.h |
 | llvm/lib/LTO/LTOBackend.cpp |
Commit
53e3b81faaf32a495189182e0e4d635cbe19c5dd
by wingo[lld][WebAssembly] Add support for handling table symbols
This commit adds table symbol support in a partial way, while still including some special cases for the __indirect_function_table symbol. No change in tests.
Differential Revision: https://reviews.llvm.org/D94075
|
 | lld/wasm/SyntheticSections.h |
 | lld/wasm/SyntheticSections.cpp |
 | lld/wasm/Symbols.h |
 | llvm/include/llvm/Object/Wasm.h |
 | lld/wasm/InputTable.h |
 | llvm/include/llvm/BinaryFormat/Wasm.h |
 | llvm/tools/llvm-readobj/WasmDumper.cpp |
 | lld/wasm/Symbols.cpp |
 | lld/wasm/MarkLive.cpp |
 | lld/wasm/InputFiles.h |
 | lld/wasm/Writer.cpp |
 | lld/wasm/WriterUtils.h |
 | lld/wasm/SymbolTable.h |
 | lld/wasm/InputFiles.cpp |
 | lld/wasm/WriterUtils.cpp |
 | lld/wasm/InputChunks.cpp |
 | llvm/lib/Object/WasmObjectFile.cpp |
 | lld/include/lld/Common/LLVM.h |
 | lld/wasm/SymbolTable.cpp |
Commit
d58512b2e31a255dccc2c9a351a4e47b2b4c9f79
by bjorn.a.pettersson[SLP] Don't vectorize stores of non-packed types (like i1, i2)
In the spirit of commit fc783e91e0c0696e (llvm-svn: 248943) we shouldn't vectorize stores of non-packed types (i.e. types that has padding between consecutive variables in a scalar layout, but being packed in a vector layout).
The problem was detected as a miscompile in a downstream test case.
Reviewed By: anton-afanasyev
Differential Revision: https://reviews.llvm.org/D94446
|
 | llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll |
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
17f8c458de631c0311828931a5bdf72b1a13c29d
by mikhail.maltsev[clang] Use SourceLocations in unions [NFCI]
Currently, there are many instances where `SourceLocation` objects are converted to raw representation to be stored in structs that are used as fields of tagged unions.
This is done to make the corresponding structs trivial. Triviality allows avoiding undefined behavior when implicitly changing the active member of the union.
However, in most cases, we can explicitly construct an active member using placement new. This patch adds the required active member selections and replaces `SourceLocation`-s represented as `unsigned int` with proper `SourceLocation`-s.
One notable exception is `DeclarationNameLoc`: the objects of this class are often not properly initialized (so the code currently relies on its default constructor which uses memset). This class will be fixed in a separate patch.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D94237
|
 | clang/lib/AST/Expr.cpp |
 | clang/include/clang/AST/TemplateBase.h |
 | clang/include/clang/Sema/Initialization.h |
 | clang/lib/Sema/SemaDecl.cpp |
 | clang/lib/AST/TemplateBase.cpp |
 | clang/lib/Sema/SemaExpr.cpp |
 | clang/include/clang/Sema/Designator.h |
 | clang/include/clang/Basic/SourceManager.h |
 | clang/lib/Sema/SemaType.cpp |
 | clang/lib/Parse/ParseDeclCXX.cpp |
 | clang/include/clang/AST/DependentDiagnostic.h |
 | clang/include/clang/AST/Expr.h |
 | clang/include/clang/Sema/DeclSpec.h |
 | clang/lib/Sema/DeclSpec.cpp |
Commit
af8d27a7a8266b89916b5e4db2b2fd97eb7d84e5
by llvm-dev[DAG] visitVECTOR_SHUFFLE - pull out shuffle merging code into lambda helper. NFCI.
Make it easier to reuse in a future patch.
|
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
Commit
8f1d7f3753ca132b310bbb0e62c394cfa75daee5
by llvm-dev[X86] Improve sum-of-reductions v4f32 test coverage
Ensure that the v4f32 reductions use a -0.0f start value and add fast-math test variant.
|
 | llvm/test/CodeGen/X86/horizontal-sum.ll |
Commit
a997a1d7fbe229433fb458bb0035b32424ecf3bd
by pavel[lldb/test] Ensure launched processes are ready to be attached
Linux systems can be configured (and most of them are configured that way) to disable attaching to unrelated processes, /unless/ those processes explicitly allow that.
Our test inferiors do that by explicitly calling prctl(PR_SET_PTRACER, PR_SET_PTRACER_ANY) (a.k.a., lldb_enable_attach). This requires additional synchronization to ensure that the test does not attempt attach before that statement is executed.
This is working fine (albeit cumbersome) for most tests but TestGdbRemoteAttachWait is special in that it wants to start the inferior _after_ issuing the attach request. This means that the usual synchronization method does not work.
This patch introduces a different solution -- enable attaching in the test harness, before the process is launched. Besides fixing this problem, this is also better because it avoids the need to add special code to each attach test (which is a common error).
One gotcha here is that it won't work for remote test suites, as we don't control launching there. However, we could add a similar option to lldb-platform, or require that lldb-platform itself is started with attaching enabled. At that point we could delete all lldb_enable_attach logic.
|
 | lldb/packages/Python/lldbsuite/test/lldbplatformutil.py |
 | lldb/packages/Python/lldbsuite/test/lldbtest.py |
Commit
7c30c05ff71d062f0b8a05b7c3c12ede2c285371
by llvm-dev[DAG] visitVECTOR_SHUFFLE - MergeInnerShuffle - reset shuffle ops and reorder early-out and second op matching. NFCI.
I'm hoping to reuse MergeInnerShuffle in some other folds - so ensure the candidate ops/mask are reset at the start of each run.
Also, move the second op matching before bailing to make it simpler to try to match other things afterward.
|
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
Commit
2e25be0b6134e9544f7cee7bb7b31a921ca37cc0
by platonov.aleksandr[clangd] Add main file macros into the main-file index.
This patch is a try to fix `WorkspaceSymbols.Macros` test after D93796. If a macro definition is in the preamble section, then it appears to be in the preamble (static) index and not in the main-file (dynamic) index. Thus, a such macro could not be found at a symbol search according to the logic that we skip symbols from the static index if the location of these symbols is inside the dynamic index files. To fix this behavior this patch adds main file macros into the main-file (dynamic) index.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D94477
|
 | clang-tools-extra/clangd/XRefs.cpp |
 | clang-tools-extra/clangd/unittests/CollectMacrosTests.cpp |
 | clang-tools-extra/clangd/CollectMacros.cpp |
 | clang-tools-extra/clangd/SemanticHighlighting.cpp |
 | clang-tools-extra/clangd/unittests/FindSymbolsTests.cpp |
 | clang-tools-extra/clangd/unittests/ParsedASTTests.cpp |
 | clang-tools-extra/clangd/CollectMacros.h |
 | clang-tools-extra/clangd/index/SymbolCollector.cpp |
Commit
19297a4171177b942832d49a3767609d2a112ae1
by nigelpChange XCore code owner.
Discussion: https://lists.llvm.org/pipermail/llvm-dev/2021-January/147603.html
|
 | llvm/CODE_OWNERS.TXT |
Commit
3bccd87a588b3c320b669686c8f006b92ff72182
by Jan Svoboda[clang][cli] NFC: Remove SSPBufferSize assignment
This should've been part of D84669, but got overlooked. Removing the assignment is NFC, as it's also done by the marshalling infrastructure for the stack_protector_buffer_size option.
Reviewed By: dexonsmith in D94488
|
 | clang/lib/Frontend/CompilerInvocation.cpp |
Commit
fa2fe9608c1c1b402296960b1edc157230c30062
by Jan Svoboda[clang][cli] Port more CodeGenOptions to marshalling infrastructure
Leveraging the recently added TableGen constructs (ShouldParseIf and MarshallingInfoStringInt) to shift from manual command line parsing to automatic TableGen-driver marshalling.
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D94488
|
 | clang/include/clang/Driver/Options.td |
 | clang/lib/Frontend/CompilerInvocation.cpp |
Commit
6abbba3fca9fdf8d31f74800a7ddb40b103ae6e3
by alexandre.ganeaRevert "Fix llvm::Optional build breaks in MSVC using std::is_trivially_copyable"
This reverts commit 854f0984f0b7ab9a9a541a4bcda7ea173e4113d3.
This breaks compilation with clang-cl on Windows, while in a MSVC 16.8 cmd.exe. This also breaks PPC: http://lab.llvm.org:8011/#/builders/93/builds/1435 And: https://reviews.llvm.org/D93510#2497737
|
 | llvm/include/llvm/ADT/Optional.h |
 | llvm/unittests/ADT/OptionalTest.cpp |
Commit
176f5e95e1afad75ff045a00f0fa9c781bd5f54a
by mikhail.maltsev[clang-tidy] Use DenseSet<SourceLocation> in UpgradeDurationConversionsCheck, NFCI
This change replaces `unordered_set<unsigned>` (which used to store internal representation of `SourceLocation`-s) with `DenseSet<SourceLocation>` (which stores `SourceLocation`-s directly).
Reviewed By: aaron.ballman, njames93
Differential Revision: https://reviews.llvm.org/D94601
|
 | clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.cpp |
 | clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.h |
Commit
a1bbd1ef1dbd2a39777ef0b2d623f15f0523cdbf
by andrzej.warzynski[flang][driver] Unify f18_version.h.in and Version.inc.in
Flang has two CMake configurable header files that define compiler version numbers: * f18_version.h.in - only used in f18.cpp (uses version numbers from LLVM's macro definitions) * Version.inc.in - not currently used (uses version numbers hard-coded in Flang's top CMake script)
Currently only f18_version.h.in provides version numbers consistent with other subprojects in llvm-project. However, its location and name are inconsistent with e.g. Clang. This patch merges the two headers together: * hard-coded version numbers in Flang's top CMake script are deleted * Version.inc.in is updated to provide string versions of version numbers (required by f18.cpp) * f18_version.h.in is deleted as it's no longer needed
Differential Revision: https://reviews.llvm.org/D94422
|
 | flang/CMakeLists.txt |
 | flang/tools/f18/f18_version.h.in |
 | flang/tools/f18/CMakeLists.txt |
 | flang/tools/f18/f18.cpp |
 | flang/include/flang/Version.inc.in |
Commit
c23e34e606bf23ee8d4060469ecebe0f7971c5dd
by flo[InferFunctionAttrs] Improve CHECK variable names (NFC).
|
 | llvm/test/Transforms/InferFunctionAttrs/annotate.ll |
Commit
a1cba5b7a1fb09d2d4082967e2466a5a89ed698a
by jay.foad[SelectionDAG] Make use of KnownBits::commonBits. NFC.
Differential Revision: https://reviews.llvm.org/D94587
|
 | llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp |
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
Commit
517196e569129677be32d6ebcfa57bac552268a4
by jay.foad[Analysis,CodeGen] Make use of KnownBits::makeConstant. NFC.
Differential Revision: https://reviews.llvm.org/D94588
|
 | llvm/lib/Analysis/ValueTracking.cpp |
 | llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp |
 | llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
Commit
90b310f6caf0b356075c70407c338b3c751eebb3
by jay.foad[Support] Simplify KnownBits::icmp helpers. NFC.
Remove some special cases that aren't really any simpler than the general case.
Differential Revision: https://reviews.llvm.org/D94595
|
 | llvm/lib/Support/KnownBits.cpp |
Commit
e8622d27c0e3020177ff47ad57dd1e5371feb9cf
by llvm-dev[Support] Add KnownBits::sextInReg exhaustive tests
Requested by @foad in rG9cf4f493a72f
|
 | llvm/unittests/Support/KnownBitsTest.cpp |
Commit
332e220ef42b92df4e080cfa5b91c9accbe9731b
by Stefan Gränitz[docs] Update DebuggingJITedCode page after fix in LLDB
Generalize the documentation to include both, GDB and LLDB. Add a link to the interface definition. Make a note on MCJIT's restriction to ELF. Mention the regression and bugfix in LLDB as well as the jit-loader setting for macOS. Update the command line session to use LLDB instead of GDB.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D90789
|
 | llvm/docs/DebuggingJITedCode.rst |
Commit
0b46f19a9ecd6215cffb51d19f2403c18b0226f5
by llvm-dev[Support] Ensure KnownBits::sextInReg can handle the src == dst sext-in-reg case.
This was resulting in assertions inside APInt::zext that we were extending to the same bitwidth.
|
 | llvm/lib/Support/KnownBits.cpp |
 | llvm/unittests/Support/KnownBitsTest.cpp |
Commit
3e41ab18db2255028c288a11665c08d260654299
by tkeith[flang] Fix dangling pointer in LabelEnforce
`DirectiveStructureChecker` was passing in a pointer to a temporary string for the `construct` argument to the constructor for `LabelEnforce`. The `LabelEnforce` object had a lifetime longer than the temporary, resulting in accessing a dangling pointer when emitting an error message for `omp-parallell01.f90`.
The fix is to make the lifetime of the temporary as long as the lifetime of the `LabelEnforce` object.
Differential Revision: https://reviews.llvm.org/D94618
|
 | flang/lib/Semantics/check-directive-structure.h |
Commit
adb77a7456920a46908c7e20b2d3008789274975
by anastasia.stulova[OpenCL] Improve online documentation.
Update UsersManual and OpenCLSupport pages to reflect recent functionality i.e. SPIR-V generation, C++ for OpenCL, OpenCL 3.0 development plans.
Tags: #clang
Differential Revision: https://reviews.llvm.org/D93942
|
 | clang/docs/UsersManual.rst |
 | clang/docs/OpenCLSupport.rst |
Commit
6b9fa8a50d0f9e1e54f238b1c50fee8ff7011218
by antiagainst[mlir][linalg] Add docstring support for named op spec
Depends on D94335
Reviewed By: nicolasvasilache, hanchung
Differential Revision: https://reviews.llvm.org/D94548
|
 | mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp |
 | mlir/docs/Dialects/Linalg.md |
 | mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc |
Commit
c0939fddf80c16829502186e2e5b78f77696310a
by llvm-dev[Support] Simplify KnownBits::sextInReg implementation.
As noted by @foad in rG9cf4f493a72f all we need to do is sextInReg both KnownBits One and Zero.
|
 | llvm/lib/Support/KnownBits.cpp |
Commit
a022be625387370cf67b26c6b99b05f16b2a8610
by Paul C. Anagnostopoulos[TableGen] Enhance !cast<string> to handle bit and bits types.
Add a test for this.
Differential Revision: https://reviews.llvm.org/D94529
|
 | llvm/lib/TableGen/Record.cpp |
 | llvm/test/TableGen/cast-string.td |
Commit
dbaa6a1858a42f72b683f700d3bd7a9632f7a518
by martinRevert "[AArch64] Attempt to sink mul operands"
This reverts commit dda60035e9f0769c8907cdf6561489e0435c2275.
This commit caused failures to compile some sources, erroring out with "error in backend: Cannot select: t85: v2i32 = AArch64ISD::DUP t15", see https://reviews.llvm.org/D91271 for the full reproduction case.
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 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll |
Commit
d0dbb0468c26bafa88e7340781fb3a0a79379470
by llvm-dev[Support] Remove redundant sign bit tests from KnownBits::getSignedMinValue/getSignedMaxValue
As noted by @foad on rG6895581fd2c1
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 | llvm/include/llvm/Support/KnownBits.h |
Commit
0a59647ee407524e6468cc5be4ba288861aa700d
by llvm-dev[SystemZ] misched-cutoff tests can only be tested on non-NDEBUG (assertion) builds
Fixes clang-with-thin-lto-ubuntu buildbot after D94383/rGddd03842c347
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 | llvm/test/CodeGen/SystemZ/misched-cutoff.ll |
Commit
17fb21f875f4aaf6ad2cf9499cb75d76588167f2
by sam.mccall[clangd] Remove another option that was effectively always true. NFC
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 | clang-tools-extra/clangd/CodeComplete.h |
 | clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp |
 | clang-tools-extra/clangd/ClangdServer.cpp |
 | clang-tools-extra/clangd/tool/ClangdMain.cpp |
Commit
7c9c2a2ea5e3760d7310309c96c9a4ce41fa4d9b
by selliottRevert "[RISCV] Legalize select when Zbt extension available"
We found issues with this patch in additional testing. Backing out while we work on a fix.
This reverts commit 71ed4b6ce57d8843ef705af8f98305976a8f107a.
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 | llvm/test/CodeGen/RISCV/rv32Zbt.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/test/CodeGen/RISCV/rv64Zbt.ll |
 | llvm/lib/Target/RISCV/RISCVInstrInfoB.td |
 | llvm/test/CodeGen/RISCV/rv32Zbb.ll |
 | llvm/test/CodeGen/RISCV/rv32Zbbp.ll |
 | llvm/test/CodeGen/RISCV/rv32Zbs.ll |
Commit
0afdbb4d2dead42df14361ca9f5613d56667481c
by andrzej.warzynski[flang][driver] Use __FLANG_VERISION__ in f18.cpp (nfc)
Just a minor improvement suggested in a post-commit review here: https://reviews.llvm.org/D94422
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 | flang/tools/f18/f18.cpp |
Commit
e21bf875c0f709a721d98450203781a605483a1d
by mtrofin[NFC] Disallow unused prefixes under MC/ARM
Differential Revision: https://reviews.llvm.org/D94620
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 | llvm/test/MC/ARM/ldr-pseudo-cond-darwin.s |
 | llvm/test/MC/ARM/lsl-zero-errors.s |
 | llvm/test/MC/ARM/ldr-pseudo-cond.s |
 | llvm/test/MC/ARM/lit.local.cfg |
 | llvm/test/MC/ARM/lsl-zero.s |
 | llvm/test/MC/ARM/mve-fp-registers.s |
 | llvm/test/MC/ARM/thumbv8m.s |
Commit
2f395b7092bdac0e39bb4e2bb5e6b03e521a45dd
by usx[clangd] Make AST-based signals available to runWithPreamble.
Many useful signals can be derived from a valid AST which is regularly updated by the ASTWorker. `runWithPreamble` does not have access to the ParsedAST but it can be provided access to some signals derived from a (possibly stale) AST.
Differential Revision: https://reviews.llvm.org/D94424
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 | clang-tools-extra/clangd/ASTSignals.h |
 | clang-tools-extra/clangd/TUScheduler.h |
 | clang-tools-extra/clangd/CMakeLists.txt |
 | clang-tools-extra/clangd/unittests/TUSchedulerTests.cpp |
 | clang-tools-extra/clangd/unittests/CMakeLists.txt |
 | clang-tools-extra/clangd/ASTSignals.cpp |
 | clang-tools-extra/clangd/unittests/ASTSignalsTests.cpp |
 | clang-tools-extra/clangd/TUScheduler.cpp |
Commit
8b09cf7956d8abc722fa736874e4cea667a9d3cb
by usx[clangd] Trivial: Documentation fix in ASTSignals.
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 | clang-tools-extra/clangd/ASTSignals.cpp |
 | clang-tools-extra/clangd/ASTSignals.h |
Commit
b4e083b0ef7ca86851b5b1d043004ae632a63f8d
by llvmgnsyncbot[gn build] Port 2f395b7092bd
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 | llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn |
 | llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn |
Commit
4864d9f7e91fdd58a84e4ae576f1ad16f71f9d91
by pklausler[flang] Fix some module file issues exposed by Whizard
Generic type-bound interfaces for user-defined operators need to be formatted as "OPERATOR(.op.)", not just ".op."
PRIVATE generics need to be marked as such.
Declaration ordering: when a generic interface shadows a derived type of the same name, it needs to be emitted to the module file at the point of definition of the derived type; otherwise, the derived type's definition may appear after its first use.
The module symbol for a module read from a module file needs to be marked as coming from a module file before semantic processing is performed on the contents of the module so that any special handling for declarations in module files can be properly activated.
IMPORT statements were sometimes missing for use-associated symbols in surrounding scopes; fine-tune NeedImport().
Differential Revision: https://reviews.llvm.org/D94636
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 | flang/test/Semantics/modfile37.f90 |
 | flang/test/Semantics/modfile38.f90 |
 | flang/lib/Semantics/mod-file.cpp |
 | flang/test/Semantics/modfile35.f90 |
Commit
35c8a6cbf5ff0b525e2c01e5d746067bdda1dde7
by mtrofin[NFC] Disallow unused prefixes under MC/AArch64
Differential Revision: https://reviews.llvm.org/D94616
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 | llvm/test/MC/AArch64/armv8.7a-ls64.s |
 | llvm/test/MC/AArch64/armv8.7a-xs.s |
 | llvm/test/MC/AArch64/lit.local.cfg |
Commit
a03ffa98503bb6d5a990e61df060ed480c3e3f3b
by aeubanks[NewPM] Fix placement of LoopFlatten
https://reviews.llvm.org/D90402 was inconsistent with where it put LoopFlatten between the two pass managers. It also missed adding it to the non-O1 function simplification pipeline.
PR48738
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D94650
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 | llvm/lib/Passes/PassBuilder.cpp |
Commit
b99782cf7850a481fa36fd95ae04923739e0da6d
by llvm-dev[X86][AVX] Adjust unsigned saturation downconvert negative test
D87145 was showing that this test (added in D45315) could always be constant folded (with suitable value tracking).
What we actually needed was smax(smin()) negative test coverage, the invert of negative_test2_smax_usat_trunc_wb_256_mem, so I've tweaked the test to provide that instead.
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 | llvm/test/CodeGen/X86/avx512-trunc.ll |
Commit
5d165f0b893d4fc5fb5caeb2b05c566dd26e4d89
by jonathanchesterfield[libomptarget][amdgpu] Fix kernel launch tracing to match previous behavior
Restore control of kernel launch tracing to be >= 1 as it was before
export LIBOMPTARGET_KERNEL_TRACE=1
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D94695
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 | openmp/libomptarget/plugins/amdgpu/src/rtl.cpp |
Commit
868da2ea939baf8c71a6dcb878cf6094ede9486e
by jay.foad[SelectionDAG] Remove an early-out from computeKnownBits for smin/smax
Even if we know nothing about LHS, it can still be useful to know that smax(LHS, RHS) >= RHS and smin(LHS, RHS) <= RHS.
Differential Revision: https://reviews.llvm.org/D87145
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 | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
 | llvm/test/CodeGen/X86/known-bits-vector.ll |
Commit
85dfcaadc5f0920dc8ecbece6c786701b8f45ab4
by jotrem[LLDB] MinidumpParser: Prefer executable module even at higher address
When a program maps one of its own modules for reading, and then crashes, breakpad can emit two entries for that module in the ModuleList. We have logic to identify this case by checking permissions on mapped memory regions and report just the module with an executable region. As currently written, though, the check is asymmetric -- the entry with the executable region must be the second one encountered for the preference to kick in.
This change makes the logic symmetric, so that the first-encountered module will similarly be preferred if it has an executable region but the second-encountered module does not. This happens for example when the module in question is the executable itself, which breakpad likes to report first -- we need to ignore the other entry for that module when we see it later, even though it may be mapped at a lower virtual address.
Reviewed By: clayborg
Differential Revision: https://reviews.llvm.org/D94629
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 | lldb/source/Plugins/Process/minidump/MinidumpParser.cpp |
 | lldb/unittests/Process/minidump/MinidumpParserTest.cpp |
Commit
be40c12040a0d5551bf3430cbb184b5ef23e25fd
by enye.shi[HIP] Add signbit(long double) decl
An _MSC_VER version of signbit(long double) is required for MSVC headers.
Fixes: SWDEV-256409
Differential Revision: https://reviews.llvm.org/D93062
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 | clang/lib/Headers/__clang_cuda_math_forward_declares.h |
Commit
6ebeba88f51959d763a8f274cdfecea46d51d28c
by zinenkoSupport emptiness checks for unbounded FlatAffineConstraints.
With this, we have complete support for emptiness checks. This also paves the way for future support to check if two FlatAffineConstraints are equal.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D94272
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 | mlir/unittests/Analysis/AffineStructuresTest.cpp |
 | mlir/lib/Analysis/Presburger/Matrix.cpp |
 | mlir/include/mlir/Analysis/LinearTransform.h |
 | mlir/include/mlir/Analysis/Presburger/Fraction.h |
 | mlir/lib/Analysis/Presburger/CMakeLists.txt |
 | mlir/lib/Analysis/CMakeLists.txt |
 | mlir/lib/Analysis/Presburger/Simplex.cpp |
 | mlir/lib/Analysis/AffineStructures.cpp |
 | mlir/include/mlir/Analysis/AffineStructures.h |
 | mlir/unittests/Analysis/LinearTransformTest.cpp |
 | mlir/include/mlir/Analysis/Presburger/Simplex.h |
 | mlir/unittests/Analysis/CMakeLists.txt |
 | mlir/lib/Analysis/LinearTransform.cpp |
 | mlir/include/mlir/Analysis/Presburger/Matrix.h |
Commit
763c1f9933463c40c39c04b68bbe4d296823b003
by tianshilei1992[OpenMP] Drop the static library libomptarget-nvptx
For NVPTX target, OpenMP provides a static library `libomptarget-nvptx` built by NVCC, and another bitcode `libomptarget-nvptx-sm_{$sm}.bc` generated by Clang. When compiling an OpenMP program, the `.bc` file will be fed to `clang` in the second run on the program that compiles the target part. Then the generated PTX file will be fed to `ptxas` to generate the object file, and finally the driver invokes `nvlink` to generate the binary, where the static library will be appened to `nvlink`.
One question is, why do we need two libraries? The only difference is, the static library contains `omp_data.cu` and the bitcode library doesn't. It's unclear why they were implemented in this way, but per D94565, there is no issue if we also include the file into the bitcode library. Therefore, we can safely drop the static library.
This patch is about the change in OpenMP. The driver will be updated as well if this patch is accepted.
Reviewed By: jdoerfert, JonChesterfield
Differential Revision: https://reviews.llvm.org/D94573
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 | openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt |
Commit
4fffbc150cca1638051b8ad2a20f4b8240df0869
by zequanwu[clang][MSVC] Fix missing MSInheritanceAttr in template specialization.
Fix PR48687.
Differential Revision: https://reviews.llvm.org/D94646
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 | clang/lib/Sema/SemaTemplate.cpp |
 | clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp |
Commit
202d359753d1f130a228c3ad52dfaabf384250d1
by yamauchi[X86] Add the FSRM feature (Fast Short Rep Mov) to Zen3.
Note -x86-use-fsrm-for-memcpy is still disabled by default and there's no default behavior change.
Differential Revision: https://reviews.llvm.org/D94436
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 | llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll |
 | llvm/lib/Target/X86/X86.td |
Commit
64e9e9aeee0155fc12d7d40d56e7611a63d8e47d
by tianshilei1992[OpenMP] Dropped unnecessary define when compiling deviceRTLs for NVPTX
The comment said CUDA 9 header files use the `nv_weak` attribute which `clang` is not yet prepared to handle. It's three years ago and now things have changed. Based on my test, removing the definition doesn't have any problem on my machine with CUDA 11.1 installed.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D94700
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 | openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt |
Commit
a8520f6970fd4d44ceae1ec5969563a0dbe30f54
by 31459023+hctim[GWP-ASan] Minor refactor of optional components.
In preparation for the inbuilt options parser, this is a minor refactor of optional components including: - Putting certain optional elements in the right header files, according to their function and their dependencies. - Cleaning up some old and mostly-dead code. - Moving some functions into anonymous namespaces to prevent symbol export.
Reviewed By: cryptoad, eugenis
Differential Revision: https://reviews.llvm.org/D94117
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 | compiler-rt/lib/gwp_asan/tests/optional/printf_sanitizer_common.cpp |
 | compiler-rt/lib/gwp_asan/tests/CMakeLists.txt |
 | compiler-rt/lib/gwp_asan/optional/backtrace_fuchsia.cpp |
 | compiler-rt/lib/gwp_asan/optional/backtrace_linux_libc.cpp |
 | compiler-rt/lib/gwp_asan/tests/harness.h |
 | compiler-rt/lib/scudo/scudo_allocator.cpp |
 | compiler-rt/lib/scudo/standalone/combined.h |
 | compiler-rt/lib/gwp_asan/tests/platform_specific/printf_sanitizer_common.cpp |
 | compiler-rt/lib/gwp_asan/optional/printf.h |
 | compiler-rt/lib/gwp_asan/optional/backtrace_sanitizer_common.cpp |
 | compiler-rt/lib/gwp_asan/optional/backtrace.h |
 | compiler-rt/lib/gwp_asan/optional/segv_handler_fuchsia.cpp |
 | compiler-rt/lib/gwp_asan/optional/segv_handler_posix.cpp |
 | compiler-rt/lib/gwp_asan/optional/segv_handler.h |
Commit
ca98baa042538e1a8654dd86b24d1602df9a1aec
by clementval[openacc] Rename generated file from ACC.cpp.inc to ACC.inc to match D92955
This patch rename the tablegen generated file ACC.cpp.inc to ACC.inc in order to match what was done in D92955. This file is included in header file as well as .cpp file so it make more sense.
Reviewed By: sameeranjoshi
Differential Revision: https://reviews.llvm.org/D93485
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 | llvm/utils/gn/secondary/llvm/include/llvm/Frontend/OpenACC/BUILD.gn |
 | flang/lib/Parser/unparse.cpp |
 | flang/lib/Semantics/check-acc-structure.h |
 | llvm/include/llvm/Frontend/OpenACC/CMakeLists.txt |
 | flang/include/flang/Parser/parse-tree.h |
 | flang/include/flang/Parser/dump-parse-tree.h |
Commit
9e53c94d8dd737fcedb543d6ac687ea9696db8a6
by erich.keane[NFC] Update test to not check for 'opaque' in the file name.
The intent presumably is to avoid generating 'opaque' in the IR, but the header contains the filename. Thus, having the workspace in a directory with opaque in it causes this test to fail.
This just adds a 'CHECK' line on target-triple, which is the last line of the IR-header.
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 | clang/test/CodeGen/incomplete-function-type.c |
Commit
1d973b7ded124dd19f766db0c8e07d1c686dfb1b
by rob.suderman[MLIR][TOSA] First lowerings from Tosa to Linalg
Initial commit to add support for lowering from TOSA to Linalg. The focus is on the essential infrastructure for these lowerings and integration with existing passes.
Includes lowerings for a subset of operations including: abs, add, sub, pow, and, or, xor, left shift, right shift, tanh
Lit tests are used to validate correctness.
Differential Revision: https://reviews.llvm.org/D94247
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 | mlir/lib/Conversion/CMakeLists.txt |
 | mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h |
 | mlir/include/mlir/Conversion/Passes.td |
 | mlir/include/mlir/Conversion/Passes.h |
 | mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp |
 | mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir |
 | mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp |
 | mlir/lib/Conversion/TosaToLinalg/CMakeLists.txt |
Commit
d8113cda782b56477d71321027c50389f05f5d31
by joker.ephAdd newline to terminate debug message (NFC)
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 | mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp |
Commit
a3904cc77f181cff7355357688edfc392a236f5d
by nikita.ppv[BasicAA] Handle recursive queries more efficiently
An alias query currently works out roughly like this:
* Look up location pair in cache. * Perform BasicAA logic (including cache lookup and insertion...) * Perform a recursive query using BestAAResults. * Look up location pair in cache (and thus do not recurse into BasicAA) * Query all the other AA providers. * Query all the other AA providers.
This is a lot of unnecessary work, all ultimately caused by the BestAAResults query at the end of aliasCheck(). The reason we perform it, is that aliasCheck() is getting called recursively, and we of course want those recursive queries to also make use of other AA providers, not just BasicAA. We can solve this by making the recursive queries directly use BestAAResults (which will check both BasicAA and other providers), rather than recursing into aliasCheck().
There are some tradeoffs:
* We can no longer pass through the precomputed underlying object to aliasCheck(). This is not a major concern, because nowadays getUnderlyingObject() is quite cheap. * Results from other AA providers are no longer cached inside BasicAA. The way this worked was already a bit iffy, in that a result could be cached, but if it was MayAlias, we'd still end up re-querying other providers anyway. If we want to cache non-BasicAA results, we should do that in a more principled manner.
In any case, despite those tradeoffs, this works out to be a decent compile-time improvment. I think it also simplifies the mental model of how BasicAA works. It took me quite a while to fully understand how these things interact.
Differential Revision: https://reviews.llvm.org/D90094
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 | llvm/lib/Analysis/GlobalsModRef.cpp |
 | llvm/lib/Analysis/BasicAliasAnalysis.cpp |
 | llvm/include/llvm/Analysis/BasicAliasAnalysis.h |
Commit
00a61b327dd8a7071ce0baadd16ea4c7b7e31e73
by riddleriver[mlir][ODS] Add new RangedTypesMatchWith operation predicate
This is a variant of TypesMatchWith that provides support for variadic arguments. This is necessary because ranges generally can't use the default operator== comparators for checking equality.
Differential Revision: https://reviews.llvm.org/D94574
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 | mlir/test/lib/Dialect/Test/TestOps.td |
 | mlir/test/mlir-tblgen/op-format.mlir |
 | mlir/include/mlir/IR/OpBase.td |
 | mlir/tools/mlir-tblgen/OpFormatGen.cpp |
Commit
93592b726c7587aa86548cc74268346e25a4a7f2
by riddleriver[mlir][OpFormatGen] Format enum attribute cases as keywords when possible
In the overwhelmingly common case, enum attribute case strings represent valid identifiers in MLIR syntax. This revision updates the format generator to format as a keyword in these cases, removing the need to wrap values in a string. The parser still retains the ability to parse the string form, but the printer will use the keyword form when applicable.
Differential Revision: https://reviews.llvm.org/D94575
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 | mlir/test/Transforms/canonicalize.mlir |
 | mlir/test/mlir-tblgen/op-format.mlir |
 | mlir/test/Dialect/SPIRV/IR/target-env.mlir |
 | mlir/test/Dialect/Vector/vector-contract-transforms.mlir |
 | mlir/test/Conversion/AffineToStandard/lower-affine.mlir |
 | mlir/test/Dialect/Linalg/sparse_2d.mlir |
 | mlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir |
 | mlir/test/Dialect/Linalg/vectorization.mlir |
 | mlir/test/Dialect/Vector/vector-transforms.mlir |
 | mlir/test/Transforms/buffer-loop-hoisting.mlir |
 | mlir/test/Dialect/SCF/ops.mlir |
 | mlir/test/Transforms/copy-removal.mlir |
 | mlir/test/Transforms/parametric-tiling.mlir |
 | mlir/test/Target/SPIRV/barrier-ops.mlir |
 | mlir/test/Conversion/SCFToStandard/convert-to-cfg.mlir |
 | mlir/tools/mlir-tblgen/OpFormatGen.cpp |
 | mlir/test/Dialect/GPU/all-reduce-max.mlir |
 | mlir/test/Analysis/test-liveness.mlir |
 | mlir/test/Conversion/VectorToSCF/vector-to-loops.mlir |
 | mlir/test/Transforms/cse.mlir |
 | mlir/test/Dialect/SPIRV/IR/availability.mlir |
 | mlir/test/Transforms/buffer-hoisting.mlir |
 | mlir/test/Target/SPIRV/non-uniform-ops.mlir |
 | mlir/test/Dialect/Affine/parallelize.mlir |
 | mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir |
 | mlir/test/Target/SPIRV/group-ops.mlir |
 | mlir/test/Transforms/constant-fold.mlir |
 | mlir/test/Transforms/sccp-structured.mlir |
 | mlir/test/Transforms/buffer-deallocation.mlir |
 | mlir/test/EDSC/builder-api-test.cpp |
 | mlir/test/Conversion/ShapeToStandard/convert-shape-constraints.mlir |
 | mlir/test/Dialect/GPU/all-reduce.mlir |
 | mlir/test/Conversion/LinalgToSPIRV/linalg-to-spirv.mlir |
 | mlir/test/Conversion/SCFToGPU/parallel_loop.mlir |
 | mlir/test/Dialect/SCF/parallel-loop-specialization.mlir |
 | mlir/test/Dialect/Linalg/sparse_3d.mlir |
 | mlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir |
 | mlir/test/Dialect/Vector/vector-transfer-full-partial-split.mlir |
 | mlir/test/Transforms/sccp.mlir |
 | mlir/test/Dialect/SPIRV/IR/barrier-ops.mlir |
 | mlir/test/Dialect/Linalg/sparse_1d.mlir |
 | mlir/test/Dialect/SPIRV/IR/group-ops.mlir |
 | mlir/integration_test/Dialect/Linalg/CPU/matmul-vs-matvec.mlir |
 | mlir/test/Dialect/Linalg/tile-and-distribute.mlir |
 | mlir/test/Dialect/Standard/expand-tanh.mlir |
 | mlir/test/Dialect/SPIRV/IR/non-uniform-ops.mlir |
 | mlir/test/IR/invalid-ops.mlir |
 | mlir/test/IR/core-ops.mlir |
 | mlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir |
 | mlir/test/IR/invalid.mlir |
 | mlir/test/Transforms/canonicalize-block-merge.mlir |
 | mlir/test/Analysis/test-dominance.mlir |
 | mlir/test/Dialect/Linalg/convert-elementwise-to-linalg.mlir |
 | mlir/test/Dialect/Standard/canonicalize.mlir |
 | mlir/test/Dialect/Linalg/loops.mlir |
 | mlir/test/Transforms/promote-buffers-to-stack.mlir |
 | mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir |
 | mlir/test/Dialect/Standard/expand-ops.mlir |
 | mlir/test/Transforms/sccp-callgraph.mlir |
 | mlir/test/Dialect/SCF/for-loop-specialization.mlir |
Commit
e3b9af92a4821fec25c207e2d1e443e09ff6b11e
by i[Driver] -gsplit-dwarf: Produce .dwo regardless of -gN for IR input
This generalizes D94647 to IR input, as suggested by @tejohnson. Ideally the driver should just forward split dwarf options, but doing this currently will cause `clang -gsplit-dwarf -c a.c` to create a .dwo with just `.strtab`.
Reviewed By: dblaikie, tejohnson
Differential Revision: https://reviews.llvm.org/D94655
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 | clang/test/Driver/split-debug.c |
 | clang/lib/Driver/ToolChains/Clang.cpp |
Commit
387d3c24792f7ab5f2f8aab37d64948f42523825
by craig.topper[RISCV] Merge Utils library into MCTargetDesc
MCTargetDesc includes headers from Utils and Utils includes headers from MCTargetDesc. So from a library layering perspective it makes sense for them to be in the same library. I guess the other option might be to move the tablegen includes from RISCVMCTargetDesc.h to RISCVBaseInfo.h so that RISCVBaseInfo.h didn't need to include RISCVMCTargetDesc.h. Everything else that depends on Utils also depends on MCTargetDesc so having one library seemed simpler.
Differential Revision: https://reviews.llvm.org/D93168
|
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/lib/Target/RISCV/AsmParser/CMakeLists.txt |
 | llvm/lib/Target/RISCV/CMakeLists.txt |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp |
 | llvm/lib/Target/RISCV/Utils/CMakeLists.txt |
 | llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp |
 | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp |
 | llvm/lib/Target/RISCV/Utils/RISCVMatInt.cpp |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp |
 | llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h |
 | llvm/lib/Target/RISCV/RISCVInstrInfo.cpp |
 | llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp |
 | llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp |
 | llvm/lib/Target/RISCV/RISCVSubtarget.h |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp |
 | llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
 | llvm/lib/Target/RISCV/RISCV.h |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h |
 | llvm/lib/Target/RISCV/RISCVTargetMachine.cpp |
 | llvm/lib/Target/RISCV/Utils/RISCVMatInt.h |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp |
 | llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.h |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h |
Commit
c8fb6ee34151b18bcc9ed1a6b8f502a0b40a414e
by riddleriver[mlir][PatternRewriter] Add a new hook to selectively replace uses of an operation
This revision adds a new `replaceOpWithIf` hook that replaces uses of an operation that satisfy a given functor. If all uses are replaced, the operation gets erased in a similar manner to `replaceOp`. DialectConversion support will be added in a followup as this requires adjusting how replacements are tracked there.
Differential Revision: https://reviews.llvm.org/D94632
|
 | mlir/lib/IR/PatternMatch.cpp |
 | mlir/include/mlir/IR/PatternMatch.h |
 | mlir/lib/Transforms/Utils/DialectConversion.cpp |
 | mlir/test/lib/Dialect/Test/TestPatterns.cpp |
 | mlir/include/mlir/Transforms/DialectConversion.h |
 | mlir/test/Transforms/test-pattern-selective-replacement.mlir |
Commit
5cf2696317afb0631a4a09414ae40a4e226a905e
by tpopp[mlir] Remove TosaToLinalg dependency on all Passes
TosaToLinalg was depending on its header file indirectly through Passes.h rather than directly. This removes that indirection.
Differential Revision: https://reviews.llvm.org/D94706
|
 | mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp |
Commit
a71877edfbb7094584f6d20d93f6091e7d374024
by adamcz[clang] Do not crash when CXXRecordDecl has a non-CXXRecordDecl base.
This can happen on some invalid code, like the included test case.
Differential Revision: https://reviews.llvm.org/D94704
|
 | clang/lib/Sema/SemaDeclCXX.cpp |
 | clang/test/SemaTemplate/temp_class_spec.cpp |
Commit
e2d7d3cb0eade079690c3938f694c8f7ef2b686b
by silvasean[mlir][docs] Bring bufferization docs up to date.
This spilts out BufferDeallocationInternals.md, since buffer deallocation is not part of bufferization per se.
Differential Revision: https://reviews.llvm.org/D94351
|
 | mlir/docs/BufferDeallocationInternals.md |
 | mlir/docs/Bufferization.md |
Commit
0f588ac03e15a204b68f0214dda2b9f67410ff62
by Jinsong Ji[PowerPC] Only use some extend mne if assembler is modern enough
Legacy AIX assembly might not support all extended mnes, add one feature bit to control the generation in MC, and avoid generating them by default on AIX.
Reviewed By: sfertile
Differential Revision: https://reviews.llvm.org/D94458
|
 | llvm/lib/Target/PowerPC/PPC.td |
 | llvm/test/MC/PowerPC/modern-aix-as.s |
 | llvm/lib/Target/PowerPC/PPCInstrInfo.td |
 | llvm/lib/Target/PowerPC/PPCSubtarget.cpp |
 | llvm/lib/Target/PowerPC/PPCSubtarget.h |
 | llvm/lib/Target/PowerPC/PPCInstr64Bit.td |
 | llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt |
 | llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp |
 | llvm/lib/Target/PowerPC/PPCTargetMachine.cpp |
Commit
0975604cc013b51ef2435199bd74a6d635b11150
by thakis[gn build] (manually) port 387d3c24792f
|
 | llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn |
 | llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn |
 | llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn |
 | llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn |
 | llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn |
Commit
e7228062b2bb87abf762abcb77668452a1ed35d4
by mcgrathr[libc] Use #undef isascii in specific header
Standard C allows all standard headers to declare macros for all their functions. So after possibly including any standard header like <ctype.h>, it's perfectly normal for any and all of the functions it declares to be defined as macros. Standard C requires explicit `#undef` before using that identifier in a way that is not compatible with function-like macro definitions.
The C standard's rules for this are extended to POSIX as well for the interfaces it defines, and it's the expected norm for nonstandard extensions declared by standard C library headers too.
So far the only place this has come up for llvm-libc's code is with the isascii function in Fuchsia's libc. But other cases can arise for any standard (or common extension) function names that source code in llvm-libc is using in nonstandard ways, i.e. as C++ identifiers.
The only correct and robust way to handle the possible inclusion of standard C library headers when building llvm-libc source code is to use `#undef` explicitly for each identifier before using it. The easy and obvious place to do that is in the per-function header. This requires that all code, such as test code, that might include any standard C library headers, e.g. via utils/UnitTest/Test.h, make sure to include those *first* before the per-function header.
This change does that for isascii and its test. But it should be done uniformly for all the code and documented as a consistent convention so new implementation files are sure to get this right.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D94642
|
 | libc/test/src/ctype/isascii_test.cpp |
 | libc/src/ctype/isascii.h |
 | libc/utils/UnitTest/FuchsiaTest.h |
Commit
f85b1531666d12e6ca9b29217b5c5da30dfd93cf
by douglas.yungAdd -fexceptions to test as it uses them and fails on platforms where it is not on by default (like the PS4).
|
 | clang-tools-extra/test/clang-tidy/checkers/readability-function-cognitive-complexity.cpp |
Commit
b894a9fb237345db64d14ce3881d3195e124df0d
by craig.topper[RISCV] Optimize select_cc after fp compare expansion
Some FP compares expand to a sequence ending with (xor X, 1) to invert the result. If the consumer is a select_cc we can likely get rid of this xor by fixing up the select_cc condition.
This patch combines (select_cc (xor X, 1), 0, setne, trueV, falseV) - (select_cc X, 0, seteq, trueV, falseV) if we can prove X is 0/1.
Reviewed By: lenary
Differential Revision: https://reviews.llvm.org/D94546
|
 | llvm/test/CodeGen/RISCV/float-select-fcmp.ll |
 | llvm/test/CodeGen/RISCV/half-select-fcmp.ll |
 | llvm/test/CodeGen/RISCV/double-select-fcmp.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.h |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
Commit
4fcb25583c3ccbe10c4367d02086269e5fa0bb87
by alexandre.ganeaRe-land [Support] On Windows, take the affinity mask into account
The number of hardware threads available to a ThreadPool can be limited if setting an affinity mask. For example:
> start /B /AFFINITY 0xF lld-link.exe ...
Would let LLD only use 4 hyper-threads.
Previously, there was an outstanding issue on Windows Server 2019 on dual-CPU machines, which was preventing from using both CPU sockets. In normal conditions, when no affinity mask was set, ProcessorGroup::AllThreads was different from ProcessorGroup::UsableThreads. The previous code in llvm/lib/Support/Windows/Threading.inc L201 was improperly assuming those two values to be equal, and consequently was limiting the execution to only one CPU socket.
Differential Revision: https://reviews.llvm.org/D92419
|
 | llvm/lib/Support/Program.cpp |
 | llvm/include/llvm/Support/Program.h |
 | llvm/lib/Support/Unix/Program.inc |
 | llvm/lib/Support/Windows/Program.inc |
 | llvm/unittests/Support/ThreadPool.cpp |
 | llvm/lib/Support/Windows/Threading.inc |
Commit
5b42fd8dd4e7e29125a09a41a33af7c9cb57d144
by tejohnson[LTO] Test format fix (NFC)
As requested in D91583, use ';;' instead of ';' to preceed comments in lld test. I did this in the equivalent gold test as well.
|
 | lld/test/ELF/lto/devirt_vcall_vis_public.ll |
 | llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll |
Commit
8a53a7375a86a5a89ba124de9e17aa5701544104
by selliott[RISCV][NFC] Regenerate Calling Convention Tests
This regenerates these tests using utils/update_llc_test_checks.py so that future changes in this area don't have the noise of lots of `@plt` lines being added.
I also removed the `nounwind`s from the stack-realignment.ll test to increase coverage on the generated call frame information.
|
 | llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll |
 | llvm/test/CodeGen/RISCV/callee-saved-gprs.ll |
 | llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll |
 | llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll |
 | llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll |
 | llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll |
 | llvm/test/CodeGen/RISCV/vararg.ll |
 | llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll |
 | llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll |
 | llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll |
 | llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll |
 | llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll |
 | llvm/test/CodeGen/RISCV/stack-realignment.ll |
 | llvm/test/CodeGen/RISCV/calling-conv-lp64.ll |
Commit
a55a0a3056b8163d9e709b534bd737730fbb5d44
by youngar17[mlir] Remove over specified memory effects
The standard and gpu dialect both have `alloc` operations which use the memory effect `MemAlloc`. In both cases, it is specified on both the operation itself and on the result. This results in two memory effects being created for these operations. When `MemAlloc` is defined on an operation, it represents some background effect which the compiler cannot reason about, and inhibits the ability of the compiler to remove dead `std.alloc` operations. This change removes the uneeded `MemAlloc` effect from these operations and leaves the effect on the result, which allows dead allocs to be erased.
There is the same problem, but to a lesser extent, with MemFree, MemRead and MemWrite. Over-specifying these traits is not currently inhibiting any optimization.
Differential Revision: https://reviews.llvm.org/D94662
|
 | mlir/include/mlir/Dialect/GPU/GPUOps.td |
 | mlir/test/Dialect/Linalg/sparse_2d.mlir |
 | mlir/test/Dialect/Linalg/sparse_3d.mlir |
 | mlir/docs/Interfaces.md |
 | mlir/test/Dialect/Linalg/sparse_1d.mlir |
 | mlir/test/Transforms/canonicalize.mlir |
 | mlir/include/mlir/Dialect/StandardOps/IR/Ops.td |
Commit
4183999e0fe1ffbc8bdb2f06f2e5f210a0c94e35
by sam.mccall[clangd] Reduce logspam for CDB scanning
|
 | clang-tools-extra/clangd/GlobalCompilationDatabase.cpp |
Commit
722ae10907e06a0bafa00c557e5242b53419a3ce
by ravishankarm[mlir][Linalg] Add canonicalization to remove no-op linalg operations.
linalg.generic/indexed_generic operations on tensors whose body is just yielding the (non-induction variable) arguments of the operation can be canonicalized by replacing uses of the result with the corresponding arguments.
Differential Revision: https://reviews.llvm.org/D94581
|
 | mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp |
 | mlir/test/Dialect/Linalg/canonicalize.mlir |
Commit
b21905dfe3797289791443661540b72cb43dfdf3
by spatel[SLP] remove unnecessary state in matching reductions
This is NFC-intended. I'm still trying to figure out how the loop where this is used works. It does not seem like we require this data at all, but it's hard to confirm given the complicated predicates.
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
547b032ccc8e1da5d1716afeb0afa8988e129fd0
by tianshilei1992[OpenMP] Remove omptarget-nvptx from deps as it is no longer a valid target
`omptarget-nvptx` is still a dependence for `check-libomptarget-nvtpx` although it has been removed by D94573.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D94725
|
 | openmp/libomptarget/deviceRTLs/nvptx/test/CMakeLists.txt |
Commit
774c9c6ef3addc735939a388965a0a694bbd4f57
by ravishankarm[mlir][Linalg] Add canonicalization of linalg op -> dim op.
Add canonicalization to replace use of the result of a linalg operation on tensors in a dim operation, to use one of the operands of the linalg operations instead. This allows the linalg op itself to be deleted when all its non-dim uses are removed (say through tiling, etc.)
Differential Revision: https://reviews.llvm.org/D93076
|
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td |
 | mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp |
 | mlir/test/Dialect/Linalg/canonicalize.mlir |
 | mlir/lib/Dialect/Linalg/IR/LinalgTypes.cpp |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgTypes.h |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td |
 | mlir/include/mlir/IR/AffineExprVisitor.h |
Commit
42444d0cf0c9cf92f89acf16f11f3b7242d81619
by ravishankarm[mlir][Linalg] NFC: Verify tiling on linalg.generic operation on tensors.
With the recent changes to linalg on tensor semantics, the tiling operations works out-of-the-box for generic operations. Add a test to verify that and some minor refactoring.
Differential Revision: https://reviews.llvm.org/D93077
|
 | mlir/include/mlir/IR/AffineMap.h |
 | mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp |
 | mlir/test/Dialect/Linalg/tile-tensors.mlir |
Commit
6e7094c14b22a202c15959316033c164d7a84122
by jonathanchesterfield[libomptarget][nvptx][nfc] Move target_impl functions out of header
[libomptarget][nvptx][nfc] Move target_impl functions out of header
This removes most of the differences between the two target_impl.h.
Also change name mangling from C to C++ for __kmpc_impl_*_lock.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D94728
|
 | openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu |
 | openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h |
Commit
d6acf3c2012b00f06a422e8704609676be7729b2
by tkeith[flang] Fix use-associated procedure in generic
When a use-associated procedure was included in a generic, we weren't correctly recording that fact. The ultimate symbol was added rather than the local symbol.
Also, improve the message emitted for the specific procedure by mentioning the module it came from.
This fixes one of the problems in https://bugs.llvm.org/show_bug.cgi?id=48648.
Differential Revision: https://reviews.llvm.org/D94696
|
 | flang/test/Semantics/modfile07.f90 |
 | flang/lib/Semantics/resolve-names.cpp |
 | flang/test/Semantics/resolve53.f90 |
Commit
036bc798f2ae4d266fe01e70778afe0b3381c088
by Amara Emerson[AArch64][GlobalISel] Assign FPR banks to loads which are used by integer->float conversions.
G_[US]ITOFP users of loads on AArch64 can operate on both gpr and fpr banks for scalars. Because of this, if their source is a load, then that load can be assigned to an fpr bank and therefore avoid having to do a cross bank copy via a gpr->fpr conversion.
Differential Revision: https://reviews.llvm.org/D94701
|
 | llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir |
 | llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp |
Commit
9dfeec853008109b1cbe926c22675c96226040d9
by jiancaiReland "[AsmParser] make .ascii support spaces as separators"
This relands commit e0963ae274be5b071d1e1b00f5e4e019483c09e9, which was reverted on commit 82c4153e66fa284729da86a8d6c302d4b8cec86c due to a test failure, which turned out to be a false positive.
|
 | llvm/test/MC/AsmParser/directive_ascii.s |
 | llvm/lib/MC/MCParser/AsmParser.cpp |
Commit
214387c2c694c92fec713f7ad224f10c1aebc1cf
by jonathanchesterfield[libomptarget][nvptx] Reduce calls to cuda header
[libomptarget][nvptx] Reduce calls to cuda header
Remove use of clock_t in favour of a builtin. Drop a preprocessor branch.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D94731
|
 | openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu |
Commit
1fabe6e51917bcd7a1242294069c682fe6dffa45
by yitzhakm[libTooling] Change `addInclude` to use expansion locs.
This patch changes the default range used to anchor the include insertion to use an expansion loc. This ensures that the location is valid, when the user relies on the default range.
Driveby: extend a FIXME for a problem that was emphasized by this change; fix some spellings.
Differential Revision: https://reviews.llvm.org/D93703
|
 | clang/lib/Tooling/Transformer/RewriteRule.cpp |
 | clang/include/clang/Tooling/Transformer/RewriteRule.h |
Commit
8f283cafddfa8d6d01a94b48cdc5d25817569e91
by Amara Emerson[AArch64][GlobalISel] Add selection support for fpr bank source variants of G_SITOFP and G_UITOFP.
In order to import patterns for these, we need to define new ops that can map to the AArch64ISD::[SU]ITOF nodes. We then transform fpr->fpr variants of the generic opcodes to these custom opcodes in preisel-lowering. We have to do it here and not the PostLegalizer combiner because this has to run after regbankselect.
Differential Revision: https://reviews.llvm.org/D94702
|
 | llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir |
 | llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp |
 | llvm/lib/Target/AArch64/AArch64InstrGISel.td |
Commit
2423ec583761304f93b5d01493a26aeb11cb5b8f
by chennngwang[libc] Add memmove implementation.
Use `memcpy` rather than copying bytes one by one, for there might be large size structs to move.
Reviewed By: gchatelet, sivachandra
Differential Revision: https://reviews.llvm.org/D93195
|
 | libc/test/src/string/memmove_test.cpp |
 | libc/config/linux/aarch64/entrypoints.txt |
 | libc/src/string/memmove.cpp |
 | libc/config/linux/x86_64/entrypoints.txt |
 | libc/src/string/CMakeLists.txt |
 | libc/src/string/memmove.h |
 | libc/test/src/string/CMakeLists.txt |
Commit
9bcc0d1040ddd63b7f82e309c0d5feb4e0c9005e
by kazu[CodeGen, Transforms] Use llvm::sort (NFC)
|
 | llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp |
 | llvm/lib/Transforms/Scalar/NewGVN.cpp |
 | llvm/lib/CodeGen/RDFLiveness.cpp |
 | llvm/lib/Transforms/Coroutines/CoroFrame.cpp |
 | llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp |
 | llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp |
 | llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp |
 | llvm/lib/CodeGen/RegAllocFast.cpp |
 | llvm/lib/Transforms/Scalar/ConstraintElimination.cpp |
Commit
2efcbe24a75b2a9ff6d59d242f560dca96e5f7e0
by kazu[llvm] Use llvm::drop_begin (NFC)
|
 | llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp |
 | llvm/lib/Analysis/LazyCallGraph.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp |
 | llvm/lib/Transforms/IPO/OpenMPOpt.cpp |
 | llvm/lib/CodeGen/CodeGenPrepare.cpp |
 | llvm/lib/Analysis/ModuleSummaryAnalysis.cpp |
 | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp |
 | llvm/lib/Target/X86/X86MCInstLower.cpp |
 | llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp |
 | llvm/tools/llvm-xray/xray-stacks.cpp |
 | llvm/lib/Analysis/VFABIDemangling.cpp |
Commit
7dc3575ef2dc85d92aa3ad916d0eb73a0aa088c9
by kazu[llvm] Remove redundant return and continue statements (NFC)
Identified with readability-redundant-control-flow.
|
 | llvm/tools/llvm-profgen/ProfiledBinary.cpp |
 | llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp |
 | llvm/lib/Target/X86/X86FlagsCopyLowering.cpp |
 | llvm/utils/TableGen/X86FoldTablesEmitter.cpp |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/lib/Target/X86/X86IndirectThunks.cpp |
 | llvm/lib/Transforms/IPO/AttributorAttributes.cpp |
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
 | llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp |
 | llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp |
 | llvm/lib/TextAPI/MachO/InterfaceFile.cpp |
 | llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp |
 | llvm/lib/Transforms/IPO/OpenMPOpt.cpp |
 | llvm/lib/Target/PowerPC/PPCISelLowering.cpp |
 | llvm/lib/IR/AutoUpgrade.cpp |
 | llvm/tools/llvm-profdata/llvm-profdata.cpp |
 | llvm/lib/FileCheck/FileCheck.cpp |
 | llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp |
 | llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp |
 | llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp |
 | llvm/lib/CodeGen/MachinePipeliner.cpp |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp |
 | llvm/tools/llvm-mca/CodeRegion.cpp |
 | llvm/lib/Demangle/MicrosoftDemangleNodes.cpp |
 | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp |
 | llvm/lib/Passes/StandardInstrumentations.cpp |
 | llvm/lib/Support/Unix/Path.inc |
 | llvm/lib/Transforms/Coroutines/CoroFrame.cpp |
 | llvm/include/llvm/CodeGen/LiveRegUnits.h |
Commit
39665d9aabb7cd92d58f8ba45b32a1899922ec01
by yhegdeAdd Semantic check for Flang OpenMP 4.5 - 2.7.1 Do Loop restrictions on single directive and firstprivate clause.
Semantic checks added to check the worksharing 'single' region closely nested inside a worksharing 'do' region. And also to check whether the 'do' iteration variable is a variable in 'Firstprivate' clause.
Files: check-directive-structure.h check-omp-structure.h check-omp-structure.cpp
Testcases: omp-do01-positivecase.f90 omp-do01.f90 omp-do05-positivecase.f90 omp-do05.f90
Reviewed by: Kiran Chandramohan @kiranchandramohan , Valentin Clement @clementval
Differential Revision: https://reviews.llvm.org/D93205
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 | flang/test/Semantics/omp-do01.f90 |
 | flang/test/Semantics/omp-do01-positivecase.f90 |
 | flang/test/Semantics/omp-do05.f90 |
 | flang/lib/Semantics/check-omp-structure.cpp |
 | flang/lib/Semantics/check-omp-structure.h |
 | flang/test/Semantics/omp-do05-positivecase.f90 |
 | flang/lib/Semantics/check-directive-structure.h |
Commit
5508516b06633e95fb5c2d6a5e196e4dcaa72c8d
by ajcbik[mlir][sparse] retry sparse-only for cyclic iteration graphs
This is a very minor improvement during iteration graph construction. If the first attempt considering the dimension order of all tensors fails, a second attempt is made using the constraints of sparse tensors only. Dense tensors prefer dimension order (locality) but provide random access if needed, enabling the compilation of more sparse kernels.
Reviewed By: penpornk
Differential Revision: https://reviews.llvm.org/D94709
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 | mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp |
 | mlir/test/Dialect/Linalg/sparse_nd.mlir |
Commit
c495dfe0268bc2be8737725d657411baa1399e9d
by Jan Svoboda[clang][cli] NFC: Decrease the scope of ParseLangArgs parameters
Instead of passing the whole `TargetOptions` and `PreprocessorOptions` to `ParseLangArgs` give it only the necessary members. This makes tracking the dependencies between various parsers and option groups easier.
Reviewed By: Bigcheese
Differential Revision: https://reviews.llvm.org/D94674
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 | clang/lib/Frontend/CompilerInvocation.cpp |
 | clang/include/clang/Frontend/CompilerInvocation.h |
Commit
1a49944b59dbbfd62bd860b564919087f274a5bf
by Jan Svoboda[clang][cli] NFC: Decrease the scope of ParseCodeGenArgs parameters
Instead of passing the whole `TargetOptions` and `FrontendOptions` to `ParseCodeGenArgs` give it only the necessary members. This makes tracking the dependencies between various parsers and option groups easier.
Reviewed By: Bigcheese
Differential Revision: https://reviews.llvm.org/D94675
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 | clang/lib/Frontend/CompilerInvocation.cpp |
Commit
b6575bfd0eeb5a364dd2e4f4a2e461679da1f8a9
by Jan Svoboda[clang][cli] Specify KeyPath prefixes via TableGen classes
It turns out we need to handle `LangOptions` separately from the rest of the options. `LangOptions` used to be conditionally parsed only when `!(DashX.getFormat() == InputKind::Precompiled || DashX.getLanguage() == Language::LLVM_IR)` and we need to restore this order (for more info, see D94682).
We could do this similarly to how `DiagnosticOptions` are handled: via a counterpart to the `IsDiag` mix-in (e.g. `IsLang`). These mix-ins would prefix the option key path with the appropriate `CompilerInvocation::XxxOpts` member. However, this solution would be problematic, as we'd now have two kinds of options (`Lang` and `Diag`) with seemingly incomplete key paths in the same file. To understand what `CompilerInvocation` member an option affects, one would need to read the whole option definition and notice the `IsDiag` or `IsLang` class.
Instead, this patch introduces more robust way to handle different kinds of options separately: via the `KeyPathAndMacroPrefix` class. We have one specialization of that class per `CompilerInvocation` member (e.g. `LangOpts`, `DiagnosticOpts`, etc.). Now, instead of specifying a key path with `"LangOpts->UndefPrefixes"`, we use `LangOpts<"UndefPrefixes">`. This keeps the readability intact (you don't have to look for the `IsLang` mix-in, the key path is complete on its own) and allows us to specify a custom macro prefix within `LangOpts`.
Reviewed By: Bigcheese
Differential Revision: https://reviews.llvm.org/D94676
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 | llvm/unittests/Option/OptionMarshallingTest.cpp |
 | llvm/include/llvm/Option/OptParser.td |
 | clang/lib/Frontend/CompilerInvocation.cpp |
 | llvm/unittests/Option/Opts.td |
 | clang/include/clang/Driver/Options.td |
Commit
b54337070b198cf66356a4ee3e420666151a2023
by t-kawashima[AArch64] Add Fujitsu A64FX scheduling model
Basic support of A64FX was added in D75594 but its scheduling model was missing. This commit adds the scheduling model. Also, this commit amends/adds some subtarget parameters of A64FX.
The A64FX Microarchitecture Manual, which is source information of this commit, is on GitHub.
https://github.com/fujitsu/A64FX/
Differential Revision: https://reviews.llvm.org/D93791
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 | llvm/lib/Target/AArch64/AArch64.td |
 | llvm/test/CodeGen/AArch64/preferred-function-alignment.ll |
 | llvm/lib/Target/AArch64/AArch64SchedA64FX.td |
 | llvm/lib/Target/AArch64/AArch64Subtarget.cpp |
 | llvm/test/CodeGen/AArch64/machine-combiner-madd.ll |
Commit
38dfce706f796dc109ea495dd69a8cb4c8fa819d
by wingo[WebAssembly] Add support for table linking to wasm-ld
This patch adds support to wasm-ld for linking multiple table references together, in a manner similar to wasm globals. The indirect function table is synthesized as needed.
To manage the transitional period in which the compiler doesn't yet produce TABLE_NUMBER relocations and doesn't residualize table symbols, the linker will detect object files which have table imports or definitions, but no table symbols. In that case it will synthesize symbols for the defined and imported tables.
As a change, relocatable objects are now written with table symbols, which can cause symbol renumbering in some of the tests. If no object file requires an indirect function table, none will be written to the file. Note that for legacy ObjFile inputs, this test is conservative: as we don't have relocs for each use of the indirecy function table, we just assume that any incoming indirect function table should be propagated to the output.
Differential Revision: https://reviews.llvm.org/D91870
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 | lld/wasm/InputFiles.cpp |
 | lld/test/wasm/shared.ll |
 | lld/wasm/SymbolTable.cpp |
 | lld/wasm/SyntheticSections.cpp |
 | lld/wasm/SymbolTable.h |
 | lld/test/wasm/section-symbol-relocs.yaml |
 | lld/test/wasm/init-fini.ll |
 | lld/test/wasm/weak-alias.ll |
 | lld/test/wasm/stack-pointer.ll |
 | lld/wasm/SyntheticSections.h |
 | lld/wasm/InputFiles.h |
 | lld/test/wasm/local-symbols.ll |
 | lld/wasm/MarkLive.cpp |
 | lld/wasm/Symbols.h |
 | lld/test/wasm/pie.ll |
 | lld/wasm/Driver.cpp |
 | lld/wasm/Writer.cpp |
 | lld/test/wasm/signature-mismatch.ll |
 | lld/test/wasm/alias.s |
 | lld/test/wasm/locals-duplicate.test |
 | lld/wasm/Symbols.cpp |
Commit
33be50daa9ce1074c3b423a4ab27c70c0722113a
by nikita.ppvRevert "Reapply "ADT: Fix reference invalidation in SmallVector::push_back and single-element insert""
This reverts commit 260a856c2abcef49c7cb3bdcd999701db3e2af38. This reverts commit 3043e5a5c33c4c871f4a1dfd621a8839f9a1f0b3. This reverts commit 49142991a685bd427d7e877c29c77371dfb7634c.
This change had a larger than anticipated compile-time impact, possibly because the small value optimization is not working as intended. See D93779.
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 | llvm/include/llvm/ADT/SmallVector.h |
 | llvm/unittests/ADT/SmallVectorTest.cpp |
Commit
168be4208304e36d3bb156b5c413b340a391383e
by qiucofan[Clang] Mutate long-double math builtins into f128 under IEEE-quad
Under -mabi=ieeelongdouble on PowerPC, IEEE-quad floating point semantic is used for long double. This patch mutates call to related builtins into f128 version on PowerPC. And in theory, this should be applied to other targets when their backend supports IEEE 128-bit style libcalls.
GCC already has these mutations except nansl, which is not available on PowerPC along with other variants (nans, nansf).
Reviewed By: RKSimon, nemanjai
Differential Revision: https://reviews.llvm.org/D92080
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 | clang/lib/CodeGen/CGBuiltin.cpp |
 | clang/test/CodeGen/math-builtins-long.c |
Commit
1185d3f43d2186fa9291fe7779abf48d9b962ef4
by grimar[llvm-readobj] - Fix the compilation with GCC < 7.0.
This addressed post commit comments for D93900.
GCC had an issue and requires placing a specialization of `printUnwindInfo` to a namespace to compile:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56480
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 | llvm/tools/llvm-readobj/ELFDumper.cpp |
Commit
89e84dec1879417fb7eb96edaa55dac7eca204ab
by Amara Emerson[AArch64][GlobalISel] Fix fallbacks introduced for G_SITOFP in 8f283cafddfa8d6d01a94b48cdc5d25817569e91
If we have an integer->fp convert that has differing sizes, e.g. s32 to s64, then don't try to convert it to AArch64::G_SITOF since it won't select.
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 | llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir |
 | llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp |
Commit
78036360573c35ea9e6a697d2eed92db893b4850
by ikudrin[libcxx testing] Fix UB in tests for std::lock_guard
If mutex::try_lock() is called in a thread that already owns the mutex, the behavior is undefined. The patch fixes the issue by creating another thread, where the call is allowed.
Differential Revision: https://reviews.llvm.org/D94656
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 | libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.guard/adopt_lock.pass.cpp |
 | libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.guard/mutex.pass.cpp |
Commit
104a9f99ccab9d6dbc07a70f569246c23feaf4c1
by AlokKumar.Sharma[Debuginfo][DW_OP_implicit_pointer] (1/7) Support for DW_OP_LLVM_implicit_pointer
New dwarf operator DW_OP_LLVM_implicit_pointer is introduced (present only in LLVM IR) This operator is required as it is different than DWARF operator DW_OP_implicit_pointer in representation and specification (number and types of operands) and later can not be used as multiple level.
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D84113
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 | llvm/lib/BinaryFormat/Dwarf.cpp |
 | llvm/lib/IR/DebugInfoMetadata.cpp |
 | llvm/include/llvm/BinaryFormat/Dwarf.h |
 | llvm/test/DebugInfo/X86/LLVM_implicit_pointer.ll |
 | llvm/docs/LangRef.rst |
Commit
bfb8f45ef3f46102d290f11039faa82456c920ae
by grimar[llvm-nm] - Move MachO specific logic out from the dumpSymbolNamesFromObject(). NFC.
`dumpSymbolNamesFromObject` is the method that dumps symbol names.
It has 563 lines, mostly because of huge piece of MachO specific code. In this patch I move it to separate helper method.
The new size of `dumpSymbolNamesFromObject` is 93 lines. With it it becomes much easier to maintain it.
I had to change the type of 2 name fields to `std::string`, because MachO logic uses temporarily buffer strings (e.g `ExportsNameBuffer`, `BindsNameBuffer` etc):
``` std::string ExportsNameBuffer; raw_string_ostream EOS(ExportsNameBuffer); ```
these buffers were moved to `dumpSymbolsFromDLInfoMachO` by this patch and invalidated after return. Technically, before this patch we had a situation when local pointers (symbol names) were assigned to members of global static `SymbolList`, what is dirty by itself.
Differential revision: https://reviews.llvm.org/D94667
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 | llvm/tools/llvm-nm/llvm-nm.cpp |
|