SuccessChanges

Summary

  1. [RISCV] Support insertion of misaligned subvectors (details)
  2. Revert "[WebAssembly] call_indirect issues table number relocs" (details)
  3. [ARM] Add pre/post inc tests of various sizes. NFC (details)
  4. [lldb][NFC] Clean up ValueObject comments (details)
  5. [Support] Add reserve() method to the raw_ostream. (details)
  6. [lldb][NFC] Remove unused ValueObject::LogValueObject functions (details)
  7. [mlir] NFC - Use declarative assembly for scf::YieldOp (details)
  8. Fix Wdocumentation parameter warning. NFCI. (details)
  9. [mlir][Linalg] Retire hoistViewAllocOps. (details)
  10. [OpenCL][Docs] Change description for the OpenCL standard headers. (details)
  11. [RISCV] vle1.v/vse1.v should be unmasked instructions. (details)
  12. [DSE] Allow ptrs defined in the entry block in IsGuaranteedLoopInvariant. (details)
  13. [clang-tidy] Install run-clang-tidy.py in bin/ as run-clang-tidy (details)
  14. [clang][parse][NFC] Remove dead ProhibitAttributes() call (details)
  15. [clang-tidy] Update checks list. (details)
  16. [CostModel] Remove VF from IntrinsicCostAttributes (details)
  17. [TTI] Change getOperandsScalarizationOverhead to take Type args (details)
  18. [ARM] do not consider sp as deprecated for ldm/stm (details)
  19. [AMDGPU] Use divergent addresses for vector loads (details)
  20. [X86] Cleanup overflow test check prefixes. NFCI. (details)
  21. [lldb] [test] Un-XFAIL a test that no longer fail on FreeBSD (details)
  22. [lldb] [test] Un-XFAIL TestBuiltinTrap on FreeBSD/aarch64 (details)
  23. [clang-tidy] Extending bugprone-signal-handler with POSIX functions. (details)
  24. [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion (details)
  25. [clang-tidy] Remove IncludeInserter from MoveConstructorInit check. (details)
  26. [libcxx] [test] Define _CRT_STDIO_ISO_WIDE_SPECIFIERS while building tests (details)
  27. [Driver][NFC] Add explicit break to final case (details)
Commit dd68f3cf2899c554cab7baf3ccdcd3f987d77736 by fraser
[RISCV] Support insertion of misaligned subvectors

This patch extends the support for RVV INSERT_SUBVECTOR to cover those
which don't align to a vector register boundary. Like the support for
EXTRACT_SUBVECTOR in D96959, it accomplishes this by extracting the
nearest register-sized subvector (a subregister operation), then sliding
the vector down with VSLIDEDOWN, inserting the subvector to the first
position, and sliding the vector back up again afterwards.

Unlike subvector extraction, for vectors that occupy less than a full
vector register we must preserve the untouched elements. We do this by
lowering to an LMUL=1 INSERT_SUBVECTOR using the above method and
lowering that to a VSLIDEUP with a zero offset. This uses a
tail-undisturbed policy and so has the effect of "sliding in" the
subvector elements while preserving the surrounding ones.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D96972
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Commit 7dc98adbb0e274934410b78f0a3c45762326325c by wingo
Revert "[WebAssembly] call_indirect issues table number relocs"

This reverts commit 861dbe1a021e6439af837b72b219fb9c449a57ae.  It broke
emscripten -- see https://reviews.llvm.org/D90948#2578843.
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
The file was modifiedllvm/test/MC/WebAssembly/reloc-pic.s
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
The file was removedllvm/test/MC/WebAssembly/call-indirect-relocs.s
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedllvm/include/llvm/MC/MCSymbolWasm.h
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
The file was modifiedllvm/test/MC/WebAssembly/basic-assembly.s
The file was modifiedllvm/test/MC/WebAssembly/type-index.s
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/multivalue.ll
The file was modifiedlld/test/wasm/compress-relocs.ll
The file was modifiedllvm/test/MC/WebAssembly/function-alias.ll
The file was modifiedllvm/test/MC/WebAssembly/tail-call-encodings.s
The file was modifiedllvm/test/CodeGen/WebAssembly/function-pointer64.ll
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyUtilities.h
The file was modifiedllvm/test/MC/WebAssembly/reloc-code.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
The file was modifiedllvm/test/MC/WebAssembly/weak-alias.s
Commit ebb6583e02c46293987567b4e9835d10c9841a4d by david.green
[ARM] Add pre/post inc tests of various sizes. NFC
The file was addedllvm/test/CodeGen/ARM/store-postinc.ll
The file was addedllvm/test/CodeGen/ARM/store-preinc.ll
Commit bda83ba0d296303dff02d262cab73dc984cda3c1 by Raphael Isemann
[lldb][NFC] Clean up ValueObject comments

* Remove commented out code.
* Doxygenify comments that serve as documentation.
* Use the LLVM comment style where possible.
The file was modifiedlldb/include/lldb/Core/ValueObjectConstResult.h
The file was modifiedlldb/include/lldb/Core/ValueObjectDynamicValue.h
The file was modifiedlldb/include/lldb/Core/ValueObjectCast.h
The file was modifiedlldb/include/lldb/Core/ValueObjectChild.h
The file was modifiedlldb/include/lldb/Core/ValueObjectConstResultImpl.h
The file was modifiedlldb/include/lldb/Core/ValueObject.h
The file was modifiedlldb/include/lldb/Core/ValueObjectSyntheticFilter.h
The file was modifiedlldb/include/lldb/Core/ValueObjectList.h
The file was modifiedlldb/include/lldb/Core/ValueObjectMemory.h
The file was modifiedlldb/include/lldb/Core/ValueObjectVariable.h
Commit 875b3b2cdda105c01af9a1330b1cb6a3f1e1b822 by a.v.lapshin
[Support] Add reserve() method to the raw_ostream.

If resulting size of the output stream is already known,
then the space for stream data could be preliminary
allocated in some cases. f.e. raw_string_ostream could
preallocate the space for the target string(it allows
to avoid reallocations during writing into the stream).

Differential Revision: https://reviews.llvm.org/D91693
The file was modifiedllvm/unittests/Support/raw_ostream_test.cpp
The file was modifiedllvm/include/llvm/Support/raw_ostream.h
Commit bea2d5e47867687c8d2f95bd70ed9a77d19eeb6e by Raphael Isemann
[lldb][NFC] Remove unused ValueObject::LogValueObject functions

Those functions aren't called anywhere. For debugging purposes we usually
have Dump() methods (which already exist in some semi-functional form in
ValueObject).
The file was modifiedlldb/source/Core/ValueObject.cpp
The file was modifiedlldb/include/lldb/Core/ValueObject.h
Commit 551ba727603cd6561af740fc3bc8ecfc5a126796 by nicolas.vasilache
[mlir] NFC - Use declarative assembly for scf::YieldOp
The file was modifiedmlir/lib/Dialect/SCF/SCF.cpp
The file was modifiedmlir/include/mlir/Dialect/SCF/SCFOps.td
Commit 67a326098c7c32f3d6eeea7357d83eac4ff996be by llvm-dev
Fix Wdocumentation parameter warning. NFCI.
The file was modifiedclang/include/clang/AST/OpenMPClause.h
Commit 8cf14b8deca1a52d4788b34e854877e37d4f96e1 by nicolas.vasilache
[mlir][Linalg] Retire hoistViewAllocOps.

This transformation was only used for quick experimentation and is not general enough.
Retire it.

Differential Revision: https://reviews.llvm.org/D97266
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
The file was modifiedmlir/test/lib/Transforms/TestConvVectorization.cpp
The file was modifiedmlir/test/lib/Transforms/TestLinalgHoisting.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CodegenStrategy.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h
The file was modifiedmlir/test/Dialect/Linalg/hoisting.mlir
Commit 90355d6f10765d03af1bfcc1ab3d17e8cae330f1 by anastasia.stulova
[OpenCL][Docs] Change description for the OpenCL standard headers.

After updating the user interface in D96515, update the docs
reflecting the new approach.

Tags: #clang

Differential Revision: https://reviews.llvm.org/D96616
The file was modifiedclang/docs/OpenCLSupport.rst
The file was modifiedclang/docs/UsersManual.rst
Commit 53c4c2b9f7328a8b80ecfd1fc60387d0f910cc2f by kai.wang
[RISCV] vle1.v/vse1.v should be unmasked instructions.

vle1.v/vse1.v should be unmasked instructions. The vm encoding is 1 for
unmasked instructions.

Differential Revision: https://reviews.llvm.org/D97237
The file was modifiedllvm/test/MC/RISCV/rvv/store.s
The file was modifiedllvm/test/MC/RISCV/rvv/load.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoV.td
Commit 633e090528dbc9b6dd380771046af8463bbb5fe1 by flo
[DSE] Allow ptrs defined in the entry block in IsGuaranteedLoopInvariant.

The **IsGuaranteedLoopInvariant** function is making sure to check if the
incoming pointer is guaranteed to be loop invariant, therefore I think
the case where the pointer is defined in the entry block of a function
automatically guarantees the pointer to be loop invariant, as the entry
block of a function cannot have predecessors or be part of a loop.

I implemented this small patch and tested it using
**ninja check-llvm-unit** and **ninja check-llvm**. I added a contained test
file that shows the problem and used **opt -O3 -debug** on it to make sure
the case is not currently handled (in fact the debug log is showing that
the DSE pass is bailing out when testing if the killer store is able to
clobber the dead store).

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D96979
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was addedllvm/test/Transforms/DeadStoreElimination/MSSA/loop-invariant-entry-block.ll
Commit 6c78711f106fe01cd8c8c85a5c42953035453135 by n.james93
[clang-tidy] Install run-clang-tidy.py in bin/ as run-clang-tidy

The run-clang-tidy.py helper script is supposed to be used by the
user, hence it should be placed in the user's PATH. Some
distributions, like Gentoo [1], won't have it in PATH unless it is
installed in bin/.

Furthermore, installed scripts in PATH usually do not carry a filename
extension, since there is no need to know that this is a Python
script. For example Debian and Ubuntu already install this script as
'run-clang-tidy' [2] and hence build systems like Meson also look for
this name first [3]. Hence we install run-clang-tidy.py as
run-clang-tidy, as suggested by Sylvestre Ledru [4].

1: https://bugs.gentoo.org/753380
2: https://salsa.debian.org/pkg-llvm-team/llvm-toolchain/-/blob/60aefb14171ab5c3867a0081844b507fc9f6e015/debian/clang-tidy-X.Y.links.in#L2
3: https://github.com/mesonbuild/meson/blob/b6dc4d5e5c6e838de0b52e62d982ba2547eb366d/mesonbuild/scripts/clangtidy.py#L44
4: https://reviews.llvm.org/D90972#2380640

Reviewed By: sylvestre.ledru, JonasToth

Differential Revision: https://reviews.llvm.org/D90972
The file was modifiedclang-tools-extra/clang-tidy/tool/CMakeLists.txt
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
Commit 64d06ed9c9e0389cd27545d2f6e20455a91d89b1 by tbaeder
[clang][parse][NFC] Remove dead ProhibitAttributes() call

GNU-style attribute in enum bodies are allowed (and used by several
tests), and this call to ProhibitAttributes() was dead code.

Differential Revision: https://reviews.llvm.org/D97271
The file was modifiedclang/lib/Parse/ParseDecl.cpp
Commit 5bf710b2a50055f8fb3c159f5805e74e041bceb1 by n.james93
[clang-tidy] Update checks list.
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
Commit bd4b61efbdb487124c8bcc3027d628c8c3547c4f by david.green
[CostModel] Remove VF from IntrinsicCostAttributes

getIntrinsicInstrCost takes a IntrinsicCostAttributes holding various
parameters of the intrinsic being costed. It can either be called with a
scalar intrinsic (RetTy==Scalar, VF==1), with a vector instruction
(RetTy==Vector, VF==1) or from the vectorizer with a scalar type and
vector width (RetTy==Scalar, VF>1). A RetTy==Vector, VF>1 is considered
an error. Both of the vector modes are expected to be treated the same,
but because this is confusing many backends end up getting it wrong.

Instead of trying work with those two values separately this removes the
VF parameter, widening the RetTy/ArgTys by VF used called from the
vectorizer. This keeps things simpler, but does require some other
modifications to keep things consistent.

Most backends look like this will be an improvement (or were not using
getIntrinsicInstrCost). AMDGPU needed the most changes to keep the code
from c230965ccf36af5c88c working. ARM removed the fix in
dfac521da1b90db683, webassembly happens to get a fixup for an SLP cost
issue and both X86 and AArch64 seem to now be using better costs from
the vectorizer.

Differential Revision: https://reviews.llvm.org/D95291
The file was modifiedllvm/test/Transforms/SLPVectorizer/WebAssembly/no-vectorize-rotate.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
Commit dd2dbf7ee2e5cdf4b794b09f8bb92e2a75e9b802 by david.green
[TTI] Change getOperandsScalarizationOverhead to take Type args

As a followup to D95291, getOperandsScalarizationOverhead was still
using a VF as a vector factor if the arguments were scalar, and would
assert on certain matrix intrinsics with differently sized vector
arguments. This patch removes the VF arg, instead passing the Types
through directly. This should allow it to more accurately compute the
cost without having to guess at which operands will be vectorized,
something difficult with more complex intrinsics.

This adjusts one SVE test as it is now calling the wrong intrinsic vs
veccall. Without invalid InstructCosts the cost of the scalarized
intrinsic is too low. This should get fixed when the cost of
scalarization is accounted for with scalable types.

Differential Revision: https://reviews.llvm.org/D96287
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was addedllvm/test/Analysis/CostModel/PowerPC/matrix.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit e1c3bf6afe09851537ff376ab20714dfd5f9649d by sjoerd.meijer
[ARM] do not consider sp as deprecated for ldm/stm

Early versions of the ARMv7 reference manuals considered the sp register
as a deprecated register for ldm/stm familiy of instructions. However,
later versions such as ARM DDI 0406C.d added a note to the Appendix:

D9.3 Use of the SP as a general-purpose register
Most ARM instructions, unlike Thumb instructions, provide exactly the
same access to the SP as to R0-R12. This means that it is possible to
use the SP as a general-purpose register.  Earlier issues of this manual
deprecated the use of SP in an ARM instruction, in any way that is
deprecated, not permitted, or not possible in the corresponding
Thumb instruction. However, user feedback indicates a number of cases
where these instructions are useful. Therefore, ARM no longer deprecates
these instruction uses.
Also Armv8 manuals no longer consider SP as deprecated register for ldm/
stm A32 instructions.

Furthermore, GNU as also does not print a deprecated warning when using
SP with those instructions.

Drop deprecation warning for pop/ldm/push/stm instructions.

Patch by: Stefan Agner.

Differential Revision: https://reviews.llvm.org/D82692
The file was modifiedllvm/test/CodeGen/ARM/deprecated-asm.s
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
The file was modifiedllvm/test/MC/ARM/arm-load-store-multiple-deprecated.s
Commit fdaa2d02591b10c96ca8705041dfc75fcbf97095 by jay.foad
[AMDGPU] Use divergent addresses for vector loads

Change some test cases to use divergent addresses for vector loads,
which should be the common case in real world code. Using uniform
addresses causes poor instruction selection for the surrounding
code which has to be fixed up post-register-allocation, and this causes
a lot of testsuite churn for a forthcoming patch to stop selecting
24-bit vector multiply instructions for uniform multiplies.

This shows up some problems in the idot tests where we fail to select
v_dot instructions because the patterns only match MUL_[UI]24 ISD nodes,
but the DAG contains i16 mul nodes instead.

Differential Revision: https://reviews.llvm.org/D97062
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8s.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8u.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot4u.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot4s.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot2.ll
Commit 2315410f578c2c62c224a1665fe4597bef1b4029 by llvm-dev
[X86] Cleanup overflow test check prefixes. NFCI.

Tidy up the check prefixes to improve reuse.
The file was modifiedllvm/test/CodeGen/X86/vec_uaddo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_saddo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_usubo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_umulo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_smulo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_ssubo.ll
Commit 2f75363a9e138429d5c80ca0a541247a5bc70614 by mgorny
[lldb] [test] Un-XFAIL a test that no longer fail on FreeBSD
The file was modifiedlldb/test/API/lang/c/conflicting-symbol/TestConflictingSymbol.py
Commit 6c06b0aa5a5534a370532c287cf35a96eeb2146e by mgorny
[lldb] [test] Un-XFAIL TestBuiltinTrap on FreeBSD/aarch64
The file was modifiedlldb/test/API/linux/builtin_trap/TestBuiltinTrap.py
Commit 2c54b293373ce22cd912ea50fece504b26f2bdc4 by 1.int32
[clang-tidy] Extending bugprone-signal-handler with POSIX functions.

An option is added to the check to select wich set of functions is
defined as asynchronous-safe functions.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D90851
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/signal.h
The file was addedclang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/string.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/SignalHandlerCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/SignalHandlerCheck.h
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-signal-handler-minimal.c
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-signal-handler-posix.c
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was addedclang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/unistd.h
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/bugprone-signal-handler.c
The file was addedclang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/system-other.h
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/stdlib.h
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/bugprone-signal-handler.rst
Commit 1b1b30cf0f7d9619afb32e16f4a7c007da4ffccf by joe.ellis
[clang][SVE] Don't warn on vector to sizeless builtin implicit conversion

This commit prevents warnings from -Wconversion when a clang vector type
is implicitly converted to a sizeless builtin type -- for example, when
implicitly converting a fixed-predicate to a scalable predicate.

The code below:

     1    #include <arm_sve.h>
     2
     3    #define N __ARM_FEATURE_SVE_BITS
     4    #define FIXED_ATTR __attribute__((arm_sve_vector_bits (N)))
     5    typedef svbool_t fixed_svbool_t FIXED_ATTR;
     6
     7    inline fixed_svbool_t foo(fixed_svbool_t p) {
     8      return svnot_z(svptrue_b64(), p);
     9    }

would previously raise this warning:

    warning: implicit conversion turns vector to scalar: \
    'fixed_svbool_t' (vector of 8 'unsigned char' values) to 'svbool_t' \
    (aka '__SVBool_t') [-Wconversion]

Note that many cases of these implicit conversions were already
permitted because many functions inside arm_sve.h are spawned via
preprocessor macros, and the call to isInSystemMacro would cover us in
this case. This commit fixes the remaining cases.

Differential Revision: https://reviews.llvm.org/D97053
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/test/SemaCXX/attr-arm-sve-vector-bits.cpp
Commit e96f9cca3b1b346cf9764c4a3b7417a46ef59f12 by n.james93
[clang-tidy] Remove IncludeInserter from MoveConstructorInit check.

This check registers an IncludeInserter, however the check itself doesn't actually emit any fixes or includes, so the inserter is redundant.

From what I can tell the fixes were removed in D26453(rL290051) but the inserter was left in, probably an oversight.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D97243
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
The file was modifiedclang-tools-extra/clang-tidy/performance/MoveConstructorInitCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/performance/MoveConstructorInitCheck.h
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/performance-move-constructor-init.rst
Commit f97ea0d5b3f5e82a8d96ea57d68c12d22c2eab36 by martin
[libcxx] [test] Define _CRT_STDIO_ISO_WIDE_SPECIFIERS while building tests

This matches how libc++ itself is built. This avoids errors due to
mismatch if linking libc++ statically.

Differential Revision: https://reviews.llvm.org/D97169
The file was modifiedlibcxx/utils/libcxx/test/config.py
Commit 22215e49233861e52158fcb0b71449ac62e1b41b by jrtc27
[Driver][NFC] Add explicit break to final case
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp