Revision
310498
by guyblank:
[X86][AVX512] Choose correct registers in vpbroadcastb/w Fixes the vpbroadcastb/w instructions which use GPRs as source operands, to use the correct registers. The full GPR should be used, and not the subregister, as it happens before the patch. Fixes pr33795 Differential Revision: https://reviews.llvm.org/D36479 |
Change Type | Path in Repository | Path in Workspace |
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 | /llvm/trunk/lib/Target/X86/X86InstrAVX512.td | llvm.src/lib/Target/X86/X86InstrAVX512.td |
 | /llvm/trunk/test/CodeGen/X86/avx512bw-intrinsics.ll | llvm.src/test/CodeGen/X86/avx512bw-intrinsics.ll |
 | /llvm/trunk/test/CodeGen/X86/avx512bwvl-intrinsics.ll | llvm.src/test/CodeGen/X86/avx512bwvl-intrinsics.ll |
 | /llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v16.ll | llvm.src/test/CodeGen/X86/vector-shuffle-128-v16.ll |
 | /llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v8.ll | llvm.src/test/CodeGen/X86/vector-shuffle-128-v8.ll |
 | /llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v16.ll | llvm.src/test/CodeGen/X86/vector-shuffle-256-v16.ll |
 | /llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v32.ll | llvm.src/test/CodeGen/X86/vector-shuffle-256-v32.ll |
 | /llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v32.ll | llvm.src/test/CodeGen/X86/vector-shuffle-512-v32.ll |
 | /llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v64.ll | llvm.src/test/CodeGen/X86/vector-shuffle-512-v64.ll |
Revision
310497
by dpreobra:
[AMDGPU][MC][GFX9] Added 16-bit renamed and "_legacy" VALU opcodes See Bug 33629: https://bugs.llvm.org//show_bug.cgi?id=33629 Reviewers: vpykhtin, SamWot, arsenm Differential Revision: https://reviews.llvm.org/D36322 |
Change Type | Path in Repository | Path in Workspace |
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 | /llvm/trunk/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | llvm.src/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp |
 | /llvm/trunk/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | llvm.src/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp |
 | /llvm/trunk/lib/Target/AMDGPU/SIDefines.h | llvm.src/lib/Target/AMDGPU/SIDefines.h |
 | /llvm/trunk/lib/Target/AMDGPU/SIInstrFormats.td | llvm.src/lib/Target/AMDGPU/SIInstrFormats.td |
 | /llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td | llvm.src/lib/Target/AMDGPU/SIInstrInfo.td |
 | /llvm/trunk/lib/Target/AMDGPU/VOP3Instructions.td | llvm.src/lib/Target/AMDGPU/VOP3Instructions.td |
 | /llvm/trunk/test/MC/AMDGPU/vop3-gfx9.s | llvm.src/test/MC/AMDGPU/vop3-gfx9.s |
 | /llvm/trunk/test/MC/AMDGPU/vop3.s | llvm.src/test/MC/AMDGPU/vop3.s |
 | /llvm/trunk/test/MC/Disassembler/AMDGPU/vop3_gfx9.txt | llvm.src/test/MC/Disassembler/AMDGPU/vop3_gfx9.txt |
 | /llvm/trunk/test/MC/Disassembler/AMDGPU/vop3_vi.txt | llvm.src/test/MC/Disassembler/AMDGPU/vop3_vi.txt |
Revision
310496
by hokein:
[clang-tidy] Fix another crash in make-unique check. Summary: The crash happens when calling `reset` method without any preceding operation like "->" or ".", this could happen in a subclass of the "std::unique_ptr". Reviewers: alexfh Reviewed By: alexfh Subscribers: JDevlieghere, xazax.hun, cfe-commits Differential Revision: https://reviews.llvm.org/D36452 |
Change Type | Path in Repository | Path in Workspace |
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 | /clang-tools-extra/trunk/clang-tidy/modernize/MakeSmartPtrCheck.cpp | clang-tools-extra.src/clang-tidy/modernize/MakeSmartPtrCheck.cpp |
 | /clang-tools-extra/trunk/test/clang-tidy/modernize-make-unique.cpp | clang-tools-extra.src/test/clang-tidy/modernize-make-unique.cpp |
Revision
310495
by nlopes:
CFLAA: return MustAlias when pointers p, q are equal, i.e., must-alias(p, sz_p, p, sz_q) irrespective of access sizes sz_p, sz_q As discussed a couple of weeks ago on the ML. This makes the behavior consistent with that of BasicAA. AA clients already check the obj size themselves and may not require the obj size to match exactly the access size (e.g., in case of store forwarding) |
Change Type | Path in Repository | Path in Workspace |
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 | /llvm/trunk/include/llvm/Analysis/CFLSteensAliasAnalysis.h | llvm.src/include/llvm/Analysis/CFLSteensAliasAnalysis.h |
 | /llvm/trunk/lib/Analysis/CFLAndersAliasAnalysis.cpp | llvm.src/lib/Analysis/CFLAndersAliasAnalysis.cpp |
Revision
310493
by davide:
[ValueTracking] Turn a test into an assertion. As discussed with Chad, this should never happen, but this assertion is basically free, so, keep it around just in case. |
Change Type | Path in Repository | Path in Workspace |
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 | /llvm/trunk/lib/Analysis/ValueTracking.cpp | llvm.src/lib/Analysis/ValueTracking.cpp |
Revision
310492
by davide:
[ValueTracking] Update tests to unbreak the bots. |
Change Type | Path in Repository | Path in Workspace |
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 | /llvm/trunk/test/Transforms/SimplifyCFG/pr34131.ll | llvm.src/test/Transforms/SimplifyCFG/pr34131.ll |
Revision
310491
by alexfh:
[clang-tidy] Ignore newlines in checks list This is a follow up to https://reviews.llvm.org/D30567 where I overlooked that LLVM YAML parser doesn't support multiline literal folding. |
Change Type | Path in Repository | Path in Workspace |
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 | /clang-tools-extra/trunk/clang-tidy/ClangTidyDiagnosticConsumer.cpp | clang-tools-extra.src/clang-tidy/ClangTidyDiagnosticConsumer.cpp |
 | /clang-tools-extra/trunk/unittests/clang-tidy/ClangTidyDiagnosticConsumerTest.cpp | clang-tools-extra.src/unittests/clang-tidy/ClangTidyDiagnosticConsumerTest.cpp |
Revision
310490
by spatel:
[x86] add more tests for select-of-constants; NFC This is to help recommit a fixed version of r310208. As shown in PR34097, we could miscompile if subtraction of the constants overflowed. |
Change Type | Path in Repository | Path in Workspace |
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 | /llvm/trunk/test/CodeGen/X86/select_const.ll | llvm.src/test/CodeGen/X86/select_const.ll |
Revision
310489
by gbercea:
[OpenMP] Add flag for overwriting default PTX version for OpenMP targets Summary: This flag "--fopenmp-ptx=" enables the overwriting of the default PTX version used for GPU offloaded OpenMP target regions: "+ptx42". Reviewers: arpith-jacob, caomhin, carlo.bertolli, ABataev, Hahnfeld, jlebar, hfinkel, tstellar Reviewed By: ABataev Subscribers: rengolin, cfe-commits Differential Revision: https://reviews.llvm.org/D29660 |
Change Type | Path in Repository | Path in Workspace |
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 | /cfe/trunk/include/clang/Driver/Options.td | clang.src/include/clang/Driver/Options.td |
 | /cfe/trunk/lib/Driver/ToolChains/Cuda.cpp | clang.src/lib/Driver/ToolChains/Cuda.cpp |
 | /cfe/trunk/test/Driver/openmp-offload.c | clang.src/test/Driver/openmp-offload.c |
Revision
310487
by marshall:
Change the way the literal operators are defined - now w/o a seperating space. This should be a NFC, but it will change how the compiler parses it. |
Change Type | Path in Repository | Path in Workspace |
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 | /libcxx/trunk/include/chrono | libcxx.src/include/chrono |
Revision
310486
by fhahn:
[ARM] Emit error when ARM exec mode is not available. Summary: A similar error message has been removed from the ARMTargetMachineBase constructor in r306939. With this patch, we generate an error message for the example below, compiled with -mcpu=cortex-m0, which does not have ARM execution mode. __attribute__((target("arm"))) int foo(int a, int b) { return a + b % a; } __attribute__((target("thumb"))) int bar(int a, int b) { return a + b % a; } By adding this error message to ARMBaseTargetMachine::getSubtargetImpl, we can deal with functions that set -thumb-mode in target-features. At the moment it seems like Clang does not have access to target-feature specific information, so adding the error message to the frontend will be harder. Reviewers: echristo, richard.barton.arm, t.p.northover, rengolin, efriedma Reviewed By: echristo, efriedma Subscribers: efriedma, aemerson, javed.absar, kristof.beyls Differential Revision: https://reviews.llvm.org/D35627 |
Change Type | Path in Repository | Path in Workspace |
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 | /llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp | llvm.src/lib/Target/ARM/ARMSubtarget.cpp |
 | /llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp | llvm.src/lib/Target/ARM/ARMTargetMachine.cpp |
 | /llvm/trunk/test/CodeGen/ARM/no-arm-mode.ll | llvm.src/test/CodeGen/ARM/no-arm-mode.ll |
Revision
310485
by coby:
[X86][Asm]Allow far jmp/call to be picked when using explicit FWORD size specifier Currently, far jmp/call which utilizes a 48bit memory operand would have been invoked via the 'lcall/ljmp' mnemonic (intel style). This patch align those variants to formal intel spec Differential Revision: https://reviews.llvm.org/D35846 |
Change Type | Path in Repository | Path in Workspace |
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 | /llvm/trunk/lib/Target/X86/X86InstrControl.td | llvm.src/lib/Target/X86/X86InstrControl.td |
 | /llvm/trunk/test/MC/X86/intel-syntax.s | llvm.src/test/MC/X86/intel-syntax.s |
 | /llvm/trunk/test/MC/X86/x86-64.s | llvm.src/test/MC/X86/x86-64.s |
Revision
310484
by gbercea:
[OpenMP] Add flag for disabling the default generation of relocatable OpenMP target code for NVIDIA GPUs. Summary: Previously we have added the "-c" flag which gets passed to PTXAS by default to generate relocatable OpenMP target code by default. This set of flags exposes control over this behaviour. Reviewers: arpith-jacob, caomhin, carlo.bertolli, ABataev, Hahnfeld, jlebar, hfinkel, tstellar Reviewed By: ABataev Subscribers: Hahnfeld, rengolin, cfe-commits Differential Revision: https://reviews.llvm.org/D29659 |
Change Type | Path in Repository | Path in Workspace |
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 | /cfe/trunk/include/clang/Driver/Options.td | clang.src/include/clang/Driver/Options.td |
 | /cfe/trunk/lib/Driver/ToolChains/Cuda.cpp | clang.src/lib/Driver/ToolChains/Cuda.cpp |
 | /cfe/trunk/test/Driver/openmp-offload.c | clang.src/test/Driver/openmp-offload.c |
Revision
310483
by erichkeane:
Fix broken getAttributeSpellingListIndex for pragma attributes We noticed when implementing a new pragma that the TableGen-generated function getAttributeSpellingListIndex() did not work for pragma attributes. It relies on the values in the enum AttributeList::Syntax and a new value AS_ContextSensitiveKeyword was added changing the value for AS_Pragma. Apparently no tests failed since no pragmas currently make use of the generated function. To fix this we can move AS_Pragma back to the value that TableGen code expects. Also to prevent changes in the enum from breaking that routine again I added calls to getAttributeSpellingListIndex() in the unroll pragma code. That will cause some lit test failures if the order is changed. I added a comment to remind of this issue in the future. This assumes we don’t need/want full TableGen support for AS_ContextSensitiveKeyword. It currently only appears in getAttrKind and no other TableGen-generated routines. Patch by: mikerice Differential Revision: https://reviews.llvm.org/D36473 |
Change Type | Path in Repository | Path in Workspace |
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 | /cfe/trunk/include/clang/Sema/AttributeList.h | clang.src/include/clang/Sema/AttributeList.h |
 | /cfe/trunk/lib/Sema/SemaStmtAttr.cpp | clang.src/lib/Sema/SemaStmtAttr.cpp |