Changes

Summary

  1. amdgpu experimental bbot: add -DCMAKE_LIBOMPTARGET_FOUND_AMDGPU_GPU=ON (details)
Commit 1e5b8c438e4846547f4ceac7dc48797294e6912c by ron.lieberman
amdgpu experimental bbot: add -DCMAKE_LIBOMPTARGET_FOUND_AMDGPU_GPU=ON
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)

Summary

  1. [AArch64] Replace AEK_CRYPTO with relevant features in cpu definitions (details)
  2. [mem2reg][debuginfo] Handle op_deref when converting dbg.declare (details)
  3. [libc] Use a more general way to determine the compiler's target triple. (details)
  4. [libc] Add an off-by-default option to silence "skipping" messages from CMake. (details)
  5. [libc++] Add [[clang::lifetimebound]] to min/max algorithms (details)
  6. Revert "[AIX][BigArchive] Treat the archive is empty if the first child member offset is zero" (details)
  7. [RISCV] Replace multiple ifs with a switch. NFC (details)
  8. [SCCP] Flip range arguments for NSW region check. (details)
  9. [CGSCC] Add pass which counts the max number of times we visit a function (details)
  10. [LTO] Demangle the function name in DiagnosticInfoDontCall message (details)
  11. [OpenMP][NVPTX] Guard the target name macro definition (details)
  12. clang/OpenCL: Don't use a Function for the block type (details)
  13. clang/OpenCL: Fix not setting convergent on block invoke kernels (details)
  14. clang/OpenCL: Extend tests for enqueued block attributes (details)
  15. clang/OpenCL: Apply default attributes to enqueued blocks (details)
  16. Revert "[LTO] Demangle the function name in DiagnosticInfoDontCall message" (details)
  17. Reland [LTO] Demangle the function name in DiagnosticInfoDontCall message (details)
  18. [MC] Allow .pushsection between .cfi_startproc/.cfi_endproc (details)
  19. [SCCP] Add sub tests for NUW/NSW flag inference. (details)
  20. AMDGPU: Fix null dereference in getInstructionUniformity (details)
  21. AMDGPU: Partially fix machine uniformity for inline asm (details)
  22. AMDGPU/GlobalISel: Partially fix getGenericInstructionUniformity (details)
  23. Fix handling of braced-init temporaries for modernize-use-emplace (details)
  24. Improve example documentation for __builtin_offsetof; NFC (details)
  25. Revert "[LSAN][HWASAN] Run LSAN tests with HWASAN enabled" (details)
  26. [test] Require asserts in count-visits.ll (details)
  27. Recommit "[SCCP] Support NUW/NSW inference for all overflowing binary operators." (details)
  28. AMDGPU/GlobalISel: Add stub custom regbankselect pass (details)
  29. AMDGPU: Update machine divergence analysis test (details)
  30. [RISCV] Use custom operand parsing for FenceArg. (details)
  31. [mlir][AsmPrinter] Gracefully handle empty symbol (details)
  32. [mlir][Pass] Handle spaces in pipeline strings (details)
  33. [InstCombine] add tests for icmp-of-and-of-select-of-constants; NFC (details)
  34. [InstCombine] reduce icmp_eq0-of-and-of-select-of-constants (details)
  35. [libc++] Add missing include promote.h in <cmath> (details)
  36. [Pseudo Probe] Do not instrument EH blocks. (details)
  37. [Clang] Fix unconditional access to Attr pointer when checking if _Nullable is applicable to a type (details)
  38. [libc++] Remove <experimental/coroutine> (details)
  39. [llvm-cov] Add split-file to compiler-rt test requirements. (details)
  40. [NFC] [llvm-cov] Remove unnecessary logic from llvm-cov debuginfod. (details)
  41. [lldb] Use lldbassert in BuildObjCObjectPointerType (details)
  42. [AIX][CMake] Use top-level tools in llvm_ExternalProject_Add (details)
  43. [bazel] Port 155e0cf5dc2f (details)
  44. [lldb/swig] Remove deprecated flags for generating bindings (details)
  45. [LSAN][HWASAN] Run LSAN tests with HWASAN enabled (details)
  46. [flang] Fixed Flang LIT testing after D142548. (details)
  47. [PowerPC] Fix incorrect shift amount for build_vector (details)
  48. [lldb/test] Skip TestStackCoreScriptedProcess if Asan is enabled (details)
  49. [hwasan] Support __lsan_default_options (details)
Commit 8f6c623e874624c1f247f93bf457d5196a84cec6 by david.green
[AArch64] Replace AEK_CRYPTO with relevant features in cpu definitions

This replaces AEK_CRYPTO in the AArch64TargetParser definitions,
replacing the composite Crypto features with the constituent parts.
AEK_CRYPTO is replaced with either AEK_AES | AEK_SHA2 or AEK_AES |
AEK_SHA2 | AEK_SHA3 | AEK_SHA4 depending on if the cpu is Arm-v8.4+.
This helps get the features correct in some more places like
target(cpu=..) attributes.

Otherwise this is hopefully an NFC for -mcpu options but seems like a
cleaner design.

Differential Revision: https://reviews.llvm.org/D142548
The file was modifiedclang/test/CodeGen/aarch64-targetattr.c (diff)
The file was modifiedllvm/include/llvm/TargetParser/AArch64TargetParser.h (diff)
The file was modifiedllvm/unittests/TargetParser/TargetParserTest.cpp (diff)
The file was modifiedclang/test/Preprocessor/aarch64-target-features.c (diff)
The file was modifiedclang/lib/Driver/ToolChains/Arch/AArch64.cpp (diff)
Commit 055f2f04e658c7dddd1fc261e5e0c0bd136cc2b5 by Felipe de Azevedo Piovezan
[mem2reg][debuginfo] Handle op_deref when converting dbg.declare

The conversion of dbg.declare into dbg.values doesn't take into account
the DIExpression attached to the intrinsic. In particular, when
converting:

```
store %val, ptr %alloca
dbg.declare(ptr %alloca, !SomeVar, !DIExpression())
```

Mem2Reg will try to figure out if `%val` has the size of `!SomeVar`. If
it does, then a non-undef dbg.value is inserted:

```
dbg.value(%val, !SomeVar, !DIExpression())
```

This makes sense: the alloca is _the_ address of the variable. So a
store to the alloca is a store to the variable. However, if the
expression in the original intrinsic is a `DW_OP_deref`, this logic is
not applicable:

```
store ptr %val, ptr %alloca
dbg.declare(ptr %alloca, !SomeVar, !DIExpression(DW_OP_deref))
```

Here, the alloca is *not* the address of the variable. A store to the
alloca is *not* a store to the variable. As such, querying whether
`%val` has the same size as `!SomeVar` is meaningless.

This patch addresses the issue by:
1. Allowing the conversion when the expression is _only_ a `DW_OP_deref`
without any other expressions (see code comment).
2. Checking that the expression does not start with a `DW_OP_deref`
before applying the logic that checks whether the value being stored and
the variable have the same length.

Differential Revision: https://reviews.llvm.org/D142160
The file was modifiedllvm/include/llvm/IR/DebugInfoMetadata.h (diff)
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp (diff)
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp (diff)
The file was addedllvm/test/Transforms/Mem2Reg/dbg_declare_to_value_conversions.ll
Commit 12b65a66fc20ddeed88df0c5d74a7ab3e9a0a382 by sivachandra
[libc] Use a more general way to determine the compiler's target triple.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D142788
The file was modifiedlibc/cmake/modules/LLVMLibCArchitectures.cmake (diff)
Commit 23872aae129ce0282477c6838707569315f41585 by sivachandra
[libc] Add an off-by-default option to silence "skipping" messages from CMake.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D142802
The file was modifiedlibc/cmake/modules/LLVMLibCTestRules.cmake (diff)
The file was modifiedlibc/test/src/math/differential_testing/CMakeLists.txt (diff)
The file was modifiedlibc/cmake/modules/LLVMLibCObjectRules.cmake (diff)
The file was modifiedlibc/CMakeLists.txt (diff)
Commit 934650b24fbfea88c34f735b9cfd0d86e0f608d9 by nikolasklauser
[libc++] Add [[clang::lifetimebound]] to min/max algorithms

Reviewed By: Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D142608
The file was modifiedlibcxx/include/__algorithm/ranges_minmax.h (diff)
The file was modifiedlibcxx/include/__algorithm/min.h (diff)
The file was modifiedlibcxx/include/__algorithm/minmax.h (diff)
The file was modifiedlibcxx/include/__algorithm/ranges_min.h (diff)
The file was addedlibcxx/test/libcxx/algorithms/lifetimebound.verify.cpp
The file was modifiedlibcxx/include/__algorithm/max.h (diff)
The file was modifiedlibcxx/include/__algorithm/ranges_max.h (diff)
The file was modifiedlibcxx/include/module.modulemap.in (diff)
Commit 09a3aef0f8f4ef7789713b6edb185f4541858aac by 31459023+hctim
Revert "[AIX][BigArchive] Treat the archive is empty if the first child member offset is zero"

This reverts commit 7f0003c19c3a47f484ea9cc929728808b27ace32.

Reason: This broke the ASan buildbot, see the comments in
https://reviews.llvm.org/D138986 for more information.
The file was modifiedllvm/include/llvm/Object/Archive.h (diff)
The file was modifiedllvm/test/Object/archive-big-read-empty-with-freelist.test (diff)
The file was modifiedllvm/lib/Object/Archive.cpp (diff)
The file was removedllvm/test/Object/archive-big-malformed-first-member.test
Commit 025c92077d39c3da9db68d13cc1763a7ed22a522 by craig.topper
[RISCV] Replace multiple ifs with a switch. NFC

D108961 will add more instructions to this.
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp (diff)
Commit 4e607ec498786039f1edb8f5fb4834311402e07d by flo
[SCCP] Flip range arguments for NSW region check.

This brings the operand order in line with the NUW handling, which was
missed out in 72121a20cda4dc91d0ef5548f930.

At the moment this is NFC as we only additions, but it
should fix miscompiles with 024115ab14822a recommitted.
The file was modifiedllvm/lib/Transforms/Utils/SCCPSolver.cpp (diff)
Commit 4ce34bb2a9c8c2ae21c4d67f8af9046fe1ca434c by aeubanks
[CGSCC] Add pass which counts the max number of times we visit a function

This will help with finding potential pathological CGSCC cases.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D142853
The file was modifiedllvm/lib/Passes/PassBuilder.cpp (diff)
The file was addedllvm/test/Other/count-visits.ll
The file was addedllvm/lib/Transforms/Utils/CountVisits.cpp
The file was modifiedllvm/lib/Passes/PassBuilderPipelines.cpp (diff)
The file was addedllvm/include/llvm/Transforms/Utils/CountVisits.h
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn (diff)
The file was modifiedllvm/lib/Passes/PassRegistry.def (diff)
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt (diff)
Commit cb05c2ffc79eefe74c569263e27fcb5fad167ba3 by aeubanks
[LTO] Demangle the function name in DiagnosticInfoDontCall message

Previously, dontcall attribute message on LTO prints the mangled function name.

Fixes https://github.com/llvm/llvm-project/issues/58933

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D142844
The file was modifiedllvm/lib/IR/DiagnosticInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/attr-dontcall.ll (diff)
Commit 516ae48170df38d151a1ae5a83cd1f25011dcfa8 by i
[OpenMP][NVPTX] Guard the target name macro definition
The file was modifiedopenmp/libomptarget/plugins/cuda/src/rtl.cpp (diff)
Commit 52c28d7cf9018f3558268217f6cf91271eb4ac39 by arsenm2
clang/OpenCL: Don't use a Function for the block type

The AMDGPU value for this is not really a function. Currently we're
emitting IR that isn't true to what will eventually be emitted.
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
The file was modifiedclang/lib/CodeGen/CGOpenCLRuntime.cpp (diff)
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp (diff)
The file was modifiedclang/lib/CodeGen/TargetInfo.h (diff)
The file was modifiedclang/lib/CodeGen/CGOpenCLRuntime.h (diff)
Commit 00f6a7f02f9c8d542ce8ff1c9c037d9fdb421b88 by arsenm2
clang/OpenCL: Fix not setting convergent on block invoke kernels

Yet another example how convergent not being the default is dangerous
and backwards.
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl (diff)
The file was modifiedclang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl (diff)
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp (diff)
Commit d12ee4bf7c14a00b14890fc3042edd659dde7fb2 by arsenm2
clang/OpenCL: Extend tests for enqueued block attributes

Baseline tests showing that enqueued blocks are not getting the
correct attributes applied.
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl (diff)
Commit 647925648a0fde06b5b44086843f0d8f164a71df by arsenm2
clang/OpenCL: Apply default attributes to enqueued blocks

This was missing important environment context, like denormal-fp-math
and target-features. Curiously this seems to be losing nounwind. Note
this only fixes the actual invoke kernel. The invoke function is
already setting the default attribute set for internal
functions. However that is still buggy since it's not applying any use
function attributes (it's also missing uniform-work-group-size).

There seem to be too many different functions for setting attributes
with inconsistent behavior. The Function overload of
addDefaultFunctionAttributes seems to miss the target-cpu and
target-features. The AttrBuilder one seems to miss optnone (but that
seems to be disallowed on blocks anyway). Neither one calls
setTargetAttributes, when it probably should. uniform-work-group-size
is also set through AMDGPU code when it should be emitting generically
as a language property.

I also noticed update_cc_test_checks for attributes seem to not
connect the captured attribute variables to the attributes at the end
(although I think the numbers happen to work out correctly).
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl (diff)
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp (diff)
The file was modifiedclang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl (diff)
The file was addedclang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
Commit 76d7a6ad13be601bd93e7c5fa9988326b4e05b6e by aeubanks
Revert "[LTO] Demangle the function name in DiagnosticInfoDontCall message"

This reverts commit cb05c2ffc79eefe74c569263e27fcb5fad167ba3.

Breaks https://lab.llvm.org/buildbot/#/builders/121/builds/27524/steps/4/logs/stdio
The file was modifiedllvm/lib/IR/DiagnosticInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/attr-dontcall.ll (diff)
Commit 155e0cf5dc2ffba0a509b1dea25fb4c31eeb367e by aeubanks
Reland [LTO] Demangle the function name in DiagnosticInfoDontCall message

Previously, dontcall attribute message on LTO prints the mangled function name.

Fixes https://github.com/llvm/llvm-project/issues/58933

Relanded with proper IR -> Demangle dependency.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D142844
The file was modifiedllvm/test/CodeGen/X86/attr-dontcall.ll (diff)
The file was modifiedllvm/lib/IR/CMakeLists.txt (diff)
The file was modifiedllvm/lib/IR/DiagnosticInfo.cpp (diff)
Commit 6d9b0759c24e93c2ef1f10ca59c7317c7b440468 by abrachet
[MC] Allow .pushsection between .cfi_startproc/.cfi_endproc

This follows the behavior of gnu assemblers. This is useful when
writing inline assembly.

Differential Revision: https://reviews.llvm.org/D141893
The file was modifiedllvm/lib/MC/MCStreamer.cpp (diff)
The file was modifiedllvm/include/llvm/MC/MCStreamer.h (diff)
The file was addedllvm/test/MC/ELF/cfi-startproc-pushsection.s
Commit 5c6cb61ad416a544e9260dcf5da26631675f5e4e by flo
[SCCP] Add sub tests for NUW/NSW flag inference.

Those tests add coverage for a miscompile with 024115ab14822a97c.
The file was addedllvm/test/Transforms/SCCP/sub-nuw-nsw-flags.ll
Commit 17ce615c781f854b6247ea4995bd50f967d1b699 by arsenm2
AMDGPU: Fix null dereference in getInstructionUniformity

This was failing when it couldn't find an allocatable class
for special physical register inputs (like $mode), which are all
scalars.

This avoids numerous test failures when regbankselect is updated
to use uniformity analysis.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp (diff)
Commit 490e348e67945a4a7e118709579f17b2c96b40bd by arsenm2
AMDGPU: Partially fix machine uniformity for inline asm

This was assuming virtual registers only, and asserting on physical.
This was also ignoring AGPRs, and only considering VGPRs.

Reporting the instruction as uniform or not is conceptually wrong,
this should be reported per-operand. An inline asm statement could
include uniform and non-uniform components. This should report
purely for the register defs and ignore the uses.

Fixes asserting on most of the inline asm tests when uniformity
analysis is used.
The file was modifiedllvm/include/llvm/CodeGen/RegisterBankInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp (diff)
The file was modifiedllvm/lib/CodeGen/RegisterBankInfo.cpp (diff)
Commit 40025761564bae5b62c38745ed6edc2667419591 by arsenm2
AMDGPU/GlobalISel: Partially fix getGenericInstructionUniformity

This was broken for the common case of instructions which are uniform
if their inputs are uniform. This is broken for control flow intrinsics
since the API currently does not express which result operand is in question.

This generates failures in just about every intrinsic test when uniformity
analysis is performed without this.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp (diff)
Commit 7db780d51212a7ee68a9e196cfcf0737807273d6 by aaron
Fix handling of braced-init temporaries for modernize-use-emplace

Fixes #55870

Differential Revision: https://reviews.llvm.org/D135405
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseEmplaceCheck.cpp (diff)
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/modernize/use-emplace.cpp (diff)
Commit 9367bd05913b11aaadf89c4edeced4321c65b605 by aaron
Improve example documentation for __builtin_offsetof; NFC

This implements some post-commit feedback from D142723
The file was modifiedclang/docs/LanguageExtensions.rst (diff)
Commit 3b9606b5cbf6651556158b7162d288c244d178e9 by hans
Revert "[LSAN][HWASAN] Run LSAN tests with HWASAN enabled"

This broke the sanitizer tests on Mac, see e.g.
https://green.lab.llvm.org/green/job/clang-stage1-RA/32739/ and comment on the
code review.

> A lot of tests are disabled by using UNSUPPORTED. The plan is to remove UNSUPPORTED for tests that are fixed.
>
> Reviewed By: vitalybuka
>
> Differential Revision: https://reviews.llvm.org/D142676

This reverts commit f9a01630988716f1b52afe6727f34fe86c07c58a.
and follow-up commit bf47ffaa76fbda1ba96d41ee2681e45d2445be1e
(https://reviews.llvm.org/D142812).
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/log-path_test.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/many_tls_keys_thread.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_globals_uninitialized.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_stacks_threaded.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_stacks.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/libdl_deadlock.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/disabler.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/swapcontext.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_globals_initialized.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_pthread_specific_dynamic.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/recoverable_leak_check.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/malloc_zero.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/register_root_region.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/ignore_object.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/leak_check_at_exit.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/suppressions_default.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_after_return.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/suppressions_file.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/guard-page.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/disabler_in_tsd_destructor.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/fork_threaded.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/realloc_too_big.c (diff)
The file was modifiedcompiler-rt/test/lsan/lit.common.cfg.py (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_static.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_registers_extra.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_pthread_specific_static.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/high_allocator_contention.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/link_turned_off.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/many_tls_keys_pthread.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/pointer_to_self.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_unaligned.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/CMakeLists.txt (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/cleanup_in_tsd_destructor.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/do_leak_check_override.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_registers.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/default_options.cpp (diff)
Commit 022d0c6e300300d64a505e2998f066ef81a22784 by aeubanks
[test] Require asserts in count-visits.ll

-stats doesn't work in release builds without stats enabled.

Followup to D142853
The file was modifiedllvm/test/Other/count-visits.ll (diff)
Commit 7d10213317c18e1d24753e5532d2b037db2d2c5c by flo
Recommit "[SCCP] Support NUW/NSW inference for all overflowing binary operators."

This reverts commit 43acb61a08fffada31fb2e20e45fcc8492ef76b9.

Recommit the patch after fixing the issue causing the revert in 4e607ec4987.
Extra tests have been added in 5c6cb61ad416a544.

Original commit message:

   Extend the NUW/NSW inference logic add in 72121a20cd and cdeaf5f28c3dc
    to all overflowing binary operators.

    Reviewed By: nikic

    Differential Revision: https://reviews.llvm.org/D142721
The file was modifiedllvm/lib/Transforms/Utils/SCCPSolver.cpp (diff)
The file was modifiedllvm/test/Transforms/SCCP/sub-nuw-nsw-flags.ll (diff)
The file was modifiedllvm/test/Transforms/SCCP/ub-shift.ll (diff)
The file was modifiedllvm/test/Transforms/SCCP/widening.ll (diff)
The file was modifiedllvm/test/Transforms/SCCP/ip-constant-ranges.ll (diff)
The file was modifiedllvm/test/Transforms/SCCP/ip-ranges-binaryops.ll (diff)
Commit e9c49901a43f5b16c3df416460b7e4dbdd24ce03 by arsenm2
AMDGPU/GlobalISel: Add stub custom regbankselect pass

Uniformity analysis needs to be the fundamental basis for
regbank decisions. The considerations of the default pass
are secondary, but potentially useful for some edge cases (e.g.
selecting AGPRs when arbitrary loads and stores can directly use
them). This needs to be a separate pass since it requires new
analysis dependencies.

Boilerplate to subclass the existing pass which does nothing
different.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsub.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomic-cmpxchg.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-wave-address.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx90a.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uaddo.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-min.mir (diff)
The file was addedllvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fmul.legacy.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcanonicalize.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx940.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz-zero-undef.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ubfx.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fabs.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-frame-index.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sbfx.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-align.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-concat-vector.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-reg-sequence.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-or.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s32.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kernarg.segment.ptr.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitreverse.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umin.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-unmerge-values.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update.dpp.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.cvt.pkrtz.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getreg.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert-vector-elt.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fshr.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umulh.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fceil.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpermute.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-add.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.v2s16.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-implicit-def.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbl-b32.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitcast.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s16.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz-zero-undef.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.live.mask.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsqrt.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readfirstlane.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get.waveid.in.workgroup.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrmask.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sextload.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.scale.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fmul.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memrealtime.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smulh.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-and.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fpext.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext-inreg.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xchg.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir (diff)
The file was addedllvm/lib/Target/AMDGPU/AMDGPURegBankSelect.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-max.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.64.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-merge-values.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usubo.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-zext.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umax.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fma.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fadd.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.swizzle.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-flog2.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcmp.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-frint.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.class.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi-s1.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctpop.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-trunc.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptrunc.mir (diff)
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp-compr.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.groupstaticsize.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xor.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fneg.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bswap.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.permute.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.vote.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-sub.mir (diff)
Commit 63178c36354881c3e3f3e3bbd716d8e4b3f38b07 by arsenm2
AMDGPU: Update machine divergence analysis test
The file was modifiedllvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/always-uniform-gmir.mir (diff)
Commit d558a70abf2624bf0b26fa8cd506277214fea197 by craig.topper
[RISCV] Use custom operand parsing for FenceArg.

Rather than parsing a symbol and checking its name, look for an
identifier during parsing.

I've also handled the 0 immediate during parsing, though we could
let that go through the normal immediate parsing if we need to support
expressions that evaluate to 0. We don't have tests for that currently.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D142865
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td (diff)
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (diff)
Commit 0b4224011aecb98facd406dc68dacecff40109e8 by minyihh
[mlir][AsmPrinter] Gracefully handle empty symbol

The GenericOp printer should support malformed IR without crashing

GitHub issue #59529

Differential Revision: https://reviews.llvm.org/D142818
The file was modifiedmlir/lib/IR/AsmPrinter.cpp (diff)
Commit c9986f8263980ce6bc9ef87d96d97911eaad547d by minyihh
[mlir][Pass] Handle spaces in pipeline strings

An user might want to add extra spaces for better readability, e.g:
```
mypm = pm.PassManager.parse(f"""builtin.module(
    mypass1,
        func.func(mypass2,mypass3)
)""")
```
GitHub issue #59151

The parser was not taking into account the possibility of spaces after
`)`or `}`

Differential Revision: https://reviews.llvm.org/D142821
The file was modifiedmlir/test/Pass/pipeline-parsing.mlir (diff)
The file was modifiedmlir/test/python/pass_manager.py (diff)
The file was modifiedmlir/lib/Pass/PassRegistry.cpp (diff)
Commit e1cebe9ed12a46282fb6cc9fa9e172b04e5474ef by spatel
[InstCombine] add tests for icmp-of-and-of-select-of-constants; NFC

This overlaps with the tests proposed in D134064
and providing coverage for D133919, but it is
both limited in scope and more comprehensive
because there are many potential ways to transform
these kinds of patterns.
The file was modifiedllvm/test/Transforms/InstCombine/icmp-select.ll (diff)
Commit 98855059674cf1b6b415f8c543f2a923771fed27 by spatel
[InstCombine] reduce icmp_eq0-of-and-of-select-of-constants

This is the most basic patch to handle fixing issue #57666.

D133919 proposes to handle much more than this in a single patch,
but I've used 10 regression tests just to make sure this part is
doing what I expected and nothing more, and it already shows even
more potential TODO items.

The more general proofs from D133919 are correct, but I want to
enable this in smaller steps to reduce risk:
https://alive2.llvm.org/ce/z/RrVEyX

Differential Revision: https://reviews.llvm.org/D142847
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)
The file was modifiedllvm/test/Transforms/InstCombine/icmp-select.ll (diff)
Commit bab1a14cccd4a7d7f04b28ab8e545fcdf408a18e by Louis Dionne
[libc++] Add missing include promote.h in <cmath>

As a fly-by, also remove a superfluous <cstddef> include in promote.h.

Differential Revision: https://reviews.llvm.org/D142657
The file was modifiedlibcxx/include/cmath (diff)
The file was modifiedlibcxx/include/__type_traits/promote.h (diff)
Commit 950487bddf1922c87559339a24cf5a77ad59c363 by hoy
[Pseudo Probe] Do not instrument EH blocks.

This change avoids inserting probes to EH blocks. Pseudo probe can prevent block merging when probes in the blocks look different. This has a chained effect to passes incurring exponential IR growth (such as jump threading) and as a consequence the compilation may time out.  Not inserting probes to EH blocks could mitigate the issue. Another benefit is that both IR size and binary size are smaller. Since EH blocks are usually cold, the change should have minimal impact to profile quality.

Testing:

Out of two internal large benchmarks, no perf impact seen. 1% size savings to both the `text` and the `pseudo_probe` section.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D142747
The file was addedllvm/test/Transforms/SampleProfile/pseudo-probe-eh.ll
The file was modifiedllvm/lib/Transforms/IPO/SampleProfileProbe.cpp (diff)
The file was modifiedllvm/lib/CodeGen/MachineFunctionSplitter.cpp (diff)
The file was addedllvm/include/llvm/Analysis/EHUtils.h
The file was modifiedllvm/include/llvm/CodeGen/MachineBasicBlock.h (diff)
The file was modifiedllvm/include/llvm/CodeGen/MachineSSAContext.h (diff)
Commit 2bd8aeea7e7d885fbf6c70c0e181b1e8e6b808a5 by Shafik Yaghmour
[Clang] Fix unconditional access to Attr pointer when checking if _Nullable is applicable to a type

In TransformAttributedType(...) when checking if _Nullable can be applied to a
type it dereferences TL.getAttr() unconditionally which we can see from the code
earlier in the function is not correct since it is expected to be nullptr in
some cases.

It looks like the correct course of action is to use TL.getModifiedLoc() over
TL.getAttr()->getLocation() in the case that TL.getAttr() returns a nullptr.

Fixes: https://github.com/llvm/llvm-project/issues/60344

Differential Revision: https://reviews.llvm.org/D142799
The file was modifiedclang/docs/ReleaseNotes.rst (diff)
The file was modifiedclang/lib/Sema/TreeTransform.h (diff)
The file was modifiedclang/test/SemaCXX/nullability.cpp (diff)
Commit 226c444b3882e085daf7c9f8e284cfad44838e32 by Louis Dionne
[libc++] Remove <experimental/coroutine>

We've been shipping <coroutine> since LLVM 14, so LLVM 17 won't ship
the <experimental/coroutine> header per our policy for removing TSes.

Differential Revision: https://reviews.llvm.org/D108697
The file was modifiedlibcxx/test/libcxx/assertions/headers_declare_verbose_abort.sh.cpp (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.trivial.awaitables/suspend_always.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.con/construct.pass.cpp
The file was modifiedlibcxx/utils/libcxx/test/features.py (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/expected.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/multishot_func.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/bool_await_suspend.pass.cpp
The file was modifiedlibcxx/test/libcxx/transitive_includes/cxx2b.csv (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.resumption/destroy.pass.cpp
The file was removedlibcxx/include/experimental/coroutine
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.compare/less_comp.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/oneshot_func.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.completion/done.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.prom/promise.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.export/from_address.fail.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/go.pass.cpp
The file was modifiedlibcxx/test/libcxx/clang_tidy.sh.cpp (diff)
The file was removedlibcxx/test/libcxx/experimental/language.support/support.coroutines/version.pass.cpp
The file was modifiedlibcxx/test/libcxx/nasty_macros.compile.pass.cpp (diff)
The file was modifiedlibcxx/utils/libcxx/test/format.py (diff)
The file was modifiedlibcxx/test/libcxx/transitive_includes/cxx17.csv (diff)
The file was modifiedlibcxx/test/libcxx/min_max_macros.compile.pass.cpp (diff)
The file was modifiedlibcxx/include/experimental/__config (diff)
The file was modifiedlibcxx/utils/generate_header_tests.py (diff)
The file was removedlibcxx/test/libcxx/experimental/language.support/support.coroutines/dialect_support.pass.cpp
The file was modifiedlibcxx/test/libcxx/transitive_includes/cxx20.csv (diff)
The file was modifiedlibcxx/docs/ReleaseNotes.rst (diff)
The file was modifiedlibcxx/test/libcxx/modules_include.sh.cpp (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/void_handle.pass.cpp
The file was modifiedlibcxx/test/libcxx/no_assert_include.compile.pass.cpp (diff)
The file was modifiedlibcxx/test/libcxx/transitive_includes/cxx14.csv (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.resumption/resume.pass.cpp
The file was modifiedlibcxx/CMakeLists.txt (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.noop/noop_coroutine.pass.cpp
The file was modifiedlibcxx/test/libcxx/transitive_includes/cxx11.csv (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.export/address.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/includes.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.hash/hash.pass.cpp
The file was modifiedlibcxx/test/libcxx/double_include.sh.cpp (diff)
The file was modifiedlibcxx/test/libcxx/transitive_includes.sh.cpp (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.export/from_address.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/await_result.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/lit.local.cfg
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/fullexpr-dtor.pass.cpp
The file was modifiedlibcxx/include/module.modulemap.in (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.traits/promise_type.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.trivial.awaitables/suspend_never.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.capacity/operator_bool.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.con/assign.pass.cpp
The file was modifiedlibcxx/include/CMakeLists.txt (diff)
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/generator.pass.cpp
The file was removedlibcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.compare/equal_comp.pass.cpp
The file was modifiedlibcxx/test/libcxx/transitive_includes/cxx03.csv (diff)
Commit 0eb01a9c4581a24c163f3464cebdb20534fbda35 by dthorn
[llvm-cov] Add split-file to compiler-rt test requirements.

Differential Revision: https://reviews.llvm.org/D136702
The file was modifiedcompiler-rt/test/CMakeLists.txt (diff)
Commit 0a51eeda1ef43d0f9a73ed2ac15f602262943ea1 by dthorn
[NFC] [llvm-cov] Remove unnecessary logic from llvm-cov debuginfod.

Indexed profiles already have a sorted and uniqued binary ID list, and
due to this, duplicates are harmless in the list of binary IDs found,
since it's set_differenced from the list in the indexed profile.

Differential Revision: https://reviews.llvm.org/D136702
The file was modifiedllvm/lib/ProfileData/Coverage/CoverageMapping.cpp (diff)
Commit 8b1cd3749eb6872b3a71cee4fe65ae3b9de4dc93 by Jonas Devlieghere
[lldb] Use lldbassert in BuildObjCObjectPointerType

This assert is only checked in Debug builds but ignored in all other
builds. This replaces this code with lldbassert which should print a
warning to the user in release builds and actually asserts in debug
builds.

Differential revision: https://reviews.llvm.org/D76697
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTypeEncodingParser.cpp (diff)
Commit 11066449d49e20f18f46757df07455c6abcedcf1 by daltenty
[AIX][CMake] Use top-level tools in llvm_ExternalProject_Add

This change force us to use the top-level CMake's detected tools. We
need to do this as a temporary workaround as when using CMake
versions >= 3.22 we'll pickup the built llvm-ranlib by default if it's
in the path (which it is when doing a sub build via
llvm_ExternalProject_Add for the runtimes).

llvm-ranlib runs into problems on AIX due to missing 64-bit
functionality to be added by
https://reviews.llvm.org/D142479 and https://reviews.llvm.org/D142660.
Once those patches land, this can be reverted.

Differential Revision: https://reviews.llvm.org/D142727
The file was modifiedllvm/cmake/modules/LLVMExternalProjectUtils.cmake (diff)
Commit d502e0fbf933d08df2daf1618e97589af9e3c7d9 by benny.kra
[bazel] Port 155e0cf5dc2f
The file was modifiedutils/bazel/llvm-project-overlay/llvm/BUILD.bazel (diff)
Commit 8520b0fc59c010675afbfdae71d48893afc7b68b by medismail.bennani
[lldb/swig] Remove deprecated flags for generating bindings

This patch conditionaly removes the `-py3` swig flag that was used to
generate python3 bindings, since it's unsued since SWIG 4.1.0.

```
Deprecated command line option: -py3. Ignored, this option is no longer supported
```

This also removes the `-shadow` flag that have been deprecated since 2002.

Differential Revision: https://reviews.llvm.org/D142245

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
The file was modifiedlldb/bindings/python/CMakeLists.txt (diff)
Commit 3301f6e1355b295386ceda654424eddbc30d7784 by kstoimenov
[LSAN][HWASAN] Run LSAN tests with HWASAN enabled

A lot of tests are disabled by using UNSUPPORTED. The plan is to remove UNSUPPORTED for tests that are fixed.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D142676
The file was modifiedcompiler-rt/test/lsan/TestCases/many_tls_keys_thread.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/default_options.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/swapcontext.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/log-path_test.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_globals_initialized.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_pthread_specific_static.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/link_turned_off.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_static.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/register_root_region.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/suppressions_default.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/suppressions_file.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/high_allocator_contention.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_pthread_specific_dynamic.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_stacks_threaded.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_registers.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_globals_uninitialized.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/lit.common.cfg.py (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/realloc_too_big.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_after_return.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/many_tls_keys_pthread.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/cleanup_in_tsd_destructor.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/do_leak_check_override.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/malloc_zero.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/disabler_in_tsd_destructor.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/recoverable_leak_check.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/guard-page.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_stacks.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/libdl_deadlock.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/disabler.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_unaligned.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/use_registers_extra.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/ignore_object.c (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/pointer_to_self.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/fork_threaded.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/leak_check_at_exit.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/CMakeLists.txt (diff)
Commit 71456fdc433afcb1a1e9d9037c0e4acebdfeb512 by szakharin
[flang] Fixed Flang LIT testing after D142548.

Differential Revision: https://reviews.llvm.org/D142935
The file was modifiedflang/test/Driver/target-cpu-features.f90 (diff)
Commit f68fc8d9d20ca957912cc3477564bc7246b61ccd by nemanja.i.ibm
[PowerPC] Fix incorrect shift amount for build_vector

The pattern for a build_vector node was incorrect for big endian
subtargets.
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/build-vector-tests.ll (diff)
Commit 40cef80647cc21b86cbc7c969c7007f9a8f40715 by medismail.bennani
[lldb/test] Skip TestStackCoreScriptedProcess if Asan is enabled

This patch skips TestStackCoreScriptedProcess because the test times out
when the Address Sanitizer is running.

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
The file was modifiedlldb/test/API/functionalities/scripted_process/TestStackCoreScriptedProcess.py (diff)
Commit ea7695dcca53ca7694e347224b68cbdefbc3cc5f by i
[hwasan] Support __lsan_default_options

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D142938
The file was modifiedcompiler-rt/lib/hwasan/hwasan.cpp (diff)
The file was modifiedcompiler-rt/test/lsan/TestCases/default_options.cpp (diff)