Changes

Summary

1. [X86][AVX512] Add combine for TESTM Add an X86 combine for TESTM when one of the operands is a BUILD_VECTOR(0,0,...). TESTM op0, BUILD_VECTOR(0,0,...) -> BUILD_VECTOR(0,0,...) TESTM BUILD_VECTOR(0,0,...), op1 -> BUILD_VECTOR(0,0,...) Differential Revision: https://reviews.llvm.org/D36536

Revision 310787 by guyblank: [X86][AVX512] Add combine for TESTM Add an X86 combine for TESTM when one of the operands is a BUILD_VECTOR(0,0,...). TESTM op0, BUILD_VECTOR(0,0,...) -> BUILD_VECTOR(0,0,...) TESTM BUILD_VECTOR(0,0,...), op1 -> BUILD_VECTOR(0,0,...) Differential Revision: https://reviews.llvm.org/D36536
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp	llvm.src/lib/Target/X86/X86ISelLowering.cpp
	/llvm/trunk/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll	llvm.src/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll