1. [OpaquePtr][LLParser] Explicitly turn off opaque pointers if we see a star (details)
  2. [OpaquePtr][BitcodeReader] Explicitly turn off opaque pointers if we see a typed pointer (details)
  3. Revert "[llvm-objcopy][test] Add cmp after copy" (details)
  4. [lldb-vscode] Fix data race in lldb-vscode when running with ThreadSanitizer (details)
  5. [llvm][json] Fix UINT64 json parsing (details)
  6. [AMDGPU] Add a MIR test for D125567 (details)
  7. [clang-cl] Add /Zc:wchar_t- option (details)
  8. [LV] Regenerate check lines for some tests. (details)
  9. [Polly] Mark classes as final by default. NFC. (details)
  10. [AArch64] Teach perfect shuffles tables about D-lane movs (details)
  11. fix typo error in DivergenceAnalysis.h (details)
  12. [mlir][LLVMIR] Use a new way to verify GEPOp indices (details)
  13. [AMDGPU] Add intrinsics llvm.amdgcn.{raw|struct} (details)
  14. [X86] Rename combineCONCAT_VECTORS\INSERT_SUBVECTOR\EXTRACT_SUBVECTOR to match Opcode name. NFCI. (details)
  15. [AMDGPU] Add test for no waitcnt before issuing LDS DMA. NFC. (details)
  16. [AMDGPU] gfx11 scalar alu instructions (details)
  17. [NFC][lldb][trace] Use uint64_t when decoding and enconding json (details)
  18. [RISCV] Enable strict assertions in InsertVSETVLI data flow (details)
  19. [clangd] Add command-line flag to set background indexing thread priority. (details)
  20. [mlir] Update LLVMIR Fastmath flags use of MLIR BitEnum functionality (details)
  21. [pseudo] benchmark cleanups. NFC (details)
  22. [InstCombine] fold more shuffles with FP<->Int cast operands (details)
  23. [libc] add sprintf (details)
  24. [RISCV] Canonicalize AVL=setvli to AVL=Imm or AVL=VLMAX (details)
Commit d2be4f95494e642b72852cc33e69a47016fe4a23 by aeubanks
[OpaquePtr][LLParser] Explicitly turn off opaque pointers if we see a star

If we turn on --opaque-pointers, tests with '*' would use opaque pointers.

Can't really test this without flipping the default value for --opaque-pointers.

Reviewed By: #opaque-pointers, nikic

Differential Revision:
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
Commit 470910c4ad8af2555c49aec16409630d2a3246b6 by aeubanks
[OpaquePtr][BitcodeReader] Explicitly turn off opaque pointers if we see a typed pointer

Followup to D125735 on the bitcode reader side.

Reviewed By: #opaque-pointers, nikic

Differential Revision:
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
Commit 627928c58bd4f06fff394e8c2e595791f35b17ed by keithbsmiley
Revert "[llvm-objcopy][test] Add cmp after copy"

This reverts commit 0d863b5b90a2f11e58b0b54d7183cb1577fd3a0b.

Broke a test
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/universal-object.test
Commit be738c9d1c1612f5cb0a84227f5ced2726ae609e by walter erquinigo
[lldb-vscode] Fix data race in lldb-vscode when running with ThreadSanitizer

This patch fixes A ProgressEventReporter creates a dedicated thread that keeps checking whether there are new events that need to be sent to IDE as long as m_thread_should_exit is true. When the VSCode instance is destructed, it will set m_thread_should_exit to false, which caused a data race because at the same time its ProgressEventReporter is reading this value to determine whether it should quit. This fix simply uses mutex to ensure they cannot read and write this value at the same time.

Committed on behalf of PRESIDENT810

Reviewed By: clayborg, wallace

Differential Revision:
The file was modifiedlldb/tools/lldb-vscode/ProgressEvent.h
Commit d8f4f1027a92883067ecd4b01030484cffeb24d3 by walter erquinigo
[llvm][json] Fix UINT64 json parsing added support for UINT64 json numeric
types. However, it seems that it didn't properly test uint64_t numbers
larger than the int64_t because the number parsing logic doesn't
have any special handling for these large numbers.

This diffs adds a handler for large numbers, and besides that, fixes the
parsing of signed types by checking for errno ERANGE, which is the
recommended way to check if parsing fails because of out of bounds
errors. Before this diff, strtoll was always returning a number within
the bounds of an int64_t and the bounds check it was doing was completely

As an interesting fact about the old implementation, when calling strtoll
with "18446744073709551615", the largest uint64_t, End was S.end(), even
though it didn't use all digits. Which means that this check can only be
used to identify if the numeric string is malformed or not.

This patch also adds additional tests for extreme cases.

Differential Revision:
The file was modifiedllvm/unittests/Support/JSONTest.cpp
The file was modifiedllvm/lib/Support/JSON.cpp
Commit f84741d8bf3b382dba8c37bb9bff1f5c5576af15 by jay.foad
[AMDGPU] Add a MIR test for D125567
The file was addedllvm/test/CodeGen/AMDGPU/gfx10-shrink-mad-fma.mir
Commit 366e57de23ed20ac95201e1623dfffed215e98f8 by pzheng
[clang-cl] Add /Zc:wchar_t- option

Map /Zc:wchar_t- to the cc1 flag -fno-wchar which is already supported.

Reviewed By: thakis

Differential Revision:
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/Driver/cl-options.c
The file was modifiedclang/test/Driver/cl-zc.cpp
The file was modifiedclang/include/clang/Driver/
Commit d92cec4c96eb85096cc64643764e1370fc08eafc by flo
[LV] Regenerate check lines for some tests.

Make sure the auto-generated check lines are up-to-date for some files,
to reduce the test diff in upcoming changes
The file was modifiedllvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
Commit bd93df937a6441db4aff67191ca0bb486554c34b by llvm-project
[Polly] Mark classes as final by default. NFC.

This make is obivious that a class was not intended to be derived from.

NPM analysis pass can unfortunately not marked as final because they are
derived from a llvm::Checker<T> template internally by the NPM.

Also normalize the use of classes/structs
* NPM passes are structs
* Legacy passes are classes
* structs that have methods and are not a visitor pattern are classes
* structs have public inheritance by default, remove "public" keyword
* Use typedef'ed type instead of inline forward declaration
The file was modifiedpolly/include/polly/Support/VirtualInstruction.h
The file was modifiedpolly/lib/Support/SCEVValidator.cpp
The file was modifiedpolly/lib/Transform/Simplify.cpp
The file was modifiedpolly/include/polly/Simplify.h
The file was modifiedpolly/lib/Transform/ForwardOpTree.cpp
The file was modifiedpolly/lib/Analysis/ScopDetection.cpp
The file was modifiedpolly/include/polly/ScheduleTreeTransform.h
The file was modifiedpolly/lib/Support/ScopHelper.cpp
The file was modifiedpolly/include/polly/CodeGen/IslExprBuilder.h
The file was modifiedllvm/include/llvm/Analysis/DOTGraphTraitsPass.h
The file was modifiedpolly/include/polly/Support/DumpFunctionPass.h
The file was modifiedpolly/include/polly/DependenceInfo.h
The file was modifiedpolly/include/polly/Support/SCEVAffinator.h
The file was modifiedpolly/lib/Transform/FlattenSchedule.cpp
The file was modifiedpolly/lib/Transform/ScheduleTreeTransform.cpp
The file was modifiedpolly/include/polly/DeLICM.h
The file was modifiedpolly/include/polly/ScopDetection.h
The file was modifiedpolly/lib/Support/RegisterPasses.cpp
The file was modifiedpolly/lib/CodeGen/IslNodeBuilder.cpp
The file was modifiedpolly/lib/Transform/MaximalStaticExpansion.cpp
The file was modifiedpolly/lib/CodeGen/CodeGeneration.cpp
The file was modifiedpolly/lib/CodeGen/PPCGCodeGeneration.cpp
The file was modifiedpolly/lib/CodeGen/CodegenCleanup.cpp
The file was modifiedpolly/include/polly/CodePreparation.h
The file was modifiedpolly/include/polly/CodeGen/IRBuilder.h
The file was modifiedpolly/lib/Transform/ScopInliner.cpp
The file was modifiedpolly/include/polly/ForwardOpTree.h
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/include/polly/Support/ScopHelper.h
The file was modifiedpolly/lib/Transform/CodePreparation.cpp
The file was modifiedpolly/lib/CodeGen/IslAst.cpp
The file was modifiedpolly/lib/Support/DumpModulePass.cpp
The file was modifiedpolly/include/polly/Support/GICHelper.h
The file was modifiedpolly/lib/Analysis/PolyhedralInfo.cpp
The file was modifiedpolly/lib/Analysis/PruneUnprofitable.cpp
The file was modifiedpolly/lib/CodeGen/ManagedMemoryRewrite.cpp
The file was modifiedpolly/include/polly/MatmulOptimizer.h
The file was modifiedpolly/include/polly/ScopDetectionDiagnostic.h
The file was modifiedpolly/include/polly/CodeGen/CodeGeneration.h
The file was modifiedpolly/include/polly/JSONExporter.h
The file was modifiedpolly/include/polly/PolyhedralInfo.h
The file was modifiedpolly/lib/Support/DumpFunctionPass.cpp
The file was modifiedpolly/lib/Transform/Canonicalization.cpp
The file was modifiedpolly/lib/Transform/DeLICM.cpp
The file was modifiedpolly/include/polly/ScheduleOptimizer.h
The file was modifiedpolly/include/polly/CodeGen/LoopGeneratorsGOMP.h
The file was modifiedpolly/include/polly/PruneUnprofitable.h
The file was modifiedpolly/lib/Analysis/DependenceInfo.cpp
The file was modifiedpolly/include/polly/CodeGen/BlockGenerators.h
The file was modifiedpolly/include/polly/CodeGen/PerfMonitor.h
The file was modifiedpolly/include/polly/Support/ISLTools.h
The file was modifiedpolly/include/polly/ScopInfo.h
The file was modifiedpolly/include/polly/ScopPass.h
The file was modifiedpolly/include/polly/ScopBuilder.h
The file was modifiedpolly/lib/Transform/ManualOptimizer.cpp
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
The file was modifiedpolly/include/polly/ManualOptimizer.h
The file was modifiedpolly/lib/Analysis/ScopGraphPrinter.cpp
The file was modifiedpolly/lib/Transform/DeadCodeElimination.cpp
The file was modifiedpolly/include/polly/CodeGen/LoopGeneratorsKMP.h
The file was modifiedpolly/include/polly/DeadCodeElimination.h
The file was modifiedpolly/include/polly/ScopGraphPrinter.h
The file was modifiedpolly/include/polly/CodeGen/IslAst.h
The file was modifiedpolly/include/polly/Support/DumpModulePass.h
The file was modifiedpolly/lib/Transform/MatmulOptimizer.cpp
The file was modifiedpolly/lib/Exchange/JSONExporter.cpp
Commit 4c6a070a2ce1722f53da8164b6d50d5d54fdc1d2 by
[AArch64] Teach perfect shuffles tables about D-lane movs

Similar to D123386, this adds D-Movs to the AArch64 perfect shuffle
tables, slightly lowering the costs a little more. This is a rough
improvement in general, especially if you ignore mov v0.16b, v2.16b type
moves that are often artefacts of the calling convention.

The D register movs are encoded as (0x4 | LaneIdx), and to generate a D
register move we are required to bitcast into a higher type, but it is
otherwise very similar to the S-lane mov's already supported.

Differential Revision:
The file was modifiedclang/test/CodeGen/aarch64-neon-vcmla.c
The file was modifiedllvm/test/CodeGen/AArch64/arm64-dup.ll
The file was modifiedllvm/test/CodeGen/AArch64/shuffles.ll
The file was modifiedllvm/test/Transforms/VectorCombine/AArch64/vecreduce-shuffle.ll
The file was modifiedllvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/utils/PerfectShuffle/PerfectShuffle.cpp
The file was modifiedllvm/test/CodeGen/AArch64/shuffle-tbl34.ll
The file was modifiedllvm/test/CodeGen/AArch64/reduce-shuffle.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64PerfectShuffle.h
Commit e1cf702a02bc35b934cc2f8ada2a2bf12e74888f by hanruobing
fix typo error in DivergenceAnalysis.h

Fix a typo error in the comment in DivergenceAnalysis.h

Reviewed By: asbirlea

Differential Revision:
The file was modifiedllvm/include/llvm/Analysis/DivergenceAnalysis.h
Commit 0b168a49bf584ddd9aae4be8b1907aee8ed65615 by minyihh
[mlir][LLVMIR] Use a new way to verify GEPOp indices

Previously, GEPOp relies on `findKnownStructIndices` to check if a GEP
index should be static. The truth is, `findKnownStructIndices` can only
tell you a GEP index _might_ be indexing into a struct (which should use
a static GEP index). But GEPOp::build and GEPOp::verify are falsely
taking this information as a certain answer, which creates many false
alarms like the one depicted in

The solution presented here adopts a new verification scheme: When we're
recursively checking the child element types of a struct type, instead
of checking every child types, we only check the one dictated by the
(static) GEP index value. We also combine "refinement" logics --
refine/promote struct index mlir::Value into constants -- into the very
verification process since they have lots of logics in common. The
resulting code is more concise and less brittle.

We also hide GEPOp::findKnownStructIndices since most of the
aforementioned logics are already encapsulated within GEPOp::build and
GEPOp::verify, we found little reason for findKnownStructIndices (or the
new findStructIndices) to be public.

Differential Revision:
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/
The file was addedmlir/test/Dialect/LLVMIR/dynamic-gep-index.mlir
The file was addedmlir/test/Target/LLVMIR/Import/dynamic-gep-index.ll
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
Commit 791ec1c68e3bbf017ace434a162e61806fc03b47 by Stanislav.Mekhanoshin
[AMDGPU] Add intrinsics llvm.amdgcn.{raw|struct}

Differential Revision:
The file was addedllvm/test/CodeGen/AMDGPU/
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
The file was addedllvm/test/CodeGen/AMDGPU/
The file was modifiedllvm/include/llvm/IR/
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
Commit 320545b577777f12df5f6d562bad0e6df0d52861 by llvm-dev

Its a lot easier to quickly search for the combine when it actually contains the name of the opcode it combines.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 2e2f3e33dff4917df055b7dba2860a64f8060db2 by Stanislav.Mekhanoshin
[AMDGPU] Add test for no waitcnt before issuing LDS DMA. NFC.

A wait is only needed after the DMA before LDS can be read.
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
Commit d21b9b4946cd4e5f784077691e273ee6acc92d3e by Joseph.Nash
[AMDGPU] gfx11 scalar alu instructions

MC layer support for SOP(scalar alu operations) including encoding
support for s_delay_alu and s_sendmsg_rtn.

Jay Foad <>

Patch 7/N for upstreaming of AMDGPU gfx11 architecture.

Depends on D125319

Reviewed By: #amdgpu, arsenm

Differential Revision:
The file was modifiedllvm/lib/Target/AMDGPU/
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was addedllvm/test/MC/AMDGPU/sopp-gfx11.s
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/
The file was addedllvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_all.txt
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
The file was modifiedllvm/test/MC/AMDGPU/sopk-err.s
The file was modifiedllvm/lib/Target/AMDGPU/SIDefines.h
The file was addedllvm/test/MC/AMDGPU/gfx11_asm_scalar.s
The file was modifiedllvm/test/MC/AMDGPU/sopp-err.s
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
The file was modifiedllvm/test/MC/AMDGPU/sopk.s
The file was addedllvm/test/MC/AMDGPU/gfx11_err.s
Commit 26d83a431ecbc79d227b0f3b92b0fb2166a7c7d7 by walter erquinigo
[NFC][lldb][trace] Use uint64_t when decoding and enconding json

llvm's json parser supports uint64_t, so let's better use it for the
packets being sent between lldb and lldb-server instead of using int64_t
as an intermediate type, which might be error-prone.
The file was modifiedlldb/include/lldb/Utility/TraceGDBRemotePackets.h
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
The file was modifiedlldb/source/Utility/TraceGDBRemotePackets.cpp
The file was modifiedlldb/source/Utility/TraceIntelPTGDBRemotePackets.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/IntelPTCollector.cpp
The file was modifiedlldb/source/Target/Trace.cpp
The file was modifiedlldb/include/lldb/Utility/TraceIntelPTGDBRemotePackets.h
Commit 79a66ec97b4fb8cbc4e0a81ead356caf5507a6ea by preames
[RISCV] Enable strict assertions in InsertVSETVLI data flow

These asserts are believed to hold after several recent miscompiles have been fixed.  If you see an assertion failure on this change, please toggle the default back and make sure you file a bug with a reproducer.  We may have as yet uncaught miscompiles lurking in this code.

Differential Revision:
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit 127a1492d72902e2b2cd8905c1198743761f52fb by sam.mccall
[clangd] Add command-line flag to set background indexing thread priority.

This is a followup to D124715, which changed the default, and it anticipates
future patches raising the priority of Low (which is currently equal to
Background on Windows & Linux).
The main point is to allow users to restore the old behavior, which e.g.
allows efficiency cores to remain idle.

I did consider making this a config setting, this is a more complicated change:
- needs to touch queue priorities as well as thread priorities
- we don't know the priority until evaluating the config inside the task
- users would want the ability to prioritize background indexing tasks relative
   to each other without necessarily affecting thread priority, so using one
   option for both may be confusing
I don't really have a use case, so I prefer the simpler thing.

Differential Revision:
The file was modifiedclang-tools-extra/clangd/index/Background.cpp
The file was modifiedclang-tools-extra/clangd/tool/ClangdMain.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was modifiedclang-tools-extra/clangd/index/Background.h
Commit 5c3b20520b5716d61833c8ce45d19faa48ce8db7 by jeffniu22
[mlir] Update LLVMIR Fastmath flags use of MLIR BitEnum functionality

This diff updates the LLVMIR dialect Fastmath flags attribute to use recently
added features of `BitEnum` attributes. Specifically, this diff uses the bit
enum "group" case to represent the `fast` value as an alias for a combination
of other values (`ninf`, `nnan`, ...), instead of using a separate integer
value. (This is in line with LLVM's fastmath flags representation.) This diff
also leverages the `printBitEnumPrimaryGroups` `tblgen` field for concise
enum printing.

The `BitEnum` features were developed for an upcoming diff that adds `fastmath`
support to the arithmetic dialect. This diff simply applies some of the relevant
new features to the LLVM dialect attribute.

Reviewed By: ftynse, Mogball

Differential Revision:
The file was modifiedmlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
The file was modifiedmlir/unittests/TableGen/
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/tools/mlir-tblgen/EnumsGen.cpp
The file was modifiedmlir/test/lib/Dialect/Test/
The file was modifiedmlir/unittests/TableGen/EnumsGenTest.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/roundtrip.mlir
The file was modifiedmlir/include/mlir/IR/
The file was modifiedmlir/test/IR/attribute.mlir
Commit e8e00e342c4fadc8355d1dfb8de86fb0a3dcd5f7 by sam.mccall
[pseudo] benchmark cleanups. NFC

- add missing benchmark for lex/preprocess steps
- name benchmarks after the function they're benchmarking, when appropriate
- remove unergonomic "run" prefixes from benchmark names
- give a useful error message if --grammar or --source are missing
- Use realistic example of how to run, run all benchmarks by default.
  (for someone who doesn't know the commands, this is the most useful action)
- Improve typos/wording in comment
- clean up unused vars
- avoid "parseable stream" name, which isn't a great name & not one I expected
  to escape from ClangPseudoMain

Differential Revision:
The file was modifiedclang-tools-extra/pseudo/benchmarks/Benchmark.cpp
Commit dbf3b5f114553e4d5a446cd9ef57e98a8d04354e by spatel
[InstCombine] fold more shuffles with FP<->Int cast operands

shuffle (cast X), (cast Y), Mask --> cast (shuffle X, Y, Mask)

This extends the transform added with 0353c2c996c5.

If the casts are to a larger element type, the transform
reduces shuffle bit width, so that should be a win for
most codegen (if not, it can be inverted).
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle.ll
Commit ff6fe39eca705186fab1f06376cc4b648ff9711b by michaelrj
[libc] add sprintf

This adds the sprintf entrypoint, as well as unit tests. Currently
sprintf only supports %%, %s, and %c, but the other conversions are on
the way.

Reviewed By: sivachandra, lntue

Differential Revision:
The file was modifiedlibc/src/stdio/printf_core/converter.h
The file was modifiedlibc/src/stdio/printf_core/CMakeLists.txt
The file was modifiedlibc/src/stdio/printf_core/char_converter.h
The file was modifiedlibc/test/src/stdio/CMakeLists.txt
The file was modifiedlibc/src/stdio/printf_core/printf_main.h
The file was modifiedlibc/src/stdio/CMakeLists.txt
The file was addedlibc/src/stdio/sprintf.h
The file was modifiedlibc/spec/
The file was addedlibc/test/src/stdio/sprintf_test.cpp
The file was modifiedlibc/src/stdio/printf_core/converter.cpp
The file was addedlibc/src/stdio/sprintf.cpp
The file was modifiedlibc/test/src/stdio/printf_core/parser_test.cpp
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt
The file was modifiedlibc/src/stdio/printf_core/string_converter.h
Commit 11a7e77c95ddcb51779d9e9d804222eb45a1da92 by preames
[RISCV] Canonicalize AVL=setvli to AVL=Imm or AVL=VLMAX

This patch adds a transform to the local prepass in InsertVSETVLI which canonicalizes an AVL of a register from another vsetvli into immediate or VLMAX when VTYPE is the same. In this patch, I chose to be conservative and avoid arbitrary vreg forwarding due to profitability concerns about possibility overlapping live ranges.

This has the effect of eliminating vsetvli instructions in loops which are walking either VLMAX or a constant number of lanes per iteration.

Differential Revision:
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll