Changes

Summary

  1. [lldb] Add --all option to "memory region" (details)
  2. AArch64: fall back to DWARF instead of crashing on weird .cfi directives (details)
  3. [X86] Regenerate select-ext.ll test for D125604 (details)
  4. [X86] coalesce-dead-lanes.mir - fix CHECK-LABEL typo identified in D125604 (details)
  5. [X86] copy-propagation.ll - fix CHECK-NEXT typo identified in D125604 (details)
  6. [X86] lvi-hardening-indirectbr.ll - fix X64-NOT typo identified in D125604 (details)
  7. [X86] statepoint-vreg-details.ll - fix CHECK-VREG-LABEL typo identified in D125604 (details)
  8. [DebugInfo][X86] debug-info-template-parameter.ll - fix broken DW_AT_default_value checks identified in D125604 (details)
  9. [AArch64] fp16-v8-instructions.ll - remove some old defunct CHECKS identified in D125604 (details)
  10. Revert "[lldb] Add --all option to "memory region"" (details)
  11. [lldb] Remove non-address bits from read/write addresses in lldb (details)
  12. [AMDGPU][MC][NFC] MUBUF code cleanup (details)
  13. [OpenCL] Add cl_khr_subgroup_rotate builtins (details)
  14. [mlir][complex] Add pow/sqrt/tanh ops and lowering to libm (details)
  15. [ARM] Don't Enable AES Pass for Generic Cores (details)
  16. [AMDGPU][MC][GFX7] Disable cache policy modifiers with SMRD (details)
  17. [Security Group] Update representative for Rust. (details)
  18. [AArch64] neon-vmull-high-p64.ll - fix name/check mismatch identified in D125604 (details)
  19. [X86] addcarry.ll - add nounwind to prevent cfi noise on tests (details)
  20. [libcxx] [test] Add missing header for std::numeric_limits (details)
  21. [libcxx] [test] Include header for strverscmp (details)
  22. [AMDGPU][MC][GFX940] Correct tied operand decoding for smfmac opcodes (details)
  23. [InstCombine] Remove disable-verify tests (NFC) (details)
  24. [lldb][AArch64] Fix corefile memory reads when there are non-address bits (details)
  25. [InstCombine] reduce code duplication for checking types; NFC (details)
  26. [InstCombine] avoid crash on fold of icmp with cast operand (details)
  27. Reland(2) "[clangd] Indexing of standard library" (details)
  28. [lit] pass LLVM_SYMBOLIZER_PATH through to tests. (details)
  29. [CGP] Regenerate test checks (NFC) (details)
  30. Assert on polymorphic pointer intrinsic param (details)
  31. [gn build] Port ca875539f788 (details)
Commit 8e648f195c3d57e573fdd8023edcfd80e0516c61 by david.spickett
[lldb] Add --all option to "memory region"

This adds an option to the memory region command
to print all regions at once. Like you can do by
starting at address 0 and repeating the command
manually.

memory region [-a] [<address-expression>]

(lldb) memory region --all
[0x0000000000000000-0x0000000000400000) ---
[0x0000000000400000-0x0000000000401000) r-x <...>/a.out PT_LOAD[0]
<...>
[0x0000fffffffdf000-0x0001000000000000) rw- [stack]
[0x0001000000000000-0xffffffffffffffff) ---

The output matches exactly what you'd get from
repeating the command. Including that it shows
unmapped areas between the mapped regions.

(this is why Process GetMemoryRegions is not
used, that skips unmapped areas)

Help text has been updated to show that you can have
an address or --all but not both.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D111791
The file was modifiedlldb/test/API/linux/aarch64/tagged_memory_region/TestAArch64LinuxTaggedMemoryRegion.py
The file was modifiedlldb/source/Commands/CommandObjectMemory.cpp
The file was modifiedlldb/test/API/functionalities/memory-region/TestMemoryRegion.py
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedlldb/source/Commands/Options.td
Commit 04e5b7fd17748bd10ae0f30cb571103e5da0dde5 by Tim Northover
AArch64: fall back to DWARF instead of crashing on weird .cfi directives

CodeGen will only produce fixed formwat prologues, but hand-written assembly
can have .cfi directives in any combination they want. This should cause a
fallback to DWARF rather than an assertion failure (or an incorrect compact
unwind if assertions are disabled).
The file was modifiedllvm/test/MC/AArch64/arm64-compact-unwind-fallback.s
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
Commit 3f7fc0964e827a6f9900714ee47fa5f8f75b46d1 by llvm-dev
[X86] Regenerate select-ext.ll test for D125604

GlobalISel tests are barely supported on X86, so just regenerate for now to avoid a blocker
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/select-ext.mir
Commit 5a0b7e875f169a77b9ced81c406accbceced8012 by llvm-dev
[X86] coalesce-dead-lanes.mir - fix CHECK-LABEL typo identified in D125604
The file was modifiedllvm/test/CodeGen/X86/coalesce-dead-lanes.mir
Commit 27942499ec20697c347a74a1374350e90a0c17ad by llvm-dev
[X86] copy-propagation.ll - fix CHECK-NEXT typo identified in D125604
The file was modifiedllvm/test/CodeGen/X86/copy-propagation.ll
Commit ec3bb17870a4097a7fa3482defd77724f864b667 by llvm-dev
[X86] lvi-hardening-indirectbr.ll - fix X64-NOT typo identified in D125604
The file was modifiedllvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll
Commit bf84ab7684a39cabd63a039591809e13719996b0 by llvm-dev
[X86] statepoint-vreg-details.ll - fix CHECK-VREG-LABEL typo identified in D125604
The file was modifiedllvm/test/CodeGen/X86/statepoint-vreg-details.ll
Commit f718664866ab4c4e6fe8cc8f319798c800f1916d by llvm-dev
[DebugInfo][X86] debug-info-template-parameter.ll - fix broken DW_AT_default_value checks identified in D125604
The file was modifiedllvm/test/DebugInfo/X86/debug-info-template-parameter.ll
Commit 1584b2c74e4c804a2c85d760a1a2c10b33465f2e by llvm-dev
[AArch64] fp16-v8-instructions.ll - remove some old defunct CHECKS identified in D125604

Typos meant that the update script never removed them
The file was modifiedllvm/test/CodeGen/AArch64/fp16-v8-instructions.ll
Commit 3e928c4b9dfb01efd2cb968795e605760828e873 by david.spickett
Revert "[lldb] Add --all option to "memory region""

This reverts commit 8e648f195c3d57e573fdd8023edcfd80e0516c61
due to test failures on Windows:
https://lab.llvm.org/buildbot/#/builders/83/builds/19094
The file was modifiedlldb/test/API/linux/aarch64/tagged_memory_region/TestAArch64LinuxTaggedMemoryRegion.py
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedlldb/source/Commands/Options.td
The file was modifiedlldb/source/Commands/CommandObjectMemory.cpp
The file was modifiedlldb/test/API/functionalities/memory-region/TestMemoryRegion.py
Commit d9398a91e2a6b8837a47a5fda2164c9160e86199 by david.spickett
[lldb] Remove non-address bits from read/write addresses in lldb

Non-address bits are not part of the virtual address in a pointer.
So they must be removed before passing to interfaces like ptrace.

Some of them we get way with not removing, like AArch64's top byte.
However this is only because of a hardware feature that ignores them.

This change updates all the Process/Target Read/Write memory methods
to remove non-address bits before using addresses.

Doing it in this way keeps lldb-server simple and also fixes the
memory caching when differently tagged pointers for the same location
are read.

Removing the bits is done at the ReadMemory level not DoReadMemory
because particualrly for process, many subclasses override DoReadMemory.

Tests have been added for read/write at the command and API level,
for process and target. This includes variants like
Read<sometype>FromMemory. Commands are tested to make sure we remove
at the command and API level.

"memory find" is not included because:
* There is no API for it.
* It already has its own address handling tests.

Software breakpoints do use these methods but they are not tested
here because there are bigger issues to fix with those. This will
happen in another change.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D118794
The file was modifiedlldb/source/Target/Process.cpp
The file was modifiedlldb/source/Target/Target.cpp
The file was modifiedlldb/source/Target/ProcessTrace.cpp
The file was addedlldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
The file was addedlldb/test/API/linux/aarch64/non_address_bit_memory_access/Makefile
The file was addedlldb/test/API/linux/aarch64/non_address_bit_memory_access/main.c
Commit 95a8af2750e43d60e5ce8c051b16dc396d3cd7f1 by d-pre
[AMDGPU][MC][NFC] MUBUF code cleanup

Removed code that is no longer used after https://reviews.llvm.org/D124485.

Differential Revision: https://reviews.llvm.org/D125811
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td
Commit 21c29a8ae053cb436141ee636333c4f816cc20c4 by sven.vanhaastregt
[OpenCL] Add cl_khr_subgroup_rotate builtins

Differential Revision: https://reviews.llvm.org/D124256
The file was modifiedclang/test/Headers/opencl-c-header.cl
The file was modifiedclang/lib/Sema/OpenCLBuiltins.td
The file was modifiedclang/lib/Headers/opencl-c.h
The file was modifiedclang/lib/Headers/opencl-c-base.h
Commit e497871356f2f7a42a508973960bf4f68dd4f7b8 by benny.kra
[mlir][complex] Add pow/sqrt/tanh ops and lowering to libm

Lowering through libm gives us a baseline version, even though it's not
going to be particularly fast. This is similar to what we do for some
math dialect ops.

Differential Revision: https://reviews.llvm.org/D125550
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/include/mlir/Conversion/Passes.td
The file was addedmlir/lib/Conversion/ComplexToLibm/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
The file was modifiedmlir/lib/Conversion/CMakeLists.txt
The file was addedmlir/lib/Conversion/ComplexToLibm/ComplexToLibm.cpp
The file was modifiedmlir/include/mlir/Conversion/Passes.h
The file was addedmlir/test/Conversion/ComplexToLibm/convert-to-libm.mlir
The file was addedmlir/include/mlir/Conversion/ComplexToLibm/ComplexToLibm.h
Commit 2321c36fbf763e273ed78b4209168ce783b5cf96 by archibald.elliott
[ARM] Don't Enable AES Pass for Generic Cores

This brings clang/llvm into line with GCC. The Pass is still enabled for
the affected cores, but is now opt-in when using `-march=`.

I also took the opportunity to add release notes for this change.

Reviewed By: john.brawn

Differential Revision: https://reviews.llvm.org/D125775
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedllvm/lib/Target/ARM/ARM.td
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 169416c64a39bb85541befc8f651fcd0ac3014c6 by d-pre
[AMDGPU][MC][GFX7] Disable cache policy modifiers with SMRD

Differential Revision: https://reviews.llvm.org/D125799
The file was modifiedllvm/test/MC/AMDGPU/cpol-err.s
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx7_err_pos.s
The file was modifiedllvm/test/MC/AMDGPU/smem.s
The file was modifiedllvm/lib/Target/AMDGPU/SMInstructions.td
Commit fdd019530680afeb308ab39731d4e6f2e2ffa221 by kristof.beyls
[Security Group] Update representative for Rust.

Steve Klabnik recently left the Rust project. Josh Stone (the other member of
the Rust Security Response WG) replaces him as one of the vendor contacts for
Rust.

Differential Revision: https://reviews.llvm.org/D119137
The file was modifiedllvm/docs/Security.rst
Commit 939affc67d4534c75d240180575dd9484ae8c691 by llvm-dev
[AArch64] neon-vmull-high-p64.ll - fix name/check mismatch identified in D125604

Typos meant that we weren't actually checking the function name, which wasn't accounting for mangling
The file was modifiedllvm/test/CodeGen/AArch64/neon-vmull-high-p64.ll
Commit 4e198377f68085f866c516e635a35e4c3c3582cf by llvm-dev
[X86] addcarry.ll - add nounwind to prevent cfi noise on tests
The file was modifiedllvm/test/CodeGen/X86/addcarry.ll
Commit 89cacb9ee72cadd324d38c6b147854eba2b9b415 by benny.kra
[libcxx] [test] Add missing header for std::numeric_limits

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D122571
The file was modifiedlibcxx/test/std/iterators/iterator.container/ssize.pass.cpp
Commit 46d9a6ebd6155900e26cf036fcc312d1e1e10d3f by benny.kra
[libcxx] [test] Include header for strverscmp

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D122570
The file was modifiedlibcxx/test/support/platform_support.h
Commit 32ca9bd7b5b83a4bc84ed611e3744f20cf62dba6 by d-pre
[AMDGPU][MC][GFX940] Correct tied operand decoding for smfmac opcodes

Differential Revision: https://reviews.llvm.org/D125790
The file was modifiedllvm/lib/Target/AMDGPU/VOPInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was modifiedllvm/lib/Target/AMDGPU/SIDefines.h
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP3PInstructions.td
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/mai-gfx940.txt
Commit 128da94d38242c28e6bf23ad025e0cb2d6ce9e4f by npopov
[InstCombine] Remove disable-verify tests (NFC)

InstCombine is not required to do anything sensible if it receives
invalid IR.

These tests seem to be testing self-referential instructions that
may occur in unreachable code -- but InstCombine actually goes out
of the way to remove such instructions ahead of time so it doesn't
need to deal with them.
The file was removedllvm/test/Transforms/InstCombine/objsize-noverify.ll
The file was removedllvm/test/Transforms/InstCombine/select-crash-noverify.ll
Commit 00a12585933ef63ff1204bf5cd265f0071d04642 by david.spickett
[lldb][AArch64] Fix corefile memory reads when there are non-address bits

Previously if you read a code/data mask before there was a valid thread
you would get the top byte mask. This meant the value was "valid" as in,
don't read it again.

When using a corefile we ask for the data mask very early on and this
meant that later once you did have a thread it wouldn't read the
register to get the rest of the mask.

This fixes that and adds a corefile test generated from the same program
as in my previous change on this theme.

Depends on D118794

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D122411
The file was modifiedlldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
The file was modifiedlldb/test/API/linux/aarch64/non_address_bit_memory_access/main.c
The file was modifiedlldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
The file was addedlldb/test/API/linux/aarch64/non_address_bit_memory_access/corefile
The file was modifiedlldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
Commit be6d7cc93c45fff4c891c4b4952a7acca2439bc2 by spatel
[InstCombine] reduce code duplication for checking types; NFC
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 990cc49ca0ca216b3901beb015e5c00d2da40bf2 by spatel
[InstCombine] avoid crash on fold of icmp with cast operand

We could do better by inserting a bitcast from scalar int
to vector int or using an insertelement (the alternate test
does not crash because there's an independent fold like that).

But this doesn't seem like a likely pattern, so just bail out
for now.

Fixes issue #55516.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/test/Transforms/InstCombine/cast-int-icmp-eq-0.ll
Commit ca875539f788c8063e243ce9ceb877a0d2ad9115 by sam.mccall
Reland(2) "[clangd] Indexing of standard library"

This reverts commit 6aabf60f2fb7589430c0ecc8fe95913c973fa248.
The file was modifiedclang-tools-extra/clangd/index/FileIndex.h
The file was modifiedclang-tools-extra/clangd/ConfigFragment.h
The file was modifiedclang-tools-extra/clangd/index/SymbolOrigin.cpp
The file was modifiedclang-tools-extra/clangd/Config.h
The file was addedclang-tools-extra/clangd/index/StdLib.h
The file was addedclang-tools-extra/clangd/index/StdLib.cpp
The file was modifiedclang-tools-extra/clangd/CMakeLists.txt
The file was modifiedclang-tools-extra/clangd/TUScheduler.cpp
The file was addedclang-tools-extra/clangd/unittests/StdLibTests.cpp
The file was modifiedclang-tools-extra/clangd/index/FileIndex.cpp
The file was modifiedclang-tools-extra/clangd/ConfigYAML.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was modifiedclang-tools-extra/clangd/unittests/CMakeLists.txt
The file was modifiedclang-tools-extra/clangd/index/SymbolOrigin.h
The file was modifiedclang-tools-extra/clangd/unittests/TUSchedulerTests.cpp
The file was modifiedclang-tools-extra/clangd/TUScheduler.h
The file was modifiedclang-tools-extra/clangd/ConfigCompile.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
Commit 1236b66a98197109ed40141329d6056dfbe25967 by sam.mccall
[lit] pass LLVM_SYMBOLIZER_PATH through to tests.

Currently several buildbots give unsymbolized traces on crash.
I suspect these are configuring the symbolizer in this way and regressed in
D122251 or thereabouts.

Trying this coupled with a reland of patch that failed on a couple of bots with
no useful stacktrace...
The file was modifiedllvm/utils/lit/lit/TestingConfig.py
Commit 8e4c5d9902139b900c702721f087f46befef72e8 by npopov
[CGP] Regenerate test checks (NFC)
The file was modifiedllvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
Commit 8c975eac34347aec1911a90ca07926f1d6325d8a by thomasp
Assert on polymorphic pointer intrinsic param

Opaque pointers cannot be polymorphic on the pointed type given their
lack thereof. However they are currently accepted by tablegen but the
intrinsic signature verifier trips when verifying any further
polymorphic type because the opaque pointer codepath for pointers will
not push the pointed type in ArgTys.

This commit adds an assert to easily catch such cases instead of having
the generic signature match failure.

Reviewed By: #opaque-pointers, nikic

Differential Revision: https://reviews.llvm.org/D125764
The file was modifiedllvm/lib/IR/Function.cpp
Commit 0990d5b549ee3fbd4d4c6b00c9df0909072fa668 by llvmgnsyncbot
[gn build] Port ca875539f788
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn