Changes

Summary

  1. [clang][driver] Dynamically select gcc-toolset/devtoolset version (details)
  2. [AArch64] Regenerate andandshift.ll test checks (details)
  3. Test stackmap support for i128 (details)
  4. [AMDGPU] Remove unneeded regex escaping in FileCheck patterns (details)
  5. Add support of the next Debian (Debian 13 - Trixie) (details)
  6. Add support of the next Ubuntu (Ubuntu 22.10 - Kinetic Kudu) (details)
  7. [AMDGPU][MC][GFX940] Disable v_mac_f32_dpp (details)
  8. Revert "[clang][driver] Dynamically select gcc-toolset/devtoolset version" (details)
  9. [SPIR-V] Allow setting SPIR-V version via target triple. (details)
  10. [InstCombine] Reuse icmp of and/or folds for logical and/or (details)
  11. [SLP][NFC]Add a test for extracting scalar from undef result vector, (details)
  12. [InstCombine] add tests for icmp of zext i1; NFC (details)
  13. [InstCombine] fold icmp of zext bool based on limited range (details)
  14. [MSVC, ARM64] Add __writex18 intrinsics (details)
  15. [SLP]Do not emit extract elements for insertelements users, replace with shuffles directly. (details)
  16. [mlir] Add RSqrt tp ComplexOps.td. (details)
  17. [TableGen] Remove an untrue statement from the docs (details)
  18. [mlir] Add Expm1 tp ComplexOps.td. (details)
  19. [NFC][flang] Change the OpenMP atomic read/write test cases (details)
  20. [mlir][bufferization][NFC] Improve assembly format of AllocTensorOp (details)
  21. Revert "Revert "[AArch64] Set maximum VF with shouldMaximizeVectorBandwidth"" (details)
  22. [InstCombine] Add tests for recursive and/or of icmp folds (NFC) (details)
  23. [InstCombine] Change operand order in recursive and/or of icmps fold (details)
  24. [clang-tidy] Improve add_new_check.py to recognize more checks (details)
  25. NFC: Silence two warnings for unused bufferization symbols in release mode. (details)
  26. [clang] Module global init mangling (details)
  27. [mlir][bufferization] Fix Python bindings (details)
Commit 8717b492dfcd12d6387543a2f8322e0cf9059982 by tbaeder
[clang][driver] Dynamically select gcc-toolset/devtoolset version

And pick the highest one, instead of adding all possibilities to the
prefixes.

Differential Revision: https://reviews.llvm.org/D125862
The file was modifiedclang/unittests/Driver/ToolChainTest.cpp
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
Commit dd231f02a3eef7277ded7799eeac337faa664374 by llvm-dev
[AArch64] Regenerate andandshift.ll test checks
The file was modifiedllvm/test/CodeGen/AArch64/andandshift.ll
Commit c5e5cf12583895396269f2a56c78e4464bd143da by Tim Northover
Test stackmap support for i128

This diff adds tests that check the currently-working stackmap cases for i128.
This will help ensure no regressions are later introduced by D125680 (when
ready).

Note that i128 stackmap support is currently incomplete, so we cant test all
i128 functionality:

    i128 constants >= 2^{63} crash LLVM
    non-constant i128s crash LLVM

So this change tests only constant i128 operands of value < 2^{63}.

A couple of incorrect comments are also fixed.
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
The file was modifiedllvm/test/CodeGen/AArch64/stackmap.ll
The file was modifiedllvm/test/CodeGen/X86/stackmap.ll
The file was modifiedllvm/test/CodeGen/SystemZ/stackmap.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-stackmap.ll
Commit 21843d96e0553ca882c86a34f11802da0cd2b369 by jay.foad
[AMDGPU] Remove unneeded regex escaping in FileCheck patterns

These must have crept in since D117298 was landed.
The file was modifiedllvm/test/CodeGen/AMDGPU/rel32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx940.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
Commit a02000611a8fc4843f7a3077d8bb4840ef08de8b by sylvestre
Add support of the next Debian (Debian 13 - Trixie)
The file was modifiedclang/lib/Driver/Distro.cpp
The file was modifiedclang/include/clang/Driver/Distro.h
Commit 6f4dc5dae60598e71c8211b0c1a705474b0a223f by sylvestre
Add support of the next Ubuntu (Ubuntu 22.10 - Kinetic Kudu)
The file was modifiedclang/include/clang/Driver/Distro.h
The file was modifiedclang/lib/Driver/Distro.cpp
Commit 818cc9b285e8577d1255f8b046f87fc487fd3bd0 by d-pre
[AMDGPU][MC][GFX940] Disable v_mac_f32_dpp

Differential Revision: https://reviews.llvm.org/D126070
The file was modifiedllvm/lib/Target/AMDGPU/VOPInstructions.td
The file was modifiedllvm/test/MC/AMDGPU/gfx940_err.s
Commit 0eccc92fa0fd1794988cd6bfeca2314107567fdb by tbaeder
Revert "[clang][driver] Dynamically select gcc-toolset/devtoolset version"

This reverts commit 8717b492dfcd12d6387543a2f8322e0cf9059982.

The new unittest fails on Windows buildbots, e.g.
https://lab.llvm.org/buildbot/#/builders/119/builds/8647
The file was modifiedclang/unittests/Driver/ToolChainTest.cpp
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
Commit 72832efc941aa9a0366b3e73031ecf5101355f5f by anastasia.stulova
[SPIR-V] Allow setting SPIR-V version via target triple.

Currently added versions are from v1.0 to v1.5, other versions
can be added as needed.

This change also adds documentation about SPIR-V target support
in LLVM.

Differential Revision: https://reviews.llvm.org/D124776
The file was modifiedllvm/include/llvm/ADT/Triple.h
The file was modifiedllvm/unittests/ADT/TripleTest.cpp
The file was addedllvm/docs/SPIRVUsage.rst
The file was modifiedllvm/docs/UserGuides.rst
The file was modifiedllvm/lib/Support/Triple.cpp
Commit 45226d04f016cf2fdfa8e4d84b31650b975c58e1 by npopov
[InstCombine] Reuse icmp of and/or folds for logical and/or

Similarly to a change recently done for fcmps, add a flag that
indicates whether the and/or is logical to foldAndOrOfICmps, and
reuse the function when folding logical and/or.

We were already calling some parts of it, but this gives us a
clearer indication of which parts may need poison-safe variants,
and would also allow to fold combinations of bitwise and logical
and/or.

This change should be close to NFC, because all folds this enables
were either already called previously, or can make use of implied
poison reasoning.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit bea86a2d3f23a8c81f1dd53bc61291e1109abea8 by a.bataev
[SLP][NFC]Add a test for extracting scalar from undef result vector,
NFC.
The file was addedllvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
Commit 6793c63e885179c8b7f7c90117fb1bc948e7c02c by spatel
[InstCombine] add tests for icmp of zext i1; NFC
The file was modifiedllvm/test/Transforms/InstCombine/icmp-range.ll
Commit 1ebad988b1106e5cb35ea76813a4d3f66070b8f0 by spatel
[InstCombine] fold icmp of zext bool based on limited range

X <u (zext i1 Y) --> (X == 0) && Y

https://alive2.llvm.org/ce/z/avQDRY

This is a generalization of 4069cccf3b4ff4a based on the post-commit suggestion.
This also adds the i1 type check and tests that were missing from the earlier
attempt; that commit caused several bot fails and was reverted.

Differential Revision: https://reviews.llvm.org/D126171
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/test/Transforms/InstCombine/icmp-range.ll
Commit 3e0be5610ff0e9d5bb15f2872bac8cd17bfcc34a by steplong
[MSVC, ARM64] Add __writex18 intrinsics

https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170

  void __writex18byte(unsigned long, unsigned char)
  void __writex18word(unsigned long, unsigned short)
  void __writex18dword(unsigned long, unsigned long)
  void __writex18qword(unsigned long, unsigned __int64)

Given the lack of documentation of the intrinsics, we chose to align the offset with just
`CharUnits::One()` when calling `IRBuilderBase::CreateAlignedStore()`.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D126023
The file was modifiedclang/lib/Headers/intrin.h
The file was modifiedclang/include/clang/Basic/BuiltinsAArch64.def
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/test/CodeGen/arm64-microsoft-intrinsics.c
Commit 2ac5ebedeac438f26bb0439c25a0069fd72914b0 by a.bataev
[SLP]Do not emit extract elements for insertelements users, replace with shuffles directly.

SLP vectorizer emits extracts for externally used vectorized scalars and
estimates the cost for each such extract. But in many cases these
scalars are input for insertelement instructions, forming buildvector,
and instead of extractelement/insertelement pair we can emit/cost
estimate shuffle(s) cost and generate series of shuffles, which can be
further optimized.

Tested using test-suite (+SPEC2017), the tests passed, SLP was able to
generate/vectorize more instructions in many cases and it allowed to reduce
number of re-vectorization attempts (where we could try to vectorize
buildector insertelements again and again).

Differential Revision: https://reviews.llvm.org/D107966
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/buildvector-same-lane-insert.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled_store_crash.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_exceed_scheduling.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled-load.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/pr42022.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/pr42022-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reduction-same-vals.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/cmp-as-alternate-ops.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/phi.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reordered-top-scalars.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/remark_extract_broadcast.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/ordering-bug.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_7zip.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_lencod.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled-load-multiuse.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/insert-shuffle.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
Commit a3a85fe59f489b7531e2852c1c573a26b18703b9 by pifon
[mlir] Add RSqrt tp ComplexOps.td.

Differential Revision: https://reviews.llvm.org/D126202
The file was modifiedmlir/test/Dialect/Complex/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
Commit 9293539064aead8d1822e181b66fd5590c062a1d by jay.foad
[TableGen] Remove an untrue statement from the docs

You can't use foreach in a record body. This was a mistake in the
documentation dating from when it was first written in D85838.
The file was modifiedllvm/docs/TableGen/ProgRef.rst
Commit f3eeefe4490efb6e9821e87ddf51f2d60ba435f6 by pifon
[mlir] Add Expm1 tp ComplexOps.td.

Differential Revision: https://reviews.llvm.org/D126206
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
The file was modifiedmlir/test/Dialect/Complex/ops.mlir
Commit b050686c4b30c53486955097d8678d43f97fef85 by qiaopeixin
[NFC][flang] Change the OpenMP atomic read/write test cases

Remove the integration tests and rename the file.

Reviewed By: shraiysh, NimishMishra

Differential Revision: https://reviews.llvm.org/D126169
The file was addedflang/test/Lower/OpenMP/atomic-read.f90
The file was removedflang/test/Lower/OpenMP/atomic01.f90
The file was removedflang/test/Lower/OpenMP/atomic02.f90
The file was addedflang/test/Lower/OpenMP/atomic-write.f90
Commit ec55f0bd5833ed3d64a49176a13075aee1965911 by springerm
[mlir][bufferization][NFC] Improve assembly format of AllocTensorOp

No longer pass static dim sizes as an attribute. This was redundant and required extra checks in the verifier. This change also makes the op symmetrical to memref::AllocOp.

Differential Revision: https://reviews.llvm.org/D126178
The file was modifiedmlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-alloc-tensor-elimination.mlir
The file was modifiedmlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir
The file was modifiedmlir/test/Dialect/Linalg/one-shot-bufferize-analysis-2fill-extract-matmul-all-perms.mlir
The file was modifiedmlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
The file was modifiedmlir/test/Dialect/Linalg/one-shot-bufferize-analysis-init-tensor-elimination.mlir
The file was modifiedmlir/test/Dialect/Bufferization/invalid.mlir
The file was modifiedmlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-allow-return-allocs.mlir
The file was modifiedmlir/test/Dialect/Bufferization/canonicalize.mlir
The file was modifiedmlir/test/Dialect/SCF/one-shot-bufferize.mlir
The file was modifiedmlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
The file was modifiedmlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
The file was modifiedmlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/Bufferization/IR/BufferizationOps.td
The file was modifiedmlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize.mlir
The file was modifiedmlir/test/Dialect/Linalg/one-shot-bufferize.mlir
The file was modifiedmlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
The file was modifiedmlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-partial.mlir
The file was modifiedmlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-allow-return-allocs.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/InitTensorToAllocTensor.cpp
The file was modifiedmlir/test/Dialect/SCF/one-shot-bufferize-analysis.mlir
The file was modifiedmlir/test/Dialect/Tensor/one-shot-bufferize.mlir
Commit bb82f746129f7deee5e09bd1577ce55eb88c6f9f by jingu.kang
Revert "Revert "[AArch64] Set maximum VF with shouldMaximizeVectorBandwidth""

This reverts commit 42ebfa8269470e6b1fe2de996d3f1db6d142e16a.

The commmit from https://reviews.llvm.org/D125918 has fixed the stage 2 build
failure.

Differential Revision: https://reviews.llvm.org/D118979
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/extend-vectorization-factor-for-unprofitable-memops.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll
Commit 131249cd1fb46efe100ae6c2d54d7ce95d09e422 by npopov
[InstCombine] Add tests for recursive and/or of icmp folds (NFC)

Add variations with bitwise and logical and/or, as well as
commuted operands.
The file was modifiedllvm/test/Transforms/InstCombine/and-or-icmps.ll
Commit f45c1e436e47f18cbef83b1dffa15fb7f234b357 by npopov
[InstCombine] Change operand order in recursive and/or of icmps fold

The order obviously doesn't matter for bitwise and/or, but would
matter for logical and/or, so change it to preserve the original
order.
The file was modifiedllvm/test/Transforms/InstCombine/and-or-icmps.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit 89e663c4f83a6736fc74a01ec48cb4f01210f86f by richard
[clang-tidy] Improve add_new_check.py to recognize more checks

When looking for whether or not a check provides fixits, the script
examines the implementation of the check.  Some checks are not
implemented in source files that correspond one-to-one with the check
name, e.g. cert-dcl21-cpp.  So if we can't find the check implementation
directly from the check name, open up the corresponding module file and
look for the class name that is registered with the check.  Then consult
the file corresponding to the class name.

Some checks are derived from a base class that implements fixits.  So if
we can't find fixits in the implementation file for a check, scrape out
the name of it's base class.  If it's not ClangTidyCheck, then consult
the base class implementation to look for fixit support.

Differential Revision: https://reviews.llvm.org/D126134

Fixes #55630
The file was modifiedclang-tools-extra/clang-tidy/add_new_check.py
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
Commit 02d3499a46cc0f5b52af5f94c951acaad2a6ccdc by stellaraccident
NFC: Silence two warnings for unused bufferization symbols in release mode.

Differential Revision: https://reviews.llvm.org/D126182
The file was modifiedmlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
Commit a1dcfb75ea8c31dd39edb6bdab6f54cde81cad85 by nathan
[clang] Module global init mangling

C++20 modules require emission of an initializer function, which is
called by importers of the module.  This implements the mangling for
that function.  It is the one place the ABI exposes partition names in
symbols -- but fortunately only needed by other TUs of that same module.

Reviewed By: bruno

Differential Revision: https://reviews.llvm.org/D122741
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/include/clang/AST/Mangle.h
Commit 210c4e7fc887accafbeec9facfc70753e35d2e21 by springerm
[mlir][bufferization] Fix Python bindings

Differential Revision: https://reviews.llvm.org/D126179
The file was addedmlir/python/mlir/dialects/bufferization.py
The file was modifiedmlir/python/mlir/dialects/_bufferization_ops_ext.py
The file was modifiedutils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
The file was modifiedmlir/python/CMakeLists.txt