Progress:
In progressChanges

Changes from Git (git http://labmaster3.local/git/llvm-zorg.git)

Summary

  1. Add a libc x86_64 windows worker and a debug builder running on it (details)
Commit 7d9ffd49c6358b9f20ddff6f29c79e186ee1be33 by hedingarcia
Add a libc x86_64 windows worker and a debug builder running on it

Differential Revision: https://reviews.llvm.org/D106981
The file was modifiedbuildbot/osuosl/master/config/status.py
The file was modifiedbuildbot/osuosl/master/config/workers.py
The file was modifiedbuildbot/osuosl/master/config/builders.py

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [llvm-readobj][XCOFF] dump the string table only if the size is bigger than 4. (details)
  2. [mlir][Bazel] Adjust BUILD.bazel file. (details)
  3. [Support] Initialize common options in `getRegisteredOptions` (details)
  4. [FuncSpec] Support specialising recursive functions (details)
  5. [libc] Fix Memory Benchmarks code after rename (details)
  6. Introduce intrinsic llvm.isnan (details)
  7. X86: fix frame offset calculation with mandatory tail calls (details)
  8. [lldb] Partly revert "Allow range-based for loops over DWARFDIE's children" (details)
  9. [llvm][ExecutionEngine] Don't try to run tests on ARM64/Windows on Arm (details)
  10. [lldb] Fix lookup of .debug_loclists with split-dwarf (details)
  11. [X86] Split Subtarget ISA / Security / Tuning Feature Flags Definitions. NFC (details)
  12. Revert "Introduce intrinsic llvm.isnan" (details)
  13. [mlir] Fix CMake linker rules for ViewOpGraph.cpp (details)
  14. Reland "[lldb/DWARF] Only match mangled name in full-name function lookup (with accelerators)" (details)
  15. X86: add test for realignment fix committed earlier. (details)
  16. [llvm][MC] Disable cfi-version test for Windows on Arm (details)
  17. tsan: minor MetaMap tweaks (details)
  18. tsan: use DCHECK instead of CHECK in atomic functions (details)
  19. tsan: unify __cxa_guard_acquire and pthread_once implementations (details)
  20. [mlir] Support drawing control-flow graphs in ViewOpGraph.cpp (details)
  21. [clang][cli] Expose -fno-cxx-modules in cc1 (details)
  22. tsan: refactor guard_acquire/release (details)
  23. [clang][deps] Substitute clang-scan-deps executable in lit tests (details)
  24. tsan: don't use spinning in __cxa_guard_acquire/pthread_once (details)
  25. [LLDB] Skip flaky tests on Arm/AArch64 Linux bots (details)
  26. [X86] Move FeatureFastBEXTR from bdver2 features to tuning (details)
  27. [X86] Rename X86 tuning feature flag FeatureHasFastGather -> FeatureFastGather (details)
  28. [mlir] Include llvm/Support/Debug.h in Transforms/Passes.h (details)
  29. [ARM] Test showing incorrect codegen when subreg liveness is enabled. NFC (details)
  30. [RDA] Attempt to make RDA subreg aware (details)
  31. [flang] Add missing FileSystem.h (details)
  32. [mlir] Fix gcc-5 build in ViewOpGraph.cpp (details)
  33. [X86] combineX86ShuffleChain(): canonicalize mask elts picking from splats (details)
  34. [ARM][atomicrmw] Fix CMP_SWAP_32 expand assert (details)
  35. [NFC][X86] combineX86ShuffleChain(): rename inner Mask to avoid future shadowing (details)
  36. [NFC][X86] combineX86ShuffleChain(): hoist Mask variable higher up (details)
  37. [AMDGPU] Handle functions in llvm's global ctors and dtors list (details)
  38. [ADT] Drop unnecessary const from return types (NFC) (details)
  39. [AMDGPU] Generate checks for i64 to fp conversions (details)
  40. [DebugInfo][LSR] Avoid crashes on large integer inputs (details)
  41. [AMDGPU] Add cttz tests and globalisel checks for ctlz (details)
  42. [PowerPC][AIX] Packed zero-width bitfields do not affect alignment. (details)
  43. [AArch64] Fix assert AArch64TargetLowering::ReplaceNodeResults (details)
  44. [AMDGPU][OpenMP] Wrap amdgcn declare variant inside ifdef (details)
  45. [mlir][amx] add doc to AMX dialect (details)
  46. [AArch64][SVE] Combine bitcasts of predicate types with vector inserts/extracts of loads/stores (details)
  47. [mlir][sparse] fixed typo in sparse tensor type attribute alias (details)
  48. [ELF] Make dot in .tbss correct (details)
  49. [openmp] Add OMPT initialization in libomptarget (details)
  50. [ELF] Apply version script patterns to non-default version symbols (details)
  51. tsan: introduce kAccessFree (details)
  52. tsan: introduce kAccessExternalPC (details)
  53. tsan: move AccessType to tsan_defs.h (details)
  54. tsan: remove non-existent MemoryAccessRangeStep (details)
  55. [ELF] Combine foo@v1 and foo with the same versionId if both are defined (details)
  56. [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts (details)
  57. [InstCombine] Fix vscale zext/sext optimization when vscale_range is unbounded. (details)
  58. [CSSPGO] Migrate and refactor the decoder of Pseudo Probe (details)
  59. [ELF] Fix typo. NFC (details)
  60. [OpenMP] Fix performance regression reported in bug #51235 (details)
  61. [OpenMP] Clean up for hidden helper task (details)
  62. [X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322). (details)
  63. [Bazel] Update build for ee7d20e846 (details)
  64. [InstrProfiling] Emit bias variable eagerly (details)
  65. [AArch64][GlobalISel] Widen G_FPTO*I before clamping (details)
  66. [AArch64][GlobalISel] Widen G_PHI before clamping it during legalization (details)
  67. [gn build] (manually) port ee7d20e84675e1d255d7ae59e3bccfd320cc090d (details)
  68. [gn build] Port ee7d20e84675 (details)
  69. [mlir][sparse] add doc to sparse tensor dialect passes (details)
  70. [RISCV] Remove the _COMMUTABLE and _TA versions of FMA and wide FMA vector instructions. (details)
  71. [DSE][NFC] Clean up DeadStoreElimination from unused variables (details)
  72. Revert "[AMDGPU] Handle functions in llvm's global ctors and dtors list" (details)
Commit 737e27f6236f18dcac53130242756ba0cc1dfe7d by esme.yi
[llvm-readobj][XCOFF] dump the string table only if the size is bigger than 4.
The file was modifiedllvm/test/tools/llvm-readobj/XCOFF/string-table.yaml
The file was modifiedllvm/tools/llvm-readobj/XCOFFDumper.cpp
Commit 8385de118443144518c9fba8b3d831d9076e746b by akuegel
[mlir][Bazel] Adjust BUILD.bazel file.

The dependency is needed after 1b00b94ffc2d60

Differential Revision: https://reviews.llvm.org/D107426
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Commit 486b6013f967ff80f8fa4d20bf5b93e94ce72aa0 by i
[Support] Initialize common options in `getRegisteredOptions`

This allows users accessing options in libSupport before invoking
`cl::ParseCommandLineOptions`, and also matches the behavior before
D105959.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D106334
The file was modifiedllvm/lib/Support/CommandLine.cpp
The file was addedllvm/unittests/Support/CommandLineInit/CommandLineInitTest.cpp
The file was modifiedllvm/unittests/Support/CMakeLists.txt
The file was addedllvm/unittests/Support/CommandLineInit/CMakeLists.txt
Commit 30fbb06979077740961ebc46853e28ab1f999f9d by sjoerd.meijer
[FuncSpec] Support specialising recursive functions

This adds support for specialising recursive functions. For example:

    int Global = 1;
    void recursiveFunc(int *arg) {
      if (*arg < 4) {
        print(*arg);
        recursiveFunc(*arg + 1);
      }
    }
    void main() {
      recursiveFunc(&Global);
    }

After 3 iterations of function specialisation, followed by inlining of the
specialised versions of recursiveFunc, the main function looks like this:

    void main() {
      print(1);
      print(2);
      print(3);
    }

To support this, the following has been added:
- Update the solver and state of the new specialised functions,
- An optimisation to propagate constant stack values after each iteration of
  function specialisation, which is necessary for the next iteration to
  recognise the constant values and trigger.

Specialising recursive functions is (at the moment) controlled by option
-func-specialization-max-iters and is opt-in for compile-time reasons. I.e.,
the default is -func-specialization-max-iters=1, but for the example above we
would need to use -func-specialization-max-iters=3. Future work is to see if we
can increase the default, or improve the cost-model/heuristics to control
compile-times.

Differential Revision: https://reviews.llvm.org/D106426
The file was addedllvm/test/Transforms/FunctionSpecialization/function-specialization-recursive3.ll
The file was addedllvm/test/Transforms/FunctionSpecialization/function-specialization-recursive4.ll
The file was modifiedllvm/test/Transforms/FunctionSpecialization/function-specialization-recursive.ll
The file was modifiedllvm/lib/Transforms/IPO/FunctionSpecialization.cpp
The file was addedllvm/test/Transforms/FunctionSpecialization/function-specialization-recursive2.ll
Commit 2f002817fb462d01d26374015421a24fa2a5a676 by andre.simoesdiasvieira
[libc] Fix Memory Benchmarks code after rename

Differential Revision: https://reviews.llvm.org/D107376
The file was modifiedlibc/benchmarks/LibcMemoryBenchmarkMain.cpp
Commit 16ff91ebccda1128c43ff3cee104e2c603569fb2 by sepavloff
Introduce intrinsic llvm.isnan

Clang has builtin function '__builtin_isnan', which implements C
library function 'isnan'. This function now is implemented entirely in
clang codegen, which expands the function into set of IR operations.
There are three mechanisms by which the expansion can be made.

* The most common mechanism is using an unordered comparison made by
  instruction 'fcmp uno'. This simple solution is target-independent
  and works well in most cases. It however is not suitable if floating
  point exceptions are tracked. Corresponding IEEE 754 operation and C
  function must never raise FP exception, even if the argument is a
  signaling NaN. Compare instructions usually does not have such
  property, they raise 'invalid' exception in such case. So this
  mechanism is unsuitable when exception behavior is strict. In
  particular it could result in unexpected trapping if argument is SNaN.

* Another solution was implemented in https://reviews.llvm.org/D95948.
  It is used in the cases when raising FP exceptions by 'isnan' is not
  allowed. This solution implements 'isnan' using integer operations.
  It solves the problem of exceptions, but offers one solution for all
  targets, however some can do the check in more efficient way.

* Solution implemented by https://reviews.llvm.org/D96568 introduced a
  hook 'clang::TargetCodeGenInfo::testFPKind', which injects target
  specific code into IR. Now only SystemZ implements this hook and it
  generates a call to target specific intrinsic function.

Although these mechanisms allow to implement 'isnan' with enough
efficiency, expanding 'isnan' in clang has drawbacks:

* The operation 'isnan' is hidden behind generic integer operations or
  target-specific intrinsics. It complicates analysis and can prevent
  some optimizations.

* IR can be created by tools other than clang, in this case treatment
  of 'isnan' has to be duplicated in that tool.

Another issue with the current implementation of 'isnan' comes from the
use of options '-ffast-math' or '-fno-honor-nans'. If such option is
specified, 'fcmp uno' may be optimized to 'false'. It is valid
optimization in general, but it results in 'isnan' always returning
'false'. For example, in some libc++ implementations the following code
returns 'false':

    std::isnan(std::numeric_limits<float>::quiet_NaN())

The options '-ffast-math' and '-fno-honor-nans' imply that FP operation
operands are never NaNs. This assumption however should not be applied
to the functions that check FP number properties, including 'isnan'. If
such function returns expected result instead of actually making
checks, it becomes useless in many cases. The option '-ffast-math' is
often used for performance critical code, as it can speed up execution
by the expense of manual treatment of corner cases. If 'isnan' returns
assumed result, a user cannot use it in the manual treatment of NaNs
and has to invent replacements, like making the check using integer
operations. There is a discussion in https://reviews.llvm.org/D18513#387418,
which also expresses the opinion, that limitations imposed by
'-ffast-math' should be applied only to 'math' functions but not to
'tests'.

To overcome these drawbacks, this change introduces a new IR intrinsic
function 'llvm.isnan', which realizes the check as specified by IEEE-754
and C standards in target-agnostic way. During IR transformations it
does not undergo undesirable optimizations. It reaches instruction
selection, where is lowered in target-dependent way. The lowering can
vary depending on options like '-ffast-math' or '-ffp-model' so the
resulting code satisfies requested semantics.

Differential Revision: https://reviews.llvm.org/D104854
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modifiedclang/test/CodeGen/strictfp_builtins.c
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/aarch64-fpclass.ll
The file was addedllvm/test/CodeGen/PowerPC/ppc-fpclass.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedclang/test/CodeGen/X86/strictfp_builtins.c
The file was modifiedclang/test/CodeGen/aarch64-strictfp-builtins.c
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was addedllvm/test/Transforms/InstCombine/fpclass.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was addedllvm/test/CodeGen/X86/x86-fpclass.ll
The file was addedllvm/test/Transforms/InstSimplify/ConstProp/fpclassify.ll
Commit d7b0e5525a4e809cf61a4e1c82f000af781cbab4 by Tim Northover
X86: fix frame offset calculation with mandatory tail calls

If there's a region of the stack reserved for potential tail call arguments
(only the case when we guarantee tail calls will be honoured), this is right
next to the incoming stored return address, not necessarily next to the
callee-saved area, so combining the two into a single figure leads to incorrect
offsets in some edge cases.
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
Commit e4977f9cb58ff7820d0287ba309490af57787749 by Raphael Isemann
[lldb] Partly revert "Allow range-based for loops over DWARFDIE's children"

As pointed out in D107434 by Walter, D103172 also changed two for loops that
were actually not just iterating over some DIEs but also using the iteration
variable later on for some other things. This patch reverts the respective
faulty parts of D103172.
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Commit b1802d694c1cce753d4e54b5924c68c7621d9dc7 by david.spickett
[llvm][ExecutionEngine] Don't try to run tests on ARM64/Windows on Arm

We use CMAKE_SYSTEM_PROCESSOR to set the host_arch lit feature.
This is going to be the same value as CMAKE_HOST_SYSTEM_PROCESSOR,
which on windows is set to the value of the PROCESSOR_ARCHITECTURE
environment variable.

https://cmake.org/cmake/help/latest/variable/CMAKE_HOST_SYSTEM_PROCESSOR.html#cmake-host-system-processor

On Windows on Arm this is "ARM64", not "AArch64" as we currently
look for.

https://docs.microsoft.com/en-us/windows/win32/winprog64/wow64-implementation-details#environment-variables

Add ARM64 to the unsupported list.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D107361
The file was modifiedllvm/test/ExecutionEngine/lit.local.cfg
Commit 0092dbcd80f208f7becec002e70bad5b35a081cd by kimanh
[lldb] Fix lookup of .debug_loclists with split-dwarf

This patch fixes the lookup of locations in
.debug_loclists, if they are split in a .dwp file.

Mainly, we need to consider the cu index offsets.

Reviewed By: jankratochvil

Differential Revision: https://reviews.llvm.org/D107161
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
The file was addedlldb/test/Shell/SymbolFile/DWARF/x86/debug_loclists-dwp.s
Commit fc8dee1ebb9e3a660b18330888edad95ce893422 by llvm-dev
[X86] Split Subtarget ISA / Security / Tuning Feature Flags Definitions. NFC

Our list of slow/fast tuning feature flags has become pretty extensive and is randomly interleaved with ISA and Security (Retpoline etc.) flags, not even based on when the ISAs/flags were introduced, making it tricky to locate them. Plus we started treating tuning flags separately some time ago, so this patch tries to group the flags to match.

I've left them mostly in the same order within each group - I'm happy to rearrange them further if there are specific ISA or Tuning flags that you think should be kept closer together.

Differential Revision: https://reviews.llvm.org/D107370
The file was modifiedllvm/lib/Target/X86/X86.td
Commit 0c28a7c990c5218d6aec47c5052a51cba686ec5e by sepavloff
Revert "Introduce intrinsic llvm.isnan"

This reverts commit 16ff91ebccda1128c43ff3cee104e2c603569fb2.
Several errors were reported mainly test-suite execution time. Reverted
for investigation.
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was removedllvm/test/Transforms/InstSimplify/ConstProp/fpclassify.ll
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedclang/test/CodeGen/X86/strictfp_builtins.c
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was removedllvm/test/CodeGen/AArch64/aarch64-fpclass.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modifiedclang/test/CodeGen/strictfp_builtins.c
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was removedllvm/test/Transforms/InstCombine/fpclass.ll
The file was modifiedclang/test/CodeGen/aarch64-strictfp-builtins.c
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was removedllvm/test/CodeGen/PowerPC/ppc-fpclass.ll
The file was removedllvm/test/CodeGen/X86/x86-fpclass.ll
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit 7f163931b9421c61fe1859fd8b2d97e7f5a39c73 by springerm
[mlir] Fix CMake linker rules for ViewOpGraph.cpp

Differential Revision: https://reviews.llvm.org/D107439
The file was modifiedmlir/lib/Support/CMakeLists.txt
The file was modifiedmlir/lib/Transforms/CMakeLists.txt
Commit f968bd77bbcf142afdb74750e53485b044de3e5f by Raphael Isemann
Reland "[lldb/DWARF] Only match mangled name in full-name function lookup (with accelerators)"

Summary:

In the spirit of https://reviews.llvm.org/D70846, we only return functions with
matching mangled name from Apple/DebugNamesDWARFIndex::GetFunction if
eFunctionNameTypeFull is requested.

This speeds up lookup in the presence of large amount of class methods of the
same name (a typical examples would be constructors of templates with many
instantiations or overloaded operators).

Reviewers: labath, teemperor

Reviewed By: labath, teemperor

Subscribers: aprantl, arphaman, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D73191
The file was modifiedlldb/test/API/lang/cpp/printf/TestPrintf.py
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/x86/find-basic-function.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.cpp
Commit 13e145fe76c4c24c0f76115250b9249015fbf7ee by Tim Northover
X86: add test for realignment fix committed earlier.

Forgot "git add" for a new file.
The file was addedllvm/test/CodeGen/X86/swifttail-realign.ll
Commit 6f8c4340c2bafd7440b3c264a7977ce3cc17c465 by david.spickett
[llvm][MC] Disable cfi-version test for Windows on Arm

Like Windows on x86-64, Windows on arm64 uses structured
exception handling, so we don't emit .debug_frame.

See:
https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling?view=msvc-160

Reviewed By: ostannard

Differential Revision: https://reviews.llvm.org/D107440
The file was modifiedllvm/test/MC/ELF/cfi-version.ll
The file was modifiedllvm/test/lit.cfg.py
Commit d3faecbb7c04022f5cc62fe706cd9e5cf8343caf by dvyukov
tsan: minor MetaMap tweaks

1. Add some comments.
2. Use kInvalidStackID instead of literal 0.
3. Add more LIKELY/UNLIKELY.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D107371
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.cpp
Commit 14e306fa4b0fb72710f2b696602fc356de59175d by dvyukov
tsan: use DCHECK instead of CHECK in atomic functions

Atomic functions are semi-hot in profiles.
The CHECKs verify values passed by compiler
and they never fired, so replace them with DCHECKs.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D107373
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Commit 636428c727cdcfe37b8e950e32d10f06fa4f5dfa by dvyukov
tsan: unify __cxa_guard_acquire and pthread_once implementations

Currently we effectively duplicate "once" logic for __cxa_guard_acquire
and pthread_once. Unify the implementations.

This is not a no-op change:
- constants used for pthread_once are changed to match __cxa_guard_acquire
   (__cxa_guard_acquire constants are tied to ABI, but it does not seem
   to be the case for pthread_once)
- pthread_once now also uses PotentiallyBlockingRegion annotations
- __cxa_guard_acquire checks thr->in_ignored_lib to skip user synchronization
It's unclear if these 2 differences are intentional or a mere sloppy inconsistency.
Since all tests still pass, let's assume the latter.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D107359
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Commit 9102a16bef1aa8c780f440f8ac7d71090d1a96c1 by springerm
[mlir] Support drawing control-flow graphs in ViewOpGraph.cpp

* Add new pass option `print-data-flow-edges`, default value `true`.
* Add new pass option `print-control-flow-edges`, default value `false`.
* Remove `PrintCFGPass`. Same functionality now provided by
  `PrintOpPass`.

Differential Revision: https://reviews.llvm.org/D106342
The file was modifiedmlir/include/mlir/Transforms/Passes.h
The file was modifiedmlir/lib/Transforms/NormalizeMemRefs.cpp
The file was removedmlir/include/mlir/Transforms/ViewRegionGraph.h
The file was modifiedmlir/lib/Transforms/ViewOpGraph.cpp
The file was modifiedmlir/test/Transforms/print-op-graph.mlir
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was removedmlir/lib/Transforms/ViewRegionGraph.cpp
The file was modifiedmlir/lib/Transforms/CMakeLists.txt
Commit 0556138624edf48621dd49a463dbe12e7101f17d by Jan Svoboda
[clang][cli] Expose -fno-cxx-modules in cc1

For some use-cases, it might be useful to be able to turn off modules for C++ in `-cc1`. (The feature is implied by `-std=C++20`.)

This patch exposes the `-fno-cxx-modules` option in `-cc1`.

Reviewed By: arphaman

Differential Revision: https://reviews.llvm.org/D106864
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/Modules/cxx20-disable.cpp
Commit 0bc626d516a201953ef6a45be0d059d70672d7db by dvyukov
tsan: refactor guard_acquire/release

Introduce named consts for magic values we use.

Differential Revision: https://reviews.llvm.org/D107445
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Commit 2718ae397b29f339e65c1e3ca5e834b648732d20 by Jan Svoboda
[clang][deps] Substitute clang-scan-deps executable in lit tests

The lit tests for `clang-scan-deps` invoke the tool without going through the substitution system. While the test runner correctly picks up the `clang-scan-deps` binary from the build directory, it doesn't print its absolute path. When copying the invocations when reproducing test failures, this can result in `command not found: clang-scan-deps` errors or worse yet: pick up the system `clang-scan-deps`. This patch adds new local `%clang-scan-deps` substitution.

Reviewed By: lxfind, dblaikie

Differential Revision: https://reviews.llvm.org/D107155
The file was modifiedclang/test/lit.cfg.py
Commit e3f4c63e78b1ed54f0a35aeb30730e5c74bcfeed by dvyukov
tsan: don't use spinning in __cxa_guard_acquire/pthread_once

Currently we use passive spinning with internal_sched_yield to wait
in __cxa_guard_acquire/pthread_once. Passive spinning tends to degrade
ungracefully under high load. Use FutexWait/Wake instead.

Depends on D107359.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D107360
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Commit f2128abec2030f6534d46f877e3ab2bcc3b5af4c by omair.javaid
[LLDB] Skip flaky tests on Arm/AArch64 Linux bots

Following LLDB tests fail randomly on LLDB Arm/AArch64 Linux buildbots.
We still not have a reliable solution for these tests to pass
consistently. I am marking them skipped for now.

TestBreakpointCallbackCommandSource.py
TestIOHandlerResize.py
TestEditline.py
TestGuiViewLarge.py
TestGuiExpandThreadsTree.py
TestGuiBreakpoints.py
The file was modifiedlldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
The file was modifiedlldb/test/API/functionalities/breakpoint/breakpoint_callback_command_source/TestBreakpointCallbackCommandSource.py
The file was modifiedlldb/test/API/commands/gui/breakpoints/TestGuiBreakpoints.py
The file was modifiedlldb/test/API/terminal/TestEditline.py
The file was modifiedlldb/test/API/commands/gui/viewlarge/TestGuiViewLarge.py
The file was modifiedlldb/test/API/iohandler/resize/TestIOHandlerResize.py
Commit 17e8ac0703e1a3b5e269e3535d862cad39e0cf43 by llvm-dev
[X86] Move FeatureFastBEXTR from bdver2 features to tuning

Noticed while looking at the feature flag renaming suggested in D107370
The file was modifiedllvm/lib/Target/X86/X86.td
Commit 8cd40ece70e59b86b6915f9b52fc8becba8cbe4f by llvm-dev
[X86] Rename X86 tuning feature flag FeatureHasFastGather -> FeatureFastGather

Match the naming style used by the other 'FeatureFast/FeatureSlow' tuning flags.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Target/X86/X86.td
Commit b6408fa169d6c12886af20bd44d6228f2272960c by springerm
[mlir] Include llvm/Support/Debug.h in Transforms/Passes.h

There are many downstream users of llvm::dbgs, which is defined in Debug.h. Before D106342, many users included that dependency transitively via the now deleted ViewRegionGraph.h. Adding it back to Transforms/Passes.h for convenience.

Differential Revision: https://reviews.llvm.org/D107451
The file was modifiedmlir/lib/Transforms/NormalizeMemRefs.cpp
The file was modifiedmlir/include/mlir/Transforms/Passes.h
Commit ff9958b70e959bf48f5d308fb4431c76d3984ae4 by david.green
[ARM] Test showing incorrect codegen when subreg liveness is enabled. NFC
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/subreg-liveness.mir
Commit eeddcba5254b62b7fef03f394820ff4314f2cf19 by david.green
[RDA] Attempt to make RDA subreg aware

This attempts to make more of RDA aware of potentially overlapping
subregisters. Some of this was already in place, with it iterating
through MCRegUnitIterators. This also replaces calls to
LiveRegs.contains(..) with !LiveRegs.available(..), and updates the
isValidRegUseOf and isValidRegDefOf to search subregs.

Differential Revision: https://reviews.llvm.org/D107351
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/subreg-liveness.mir
The file was modifiedllvm/lib/CodeGen/ReachingDefAnalysis.cpp
Commit b44eb5a149a3d78b164a3e9f5c9cf52b44ce0163 by springerm
[flang] Add missing FileSystem.h

This file was previously included transitively via `mlir/Transforms/Passes.h`, but the include has been removed from that file.

Differential Revision: https://reviews.llvm.org/D107455
The file was modifiedflang/tools/tco/tco.cpp
Commit 438f700b4d9e4fca1fd6fd932e53ac8ef1ec15ca by springerm
[mlir] Fix gcc-5 build in ViewOpGraph.cpp

Differential Revision: https://reviews.llvm.org/D107458
The file was modifiedmlir/lib/Transforms/ViewOpGraph.cpp
Commit f819e4c7d0f6efef3cc1042cc45582320bf6c0a2 by lebedev.ri
[X86] combineX86ShuffleChain(): canonicalize mask elts picking from splats

Given a shuffle mask, if it is picking from an input that is splat
given the current granularity of the shuffle, then adjust the mask
to pick from the same lane of the input as the mask element is in.
This may result in a shuffle being simplified into a blend.

I believe this is correct given that the splat detection matches the one
just above the new code,

My basic thought is that we might be able to get less regressions
by handling multiple insertions of the same value into a vector
if we form broadcasts+blend here, as opposed to D105390,
but i have not really thought this through,
and did not try implementing it yet.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D107009
The file was modifiedllvm/test/CodeGen/X86/pr15296.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
The file was modifiedllvm/test/CodeGen/X86/sse41.ll
The file was modifiedllvm/test/CodeGen/X86/avx.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
Commit 40650f27b5df95b2f96d25ea03976d8136804441 by tomas.matheson
[ARM][atomicrmw] Fix CMP_SWAP_32 expand assert

This assert is intended to ensure that the high registers are not
selected when it is passed to one of the thumb UXT instructions. However
it was triggering even for 32 bit where no UXT instruction is emitted.

Fixes PR51313.

Differential Revision: https://reviews.llvm.org/D107363
The file was modifiedllvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
The file was modifiedllvm/test/CodeGen/ARM/cmpxchg.mir
Commit 916cdc3d4b66cf9658280cccb69a56eb6b403cdf by lebedev.ri
[NFC][X86] combineX86ShuffleChain(): rename inner Mask to avoid future shadowing

I want to hoist `Mask` variable higher up,
but then it would clash with this one.
So let's rename this one first.

There are no other intentional changes here other than said rename.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 35c0848b570214ed2b2d96cca4dd62bb7ae725cd by lebedev.ri
[NFC][X86] combineX86ShuffleChain(): hoist Mask variable higher up

Having `NewMask` outside of an if and rebinding `BaseMask` `ArrayRef`
to it is confusing. Instead, just move the `Mask` vector higher up,
and change the code that earlier had no access to it but now does
to use `Mask` instead of `BaseMask`.

This has no other intentional changes.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit d42e70b3d315645e37f3b1455d39e68678e69525 by Reshabhkumar.Sharma
[AMDGPU] Handle functions in llvm's global ctors and dtors list

This patch introduces a new code object metadata field, ".kind"
which is used to add support for init and fini kernels.

HSAStreamer will use function attributes, "device-init" and
"device-fini" to distinguish between init and fini kernels from
the regular kernels and will emit metadata with ".kind" set to
"init" and "fini" respectively.

To reduce the number of init and fini kernels, the ctors and
dtors present in the llvm's global.ctors and global.dtors lists
are called from a single init and fini kernel respectively.

Reviewed by: yaxunl

Differential Revision: https://reviews.llvm.org/D105682
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll
The file was addedllvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
The file was addedllvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ctor-dtor-list.ll
The file was addedllvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
The file was addedllvm/lib/Target/AMDGPU/AMDGPUCtorDtorLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
Commit 785f37b2073f856f4b6b4eeeb3023d0f40e1e103 by kazu
[ADT] Drop unnecessary const from return types (NFC)

Identified with const-return-type-APInt.
The file was modifiedllvm/include/llvm/ADT/APInt.h
Commit 027d3b747e7d8e82d9cc35f8b3689fec5fd09779 by jay.foad
[AMDGPU] Generate checks for i64 to fp conversions

Differential Revision: https://reviews.llvm.org/D107429
The file was modifiedllvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
Commit 21ee38e24f9801a567306b2a88defacf6e589a8b by chris.jackson
[DebugInfo][LSR] Avoid crashes on large integer inputs

SCEV-based salvaging in LSR translates SCEVs to DIExpressions. SCEVs may
contain very large integers but the translation does not support
integers greater than 64 bits. This patch adds checks to ensure
conversions of these large integers is not attempted. A regression test
is added to ensure no such translation is attempted.

Reviewed by: StephenTozer

PR: https://bugs.llvm.org/show_bug.cgi?id=51329

Differential Revision: https://reviews.llvm.org/D107438
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was addedllvm/test/Transforms/LoopStrengthReduce/pr51329.ll
Commit ba5c4ac60090052836418dca7c7f1b7d7ed18dcc by jay.foad
[AMDGPU] Add cttz tests and globalisel checks for ctlz
The file was addedllvm/test/CodeGen/AMDGPU/cttz.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ctlz.ll
Commit b8f612e780e50cfb62bc0196b6367e4587949f88 by sd.fertile
[PowerPC][AIX] Packed zero-width bitfields do not affect alignment.

Zero-width bitfields on AIX pad out to the natral alignment boundary but
do not change the containing records alignment.

Differential Revision: https://reviews.llvm.org/D106900
The file was modifiedclang/test/Layout/aix-packed-bitfields.c
The file was modifiedclang/lib/AST/RecordLayoutBuilder.cpp
Commit 926975267175eeef921c6f84e25c93b00a359a05 by simon.wallis2
[AArch64] Fix assert AArch64TargetLowering::ReplaceNodeResults

Don't know how to custom expand this
UNREACHABLE executed at llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16788

The fix is to provide missing expansions for:
  case ISD::STRICT_FP_TO_UINT:
  case ISD::STRICT_FP_TO_SINT:

A test case is provided.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D107452
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/fptosi-strictfp.ll
Commit f3eb5f900d2ae6c8e1c03d1b250415a7b7aa39b1 by Pushpinder.Singh
[AMDGPU][OpenMP] Wrap amdgcn declare variant inside ifdef

This fixes the issue https://bugs.llvm.org/show_bug.cgi?id=51337

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D107468
The file was modifiedclang/lib/Headers/openmp_wrappers/__clang_openmp_device_functions.h
Commit 478c71bf95d2e88297e01d450e0c10c847cb8037 by ajcbik
[mlir][amx] add doc to AMX dialect

Making sure the AMX dialect webpage reads better with a short introduction on the purpose of this dialect.

Reviewed By: grosul1, bondhugula

Differential Revision: https://reviews.llvm.org/D107419
The file was modifiedmlir/include/mlir/Dialect/AMX/AMX.td
Commit d9cc5d84e4d3bf45df1ef87e677e3ec1431b59b5 by bradley.smith
[AArch64][SVE] Combine bitcasts of predicate types with vector inserts/extracts of loads/stores

An insert subvector that is inserting the result of a vector predicate
sized load into undef at index 0, whose result is casted to a predicate
type, can be combined into a direct predicate load. Likewise the same
applies to extract subvector but in reverse.

The purpose of this optimization is to clean up cases that will be
introduced in a later patch where casts to/from predicate types from i8
types will use insert subvector, rather than going through memory early.

This optimization is done in SVEIntrinsicOpts rather than InstCombine to
re-introduce scalable loads as late as possible, to give other
optimizations the best chance possible to do a good job.

Differential Revision: https://reviews.llvm.org/D106549
The file was addedllvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
The file was addedllvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
The file was modifiedllvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
Commit b4a1eab941bda4c56dca685749b59a99076caebe by ajcbik
[mlir][sparse] fixed typo in sparse tensor type attribute alias

Reviewed By: grosul1, rriddle

Differential Revision: https://reviews.llvm.org/D107472
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
Commit 9bd29a73d17add45234a35de5f6ad7ca8321f7f9 by i
[ELF] Make dot in .tbss correct

GNU ld doesn't support multiple SHF_TLS SHT_NOBITS output sections (it restores
the address after an SHF_TLS SHT_NOBITS section, so consecutive SHF_TLS
SHT_NOBITS sections will have conflicting address ranges).

That said, `threadBssOffset` implements limited support for consecutive SHF_TLS
SHT_NOBITS sections. (SHF_TLS SHT_PROGBITS following a SHF_TLS SHT_NOBITS can still be
incorrect.)

`.` in an output section description of an SHF_TLS SHT_NOBITS section is
incorrect. (https://lists.llvm.org/pipermail/llvm-dev/2021-July/151974.html)

This patch saves the end address of the previous tbss section in
`ctx->tbssAddr`, changes `dot` in the beginning of `assignOffset` so
that `.` evaluation will be correct.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D107208
The file was modifiedlld/ELF/LinkerScript.h
The file was modifiedlld/test/ELF/linkerscript/tbss.s
The file was modifiedlld/ELF/LinkerScript.cpp
Commit 3bc8ce5dd718beef0031bf4b070ac4026e6910d7 by protze
[openmp] Add OMPT initialization in libomptarget

When loading libomptarget, the init function in libomptarget/src/rtl.cpp
will search for the libomptarget_start_tool function using libdl.
libomptarget_start_tool will pass those OMPT callbacks related to target
constructs to libomptarget

Differential Revision: https://reviews.llvm.org/D99803
The file was modifiedopenmp/libomptarget/src/CMakeLists.txt
The file was modifiedopenmp/runtime/src/ompt-general.cpp
The file was modifiedopenmp/libomptarget/CMakeLists.txt
The file was modifiedopenmp/libomptarget/src/rtl.cpp
The file was modifiedopenmp/runtime/src/ompt-internal.h
The file was modifiedopenmp/runtime/src/include/omp-tools.h.var
The file was addedopenmp/libomptarget/src/ompt-target.h
The file was modifiedopenmp/runtime/src/exports_so.txt
The file was addedopenmp/libomptarget/src/ompt-target.cpp
The file was modifiedopenmp/runtime/cmake/config-ix.cmake
The file was modifiedopenmp/runtime/src/ompt-event-specific.h
Commit 7ed22a6fa90cbdc70d6806c1121a0c50c1978dce by i
[ELF] Apply version script patterns to non-default version symbols

Currently version script patterns are ignored for .symver produced
non-default version (single @) symbols. This makes such symbols
not localizable by `local:`, e.g.

```
.symver foo3_v1,foo3@v1
.globl foo_v1
foo3_v1:

ld.lld --version-script=a.ver -shared a.o
# In a.out, foo3@v1 is incorrectly exported.
```

This patch adds the support:

* Move `config->versionDefinitions[VER_NDX_LOCAL].patterns` to `config->versionDefinitions[versionId].localPatterns`
* Rename `config->versionDefinitions[versionId].patterns` to `config->versionDefinitions[versionId].nonLocalPatterns`
* Allow `findAllByVersion` to find non-default version symbols when `includeNonDefault` is true. (Note: `symtab` keys do not have `@@`)
* Make each pattern check both the unversioned `pat.name` and the versioned `${pat.name}@${v.name}`
* `localPatterns` can localize `${pat.name}@${v.name}`. `nonLocalPatterns` can prevent localization by assigning `verdefIndex` (before `parseSymbolVersion`).

---

If a user notices new `undefined symbol` errors with a version script containing
`local: *;`, the issue is likely due to a missing `global:` pattern.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D107234
The file was removedlld/test/ELF/version-script-extern-exact.s
The file was modifiedlld/ELF/ScriptParser.cpp
The file was modifiedlld/ELF/Config.h
The file was modifiedlld/ELF/SymbolTable.h
The file was modifiedlld/ELF/Symbols.cpp
The file was removedlld/test/ELF/version-script-extern.s
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/test/ELF/version-script-noundef.s
The file was modifiedlld/test/ELF/version-script-symver.s
The file was addedlld/test/ELF/version-script-symver-extern.s
The file was modifiedlld/ELF/SymbolTable.cpp
The file was removedlld/test/ELF/version-script-extern-wildcards.s
Commit d41233e9cf12b85b4f856fe6f4c881211b29534c by dvyukov
tsan: introduce kAccessFree

Add kAccessFree memory access flag (similar to kAccessVptr).
In preparation for MemoryAccess refactoring.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107464
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
Commit 2ddaffdc74ec4e17d2df93729a2f20ec773f08f5 by dvyukov
tsan: introduce kAccessExternalPC

Add kAccessExternal memory access flag that denotes
memory accesses with PCs that may have kExternalPCBit set.
In preparation for MemoryAccess refactoring.
Currently unused, but will allow to skip a branch.

Depends on D107464.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107465
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface.inc
Commit c2598be8bcf2cf27391b9e77f9b509e24788e7a1 by dvyukov
tsan: move AccessType to tsan_defs.h

It will be needed in more functions like ReportRace
(the plan is to pass it through MemoryAccess to ReportRace)
and this move will allow to split the huge tsan_rtl.h into parts
(e.g. move FastState/Shadow definitions to a separate header).

Depends on D107465.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107466
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_defs.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
Commit bdeb15c34eac9884f48a324004708e66ff76557b by dvyukov
tsan: remove non-existent MemoryAccessRangeStep

Probably was used for Go at some point...

Depends on D107466.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107467
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
Commit 66d4430492131a2205f159071c15e90c10e2fced by i
[ELF] Combine foo@v1 and foo with the same versionId if both are defined

Due to an assembler design flaw (IMO), `.symver foo,foo@v1` produces two symbols `foo` and `foo@v1` if `foo` is defined.

* `v1 {};` produces both `foo` and `foo@v1`, but GNU ld only produces `foo@v1`
* `v1 { foo; };` produces both `foo@@v1` and `foo@v1`, but GNU ld only produces `foo@v1`
* `v2 { foo; };` produces both `foo@@v2` and `foo@v1`, matching GNU ld. (Tested by symver.s)

This patch implements the GNU ld behavior by reusing the symbol redirection mechanism
in D92259. The new test symver-non-default.s checks the first two cases.

Without the patch, the second case will produce `foo@v1` and `foo@@v1` which
looks weird and makes foo unnecessarily default versioned.

Note: `.symver foo,foo@v1,remove` exists but the unfortunate `foo` will not go
away anytime soon.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D107235
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/test/ELF/version-script-symver.s
The file was addedlld/test/ELF/symver-non-default.s
The file was modifiedlld/test/ELF/version-symbol-undef.s
Commit e57e1e4e00264b77b2b35ad2bf419a48aecdd6bc by bradley.smith
[clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

For fixed SVE types, predicates are represented using vectors of i8,
where as for scalable types they are represented using vectors of i1. We
can avoid going through memory for casts between these by bitcasting the
i1 scalable vectors to/from a scalable i8 vector of matching size, which
can then use the existing vector insert/extract logic.

Differential Revision: https://reviews.llvm.org/D106860
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
The file was modifiedclang/lib/CodeGen/CGCall.cpp
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-globals.c
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-call.c
Commit fe6ae81ef3644bf216c9ca8d2c90150cd9f83a57 by sander.desmalen
[InstCombine] Fix vscale zext/sext optimization when vscale_range is unbounded.

According to the LangRef, a (vscale_range) value of 0 means unbounded.

This patch additionally cleans up the test file vscale_sext_and_zext.ll.
The file was modifiedllvm/test/Transforms/InstCombine/vscale_sext_and_zext.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Commit ee7d20e84675e1d255d7ae59e3bccfd320cc090d by hoy
[CSSPGO] Migrate and refactor the decoder of Pseudo Probe

Migrate pseudo probe decoding logic in llvm-profgen to MC, so other LLVM-base program could reuse existing codes. Redesign object layout of encoded and decoded pseudo probes.

Reviewed By: hoy

Differential Revision: https://reviews.llvm.org/D106861
The file was modifiedllvm/tools/llvm-profgen/PerfReader.cpp
The file was modifiedllvm/tools/llvm-profgen/ProfiledBinary.h
The file was removedllvm/tools/llvm-profgen/PseudoProbe.h
The file was modifiedllvm/tools/llvm-profgen/CMakeLists.txt
The file was modifiedllvm/include/llvm/MC/MCPseudoProbe.h
The file was modifiedllvm/tools/llvm-profgen/ProfiledBinary.cpp
The file was modifiedllvm/tools/llvm-profgen/PerfReader.h
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.cpp
The file was removedllvm/tools/llvm-profgen/PseudoProbe.cpp
The file was modifiedllvm/lib/MC/CMakeLists.txt
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.h
The file was modifiedllvm/lib/MC/MCPseudoProbe.cpp
Commit 0a6aad5991ad0230bd435e2ff12f3e4e9614de58 by i
[ELF] Fix typo. NFC
The file was modifiedlld/ELF/Driver.cpp
Commit 9f5d6ea52eb120ba370bf16ee0537602c6fc727e by tianshilei1992
[OpenMP] Fix performance regression reported in bug #51235

This patch fixes the "performance regression" reported in https://bugs.llvm.org/show_bug.cgi?id=51235. In fact it has nothing to do with performance. The root cause is, the stolen task is not allowed to execute by another thread because by default it is tied task. Since hidden helper task will always be executed by hidden helper threads, it should be untied.

Reviewed By: protze.joachim

Differential Revision: https://reviews.llvm.org/D107121
The file was modifiedopenmp/runtime/src/kmp_tasking.cpp
Commit 680c71b127a995389869f51eaef24c7e9d0b2505 by tianshilei1992
[OpenMP] Clean up for hidden helper task

This patch makes some clean up for code of hidden helper task.

Reviewed By: protze.joachim

Differential Revision: https://reviews.llvm.org/D107008
The file was modifiedopenmp/runtime/src/kmp.h
The file was modifiedopenmp/runtime/src/kmp_tasking.cpp
The file was modifiedopenmp/runtime/src/kmp_taskdeps.h
Commit 7a1a35a1d1ae2e69769505c9f39910067c53d53b by andrea.dibiagio
[X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322).

This fixes a bug where implicit uses of EFLAGS were not marked as ReadAdvance in
the RM/MR variants of ADC/SBB (PR51318)

This also fixes the absence of ReadAdvance for the register operand of
RMW arithmetic instructions (PR51322).

Differential Revision: https://reviews.llvm.org/D107367
The file was modifiedllvm/lib/Target/X86/X86InstrArithmetic.td
The file was modifiedllvm/test/tools/llvm-mca/X86/BtVer2/rmw-add-sequence-readadvance.s
The file was modifiedllvm/test/tools/llvm-mca/X86/BtVer2/rmw-adc-sequence-readadvance.s
The file was modifiedllvm/test/tools/llvm-mca/X86/BtVer2/adc-sequence-readadvance.s
Commit b0d58ddf87b4ddd004f485e2cedc0494df8099e0 by gcmn
[Bazel] Update build for ee7d20e846

Updates the Bazel configuration for
https://github.com/llvm/llvm-project/commit/ee7d20e84675. We need to
drop the dependency from llvm-tblgen to avoid a dependency cycle:

```
.-> @llvm-project//llvm:llvm-tblgen
|   @llvm-project//llvm:tblgen
|   @llvm-project//llvm:MC
|   @llvm-project//llvm:ProfileData
|   @llvm-project//llvm:Core
|   @llvm-project//llvm:attributes_gen
|   @llvm-project//llvm:include/llvm/IR/Attributes.inc
|   @llvm-project//llvm:attributes_gen__gen_attrs_genrule
`-- @llvm-project//llvm:llvm-tblgen
```

It appears this dep was not strictly necessary though. TableGen uses MC
headers but it can get those through Support, which also exports MC
headers due to layering issues.

Differential Revision: https://reviews.llvm.org/D107480
The file was modifiedutils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Commit 6660cec568504df47d9becb0c552c20577880df8 by phosek
[InstrProfiling] Emit bias variable eagerly

Rather than emitting the bias variable lazily as needed, emit it
eagerly. This allows profile runtime to refer to this variable
unconditionally without having to use the weak reference. The bias
variable is in a COMDAT so there'll never be more than one instance,
and if it's not needed, linker should be able to GC it, so the overhead
should be minimal.

Differential Revision: https://reviews.llvm.org/D107377
The file was addedllvm/test/Instrumentation/InstrProfiling/bias-var.ll
The file was modifiedllvm/include/llvm/Transforms/Instrumentation/InstrProfiling.h
The file was modifiedllvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
Commit 7d97de60b3ecd52e2a427dff661cdd1ca99617e9 by Jessica Paquette
[AArch64][GlobalISel] Widen G_FPTO*I before clamping

Going through our legalization rules and doing some cleanup.

Widening and then clamping is usually easier than clamping and then widening.

This allows us to legalize some weird types like s88.

Differential Revision: https://reviews.llvm.org/D107413
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit d9279843b1bafcfb1f540d3093b86023025b6717 by Jessica Paquette
[AArch64][GlobalISel] Widen G_PHI before clamping it during legalization

This allows us to handle weird types like s88; we first widen to s128, then
clamp back down to s64.

https://godbolt.org/z/9xqbP46Mz

Also this makes it possible for GISel to legalize the case in pr48188.ll. It
now does the same thing as SDAG, although regalloc chooses different registers.

Differential Revision: https://reviews.llvm.org/D107417
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/pr48188.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
Commit 43a43353f71a609031eab4bb4a8d40bc74dbb753 by i
[gn build] (manually) port ee7d20e84675e1d255d7ae59e3bccfd320cc090d
The file was modifiedllvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn
Commit 6dc4baf7b64b2e34f758a9132948f6409a8280d3 by llvmgnsyncbot
[gn build] Port ee7d20e84675
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-profgen/BUILD.gn
Commit 9cf69ec11d4e86e8c42b0b903d31e1cfa14791e0 by ajcbik
[mlir][sparse] add doc to sparse tensor dialect passes

completes my first pass of filling out missing doc parts on our webpage

Reviewed By: grosul1

Differential Revision: https://reviews.llvm.org/D107479
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
Commit 643ce70a6466f043ab41d4044d57b71f80b98874 by craig.topper
[RISCV] Remove the _COMMUTABLE and _TA versions of FMA and wide FMA vector instructions.

Use a tail policy operand instead. Inspired by the work in D105092,
but without the intrinsic interface changes.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D106512
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVMCInstLower.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrFormats.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Commit 238139be095236ebcd4274b3de5a750262c969c3 by dawid_jurek
[DSE][NFC] Clean up DeadStoreElimination from unused variables

Differential Revision: https://reviews.llvm.org/D106446
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit dce35ef104099923e9a9053424c003c28029b9fb by Reshabhkumar.Sharma
Revert "[AMDGPU] Handle functions in llvm's global ctors and dtors list"

This reverts commit d42e70b3d315645e37f3b1455d39e68678e69525.
The file was removedllvm/lib/Target/AMDGPU/AMDGPUCtorDtorLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was removedllvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
The file was removedllvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ctor-dtor-list.ll
The file was removedllvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h