Changes

Summary

  1. [Inline] Fix a warning by removing an explicit copy constructor (details)
  2. [GlobalISel] Remove FlagsOp (NFC) (details)
  3. [x86] improve CMOV codegen by pushing add into operands, part 2 (details)
  4. [AMDGPU] Regenerate mul24 test checks (details)
  5. [AMDGPU] Regenerate wave32.ll test checks (details)
  6. [NFC][Codegen][X86] Improve test coverage for repeated insertions of the same scalar into different elements (details)
  7. [OpenMP][NVPTX] Disable OpenMPOpt when building deviceRTLs (details)
  8. [InstCombine] Fix PR47960 - Incorrect transformation of fabs with nnan flag (details)
  9. [JITLink][RISCV] Run new test from 0ad562b48 only if the RISCV backend is enabled (details)
  10. Revert rG939291041bb35b8088e3b61be2b8b3bc950f64a7 "[AMDGPU] Regenerate wave32.ll test checks" (details)
  11. [Attributes] Remove nonnull from UB-implying attributes (details)
  12. [Attributes] Clean up handling of UB implying attributes (NFC) (details)
  13. [X86][SSE] LowerRotate - perform modulo on the amount splat source directly. (details)
Commit 4e288a85283fe632cbdf004abc2ca7a7711823f3 by kazu
[Inline] Fix a warning by removing an explicit copy constructor

This patches fixes the warning:

  llvm/include/llvm/Analysis/InlineCost.h:62:3: error: definition of
  implicit copy assignment operator for 'CostBenefitPair' is
  deprecated because it has a user-declared copy constructor
  [-Werror,-Wdeprecated-copy]

by removing the explicit copy constructor.
The file was modifiedllvm/include/llvm/Analysis/InlineCost.h
Commit 0fc5534ac74a9c431f7f5a6284a4729d3143d22b by kazu
[GlobalISel] Remove FlagsOp (NFC)

The class was introduced without a use on Dec 11, 2018 in commit
cef44a234219e38e1c28c902ff24586150eef682.
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
Commit 1ce05ad619a5904f15f35a5c96ece27ee1991f1c by spatel
[x86] improve CMOV codegen by pushing add into operands, part 2

This is a minimum extension of D106607 to allow folding for
2 non-zero constantsi that can be materialized as immediates..

In the reduced test examples, we save 1 instruction by rolling
the constants into LEA/ADD. In the motivating test from the bullet
benchmark, we absorb both of the constant moves into add ops via
LEA magic, so we reduce by 2 instructions.

Differential Revision: https://reviews.llvm.org/D106684
The file was modifiedllvm/test/CodeGen/X86/add-cmov.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 54e5ced7e61e38fe1af0aadfb64ed4b629e06268 by llvm-dev
[AMDGPU] Regenerate mul24 test checks

To simplify diffs in future patch
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_int24.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_uint24-r600.ll
Commit 939291041bb35b8088e3b61be2b8b3bc950f64a7 by llvm-dev
[AMDGPU] Regenerate wave32.ll test checks

To simplify diff in future patch
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll
Commit fa0910e6de5d03fe96dceb2377f6f7710cff270c by lebedev.ri
[NFC][Codegen][X86] Improve test coverage for repeated insertions of the same scalar into different elements
The file was modifiedllvm/test/CodeGen/X86/avx-insertelt.ll
Commit f1b8fa55d03315744a88035aa46fbbf9ec6ae622 by tianshilei1992
[OpenMP][NVPTX] Disable OpenMPOpt when building deviceRTLs

We build `deviceRTLs` with `-O1` by default, which also triggers OpenMPOpt. When
the info cache is created, some attributes are removed. As a result, although we
mark a few functions `noinline`, they are still inlined when the bitcode library
is generated. This can cause an issue in middle end optimization.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106710
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt
Commit 7bd361200a7bd86d633058115412a771aea885ca by spatel
[InstCombine] Fix PR47960 - Incorrect transformation of fabs with nnan flag

Bug Fix for PR: https://llvm.org/PR47960

This patch makes sure that the fast math flag used in the 'select'
instruction is the same as the 'fabs' instruction after the transformation.

Differential Revision: https://reviews.llvm.org/D101727
The file was modifiedllvm/test/Transforms/InstCombine/fabs.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Commit 75077f46e7e4d5c89a6d7cd9a8ae7d740df2f4cd by thakis
[JITLink][RISCV] Run new test from 0ad562b48 only if the RISCV backend is enabled
The file was addedllvm/test/ExecutionEngine/JITLink/RISCV/lit.local.cfg
Commit 34dc4f24f2d38b18cccbc2dc0aaa7cb44cd54313 by llvm-dev
Revert rG939291041bb35b8088e3b61be2b8b3bc950f64a7 "[AMDGPU] Regenerate wave32.ll test checks"

This still breaks buildbots
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll
Commit 99f869c8f00a36dac3c774178b69d05876a29a31 by nikita.ppv
[Attributes] Remove nonnull from UB-implying attributes

From LangRef:

> if the parameter or return pointer is null, poison value is
> returned or passed instead. The nonnull attribute should be
> combined with the noundef attribute to ensure a pointer is not
> null or otherwise the behavior is undefined.

Dropping noundef is sufficient to prevent UB. Including nonnull
in this method just muddies the semantics.
The file was modifiedllvm/lib/IR/Attributes.cpp
The file was modifiedllvm/test/Transforms/DeadArgElim/NoundefAttrs.ll
The file was modifiedllvm/test/Transforms/InstCombine/unused-nonnull.ll
Commit 087a8eea359a4d8ef22c42fddca3b09833928c6a by nikita.ppv
[Attributes] Clean up handling of UB implying attributes (NFC)

Rather than adding methods for dropping these attributes in
various places, add a function that returns an AttrBuilder with
these attributes, which can then be used with existing methods
for dropping attributes. This is with an eye on D104641, which
also needs to drop them from returns, not just parameters.

Also be more explicit about the semantics of the method in the
documentation. Refer to UB rather than Undef, which is what this
is actually about.
The file was modifiedllvm/include/llvm/IR/InstrTypes.h
The file was modifiedllvm/include/llvm/IR/Attributes.h
The file was modifiedllvm/lib/IR/Function.cpp
The file was modifiedllvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
The file was modifiedllvm/lib/IR/Attributes.cpp
Commit b95f66ad786b8f2814d4ef4373e8ac3902e6f62a by llvm-dev
[X86][SSE] LowerRotate - perform modulo on the amount splat source directly.

If the rotation amount is a known splat, perform the modulo on the splat source, and then perform the splat. That way the amount-extension performed later by LowerScalarVariableShift can fold the splats away without any multiple-use issues.

Fixes one of the concerns raised on D104156
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/min-legal-vector-width.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll